co-simulation of aadl and simulink models using polychrony
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Co-simulation of AADL and Simulink models using Polychrony on Polarsys
Jean-Pierre Talpin
An Eclipse project of the Polarsys Industry Working Group
https://polarsys.org/projects/polarsys.pop
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INRIA project-team TEA Time Events Architectures Formal methods for embedded system design Focus on time modelling from an architecture perspective Eclipse project POP for the open-source distribution of the toolset Polychrony on the platform of the Polarsys Industrial Working Group
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Polychrony on Polarsys (POP) An Eclipse project integrated in the platform of the Polarsys Industry Working Group An implementation of the synchronous multi clocked model of computation of the data-flow language Signal A toolbox for synthesis in computer-aided system design consisting of transformations, verification, and code generation functionalities
https://www.polarsys.org/projects/polarsys.pop
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Simulink functional models AADL architecture model
verification and simulation code generation infrastructure
Co-simulation, profiling, scheduling, verification, performance evaluation
VCD interface
Case study of the A350 doors management system
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Flight control systems Landing gear system
Doors management system
passenger doors, emergency exits, cargo doors
Flight warning system
...
Case study of the A350 doors management system
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System-level model of the Doors and Slides Control System (SDSCS)
A safety-critical system High-level modeling
Early validation & verification
Architecture exploration
Function
Monitor doors status via sensors
Control flight lock actuators
Manage the residual pressure
Inhibit incorrect cabin pressure
Case study of the A350 doors management system
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SDSCS functional model (Simulink)
Simulink Matlab Simulink and Stateflow, a popular high-level modeling language Gene-Auto A safe subset of Simulink/Stateflow Logical time and synchronized data-flow A complete transformation tool-chain with Polychrony
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Zoom on the data-flows and mode automata of the door handler process
SDSCS functional model (Simulink)
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SDSCS architecture model (AADL) AADL An SAE standard for high-level, component-based, architecture modeling : application software, execution platform, composites ARINC-653 An API for avionic software supporting the partitioned IMA approach A complete transformation tool-chain with Polychrony
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SDSCS architecture model (zoom)
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Modeling communication latency
Polychrony Time is abstracted by Boolean logic Communication is instantaneous
AADL Thread communicate at specified time intervals A process M models communication delay/timing
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Modeling in/out event/data ports
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Modeling computation and communication scheduler
Polychrony Scheduling of communications can be synthesized
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Modeling an AADL thread
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Modeling process/processor mapping
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Modeling an AADL bus
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Modeling AADL/RTOS services
Polychrony provides a library of templates to model • AADL concepts (avionic standard to model
architectures) • ARINC-653 RTOS services (avionic standard to
model IMAs)
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Simulation model (Polychrony)
VCD interface - Global simulation clock, interactive and of offline modes
Additional models for open system simulation
A simple, non-preemptive, static scheduler Time intervals are abstracted
Simulation clocks
Reference clocks Periodic clocks (threads)
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Real-time scheduling (Syndex)
Architecture
Mapping
Algorithm
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Polychrony A software architecture synthesis tool
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1. specify
3. analyze 4. synthesize
2. compose
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POP A large toolbox for system architect
A model of computation and communication for software architecture exploration
• Data-flow for computation • Mode automata for control • Regular expressions for requirements • Libraries for services
A toolbox of services • Code generation • Model transformation • Model checking • Controller synthesis • Syndex real time scheduling interface
An interactive interface • Open import functionalities • Analysis and transformation • Visualization and traceability
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POP An Eclipse project of the Polarsys IWG
https://polarsys.org/projects/polarsys.pop