492 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 21, NO. 9, SEPTEMBER 2011

A CMOS Voltage Controlled Oscillator andFrequency Tripler for 22 – 27 GHz

Local Oscillator GenerationPei-Kang Tsai, Chih-Yu Liu, and Tzuen-Hsi Huang, Member, IEEE

Abstract—This letter presents a CMOS voltage-controlledoscillator (VCO) and frequency tripler integration for 22–27 GHzlocal oscillator (LO) generation. An 8 GHz wideband VCO pro-vides the fundamental and second harmonic signals which aredirectly fed into the frequency tripler for frequency mixing. Thetripler generates an output frequency in the range of 22–27 GHz.This integration is implemented and fabricated using a 0.18 �

CMOS process. The total chip area is 0.66 ���. The measuredfrequency tuning range (FTR) of the VCO increases from 7.28to 9.11 GHz as the tuning voltage increases from 0 to 1.8 V.The output frequency range of the tripler covers a wide band of5.5 GHz (22.4%) ranging from 21.83 to 27.33 GHz. Overall, thecore circuits of this integration consume 11.1 mW. At a frequencyoffset of 1 MHz from the centre frequency, the measured phasenoises of the VCO and frequency tripler are ��� ��� �� and�� ��� ��, respectively. The calculated figure of merit with

frequency tuning range ��� is � � � ��� ��.

Index Terms—Frequency tripler, integration design, local oscil-lator (LO), millimeter-wave, voltage-controlled oscillator (VCO),wideband.

I. INTRODUCTION

T HE demand for wideband transceivers has increasedrapidly with the development of millimeter-wave

(mm-wave) systems such as the 60 GHz wireless personalarea network (WPAN) [1] and radar systems [2]. The widebandmm-wave phase-locked loop (PLL) is an important buildingblock in wideband transceivers. The voltage-controlledoscillator (VCO) and the first-stage frequency divider of aprescaler in a mm-wave PLL are the most critical to the broad-band operation among all building blocks in the PLL.

The combination of a low-frequency VCO and a frequencymultiplier to achieve the desired mm-wave source had beenwidely adopted for broadband PLL applications [3]–[6]. Ingeneral, MOS varactors can have a wider tuning capability anda better quality factor when they are operating at comparativelylow frequencies. The trade off between the tuning range andphase noise of a VCO at low mm-wave frequency rangewill become easier than that are operated at high mm-wave

Manuscript received May 01, 2011; revised June 29, 2011; accepted July 19,2011. Date of publication August 15, 2011; date of current version September02, 2011.

The authors are with the Department of Electrical Engineering, NationalCheng Kung University, Tainan 70101, Taiwan (e-mail: n2896135@mail.ncku.edu.tw; cyliu@esmt.com.tw; thhuang@ee.ncku.edu.tw).

Color versions of one or more of the figures in this letter are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/LMWC.2011.2163060

frequency range. For the frequency multiplier design, a non-linear differential amplifier has been used as a frequency triplerin [3]; however, it suffers from high power consumption andpoor sub-harmonic rejection. Quadrature VCO (QVCO) withfrequency doubler using pinchoff clipping has been proposedin [4], but QVCO usually consumes more chip area and dcpower. A Gilbert cell mixer has been used as frequency doubler[5], but it has many input ports directly connected to the VCOoutput nodes. The mixer will cause overloading of capacitiveparasitics that degrades the FTR directly.

This letter presents the direct combination of a VCO with afrequency tripler for a 22–27 GHz LO generation. Unlike thecircuit topology in [6], the power consumption can be savedwithout inserting a buffer stage between the VCO and the mixer.The second harmonic in the common node of the cross-coupledpair is peaked with shunt-peaking technique [7]. Shunt-peakingat second harmonic can improve the phase noise in VCO [7]which leads to low phase noise in frequency tripler output.

II. CIRCUIT DESIGN

Fig. 1(a) shows the function block diagram of our proposal.The second harmonic of the VCO output frequency is obtainedand peaked at the common node of the cross-coupled pairwith shunt-peaking technique. By mixing the differentialfundamental signals ( and ) with the second harmonic( ), two frequency terms ( ) can be produced at theoutput nodes of an inductive-loaded differential mixer. Theinductor load ( ) as well as the parasitic capacitance of themixer acts as a bandpass filter (BPF) that peaks at frequency

and filters out the fundamental frequency ( ). By doing so,it accomplishes the desired frequency tripling.

The proposed circuit is shown in Fig. 1(b). To widenthe operation frequency range and improve the phase noiseperformance after frequency tripling, the VCO itself needs awide tuning range as well as good phase noise. The capacitancetuning ratio of a VCO can be expressed as

(1)

where and are the maximum and minimumvaractor capacitances, respectively, and is the fixedparasitic capacitance. It derives from (1) that the frequencytuning range can be maximized by either increasing thevaractor capacitance or decreasing the parasitic capacitance.Nevertheless, a higher varactor capacitance generally resultsin degradation of the quality factor of the LC-tank. Therefore,

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TSAI et al.: CMOS VOLTAGE CONTROLLED OSCILLATOR AND FREQUENCY TRIPLER 493

Fig. 1. (a) Function block diagram and (b) the circuit schematic of the proposed VCO and frequency tripler integration.

in our VCO design, the NMOS-only cross-coupled pair( – ) is adopted for negative resistance generation. Suchan NMOS-only structure introduces fewer parasitic capacitanceas compared to the CMOS structure or the PMOS-onlystructure. Accumulation-type MOS varactors ( - )are used to provide the appropriate ratio(401 fF/144 fF) with a good quality factor ( ) at 8 GHz. Theinductor is 1.62 nH with a quality factor of 13.6 at 8 GHz.This particular topology requires a lower operation frequency(i.e., 7.3–9 GHz) for achieving an output signal ranging from22–27 GHz. Therefore, it has a greater possibility of attainingthe tuning range specification of the VCO as compared to thatof a VCO directly operated around the 24 GHz band. The phasenoise can be optimized according to the operation frequencyrange at around 8 GHz instead of 24 GHz, in which the passivecomponents have a better quality factor. The common nodein this VCO core provides the output voltage , whichis peaked by a resonator composed of and the parasiticcapacitance connected to the source ends of the cross-coupledpair ( – ). This shunt-peaking for second harmonic canalso improve phase noise of VCO by noise filtering [7]. Acommon source buffer is also integrated to drive the 50instrument load when taking measurements.

A single-balanced mixer is employed as the frequencytripler. As shown in Fig. 1(b), this mixer includes an RFtransconductance stage ( ), an LO switch pair ( – ), anoutput inductor ( ), and a latch transistor pair ( – ). Thelatch transistor pair is designed for IF switching enhancement.The inductor resonates with the total parasitic capacitance( ) contributed by the switching stage, latch transistor pair,and output buffers. This - resonator acts as a BPF thatprovides a high load impedance of three times the VCOfrequency and filters out other unwanted signals. Finally,to facilitate measurement, output buffers with a two-stageconfiguration are also integrated to drive the instrument load.

III. EXPERIMENTAL RESULTS

The photograph of the complete integrated circuit is shownin Fig. 2. The VCO core consumes 3 mW at a supply voltage of0.9 V and the frequency multiplier consumes 8.1 mW at 1.2 V.The total chip area is 0.72 mm 0.91 mm. As shown in Fig. 3,the measured tuning ranges and phase noises at 1 MHz offset

Fig. 2. Vhip photograph of the proposed circuit.

Fig. 3. Simulation and measured results of tuning range and phase noise versusthe tuning voltage of the proposed circuit.

over the entire tuning range (from 0 to 1.8 V) are comparedwith the simulation results. Fig. 4 shows the output power ofthe frequency tripler ( ) as well as that of the sub-harmonics( and ) from the output over the entire frequency range.After calibrating the cable loss, the power level of the triplerfrequency ( ) ranges from to . The powersuppression of the VCO frequency ( ) at the output is evenbetter than 18 dB in the worst case. The phase noises of theVCO core and frequency multiplier were measured by a signalsource analyzer set (Agilent E5052B + E5053A). Fig. 5 showsthe measured phase noise at . At a frequency offsetof 1 MHz from the center frequency, the phase noise of theVCO is whereas that of the frequency tripler is

. The noise degradation of 11 dB is close to thetheoretical value of 9.5 dB estimated for the tripler frequencymultiplication.

Table I compares the performance of our proposed designwith previously reported works. A VCO in [8] has the widesttuning range; however, its power consumption is quite high. Thetransformer-based current-reused VCO [9] has a wide tuning

494 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 21, NO. 9, SEPTEMBER 2011

Fig. 4. Measured power levels of the tripler frequency (�� ) and the sub-har-monic signals (�� and � ) at the frequency tripler output.

Fig. 5. Measured phase noises of the VCO and the frequency tripler at� �

� �.

range and low power consumption; however, it has higher phasenoise, possibly because of the low quality factor of the varactorsat 24 GHz. Among the previous works that integrate a VCO anda frequency multiplier [3]–[6], our design has the widest tuningrange as well as the best .

IV. CONCLUSION

Using a 0.18 CMOS process, we have successfullypresented a compact integration design consisting of a wide-tuning VCO and a wideband frequency tripler for a 22–27 GHzLO generator. The integration of a VCO core with a triplerwithout inter buffer stages can save the power consumption.MOS varactors operated at a lower frequency (8 GHz) havewider tuning capabilities but less quality factor degradation,and peaking the second harmonic of VCO with shunt-peakingtechnique [7] can also improve phase noise. Therefore, thedesigned VCO core can be optimized with a wider tuningrange and better phase noise performance, resulting in highperformance frequency tripler and overall circuit [10]. Finally,

of this proposal for mm-wave LO applications iscalculated to be a remarkable value of .

TABLE IPERFORMANCE COMPARISON WITH THE REPORTED WORKS

REFERENCES

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