cmos based spad arrays

14
CMOS based SPAD Arrays Michael Keller – Heidelberg University 27.09.2019, Bergen, Lecture week on “Imaging with particles”

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Page 1: CMOS based SPAD Arrays

CMOS based SPAD Arrays

Michael Keller – Heidelberg University27.09.2019, Bergen, Lecture week on “Imaging with particles”

Page 2: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 2

Single Photon Avalanche Diode

p+

n+

-+eh

pp-

Absorption Multiplication

E=ℎν

E

x

HV

Va VbRquench

● Sensitive to single photons in the visible range of light

● Good quantum efficiency (~ 50% @ 450nm)

● Excellent timing resolution (O ~ 100ps)

● Micro structured on silicon→ combine several SPADs to arrays

Page 3: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 3

SiPM: Silicon Photon Multiplier

● SPADs and the dedicated readout logic are on independent chips

● SPADs are connected in parallel → combined signal is readout

SPAD Array

Readout Chip

Va

Vb

Amp. Logic

DAQ- System

Page 4: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 4

CMOS based SPAD Arrays

● Technology allows to mix SPADs and active MOS devices

● SPADs and readout combined on a single chip

Page 5: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 5

CMOS SPADs vs. SiPMs

● Drawbacks of CMOS SPADs:

● Dark count rate (DCR) is worse due to more complex processing or not yet fully optimized SPAD design

● Fill factor is decreased due to electronics in cells (70% or more is possible)

● Advantages of CMOS SPADs:

● Light detection and tailor made readout on a single chip→ Simple mechanics, lower cost (suitable for mass production)

● Each SPAD is read out individual→ Single photon detection is simple (no amplifier needed)→ Low power readout→ Spacial resolution down to SPAD level

● Bad SPADs can be turned off to reduce overall noise (Trade-off between active area and noise)

Page 6: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 6

Present sensor

IDP2 Chip:● 88 x 88 = 7744 pixels● Pixel Size: 56 x 56 µm²● Fill factor ~ 55% → 12mm² active

area

5mm

6mm

Vdd

-HV

Recharge

& Kill Acc.Hit

Buffer

&

ResetLoad

Ser. Out

Clk

QD

Kill

Hit WidthPixel Logic:

Kill Bit

Wired-Or

Ser. In

● Only digital output signals● Full frame readout:

2D binary images are recorded● Frame rates up to 400kHz ● Fast hit wired-or for triggering:

FWHM ~120 ps

Page 7: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 7

Measurement setup

Simple mechanics, only supply voltage as analogue bias. FPGA for data collection.

Page 8: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 8

IDP2: Application so far...

CMOS SPADs forrare event searches

with liquid noble gases?

Single photon inteference: Florescence Correlation Spectroscopy:

Page 9: CMOS based SPAD Arrays

LIDINE 2019, Michael Keller 9

DCR vs. Temperature

● Thermal noise is dominant until 180K

● For lower temperatures tunnelling noise is the main noise source

● SPADs are in the low-noise regime for all liquid noble gases

● For OV = 1V noise is well below 100 Hz/mm²

LArLKr

LAr

LXe

Page 10: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 10

Low photon flux detector

● High fill factor ~80%: SPADs grouped to macro pixel

● Mask bit for each SPAD cell to keep noise low.

● Low Power: Datadriven readout, no static DC current.

● Different SPAD geometries to optimize fill factor vs DCR ratio

● Cost estimation for mass production: ~10€/cm²

● Application: Rare event searches with liquid noble gases

Page 11: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 11

Time-of-Flight camera

● Measures timing of an inivitual photons of instantaneous burst of many

● Dual Slope Time to digital converter (TDC) with time resolution FWHM ~ 100ps

● Timing relative to a start signal

● Full frame readout: Row wise with zero suppressed row select logic

● Application: ToF camera, LIDAR, fluorescence lifetime imagine

Page 12: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 12

Optical fibre readout

SPAD SPAD SPAD SPAD

Group Group

group assigning

Readout Block

Readout assigning

● Pixel assinging is freely programmable → good alignment to optical fibre

● Application: Readout of optical fibre or cell tracing in biology

● Measures timing (~100ps) and amplitude of a photon cluster emitted by an optical fibre

● Several pixels are assigned to a group readout structure

Page 13: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 13

XY-Readout

Hit

Logic

X<0:2>Y<0:2>

Err

or

Hit

Decoder

Deco

der

● Photon hit is converted in binary decoded x and y address of respective pixel

● Double hits not allowed → can be vetoed with error flag

● Very simple architecture

● Higher rates: divide in several quadrants → also done in upcoming submission

● Application: Low photon flux experiments, particle tracking

Page 14: CMOS based SPAD Arrays

HighRR lecture week on imaging with particles, Michael Keller 14

Summary

CMOS based SPAD arrays are power full but rather unknown detector technology for single photons in the visible range of light:

● Simple system: Detection and readout combined on one chip

● Tailor made readout architecture, designed for application (submission of our new designs in next few weeks!)

● Spatial resolution down to the SPAD level and excellent timing resolution (from SPAD, expect < 1ns)

● Low power single photon detection (NO amp needed!)

● Low cost and simple mechanics