cmos 138 ghz low-power active mixer with branch-line coupler

2
CMOS 138 GHz low-power active mixer with branch-line coupler Dong-Hyun Kim and Jae-Sung Rieh A 138 GHz down-conversion mixer with a branch-line coupler has been developed based on a 90 nm CMOS technology. The fabricated mixer shows a differential conversion gain of 3.7 dB with the mixer core drawing a current 0.66 mA from a 1.2 V supply. The 1 dB gain compression point is estimated to be larger than 26 dBm. The mixer occupies 0.61 × 0.62 mm 2 of chip area excluding pads. Introduction: The continued performance improvement of Si devices has now made CMOS-based circuits operating over 100 GHz a quite feasible option [1–4]. This has triggered a rapidly growing interest to explore such frequencies for various applications, such as communi- cation and imaging. The frequency band around 140 GHz is of particular interest as it shows low attenuation in the earth’s atmosphere and thus is suitable for applications that require long-range propagation. Mixers conduct essential functions in transceivers and the required performance still needs to be met at the raised frequency, yet with limited available device gain and model accuracy, which makes the design a challenging task. There have been reports on active mixers operating beyond 100 GHz with positive conversion gain, but most of them involved huge power dissipation [1–3]. A low-power approach has been reported, but only with a rather high LO-RF leakage due to the balun employed [4]. Passive mixers can provide mixing function with zero power con- sumption at raised frequency, but they inherently lack conversion gain. In this Letter, a low-power CMOS active mixer operating at 138 GHz with a positive gain is proposed. Circuit design: The mixer is based on the common-gate quadrature- balanced topology using a branch-line coupler, as shown in Fig. 1. The branch-line coupler converts the separate RF and LO input signals into two RF-LO combined signals, which are injected into M1 and M2 that basically operate as independent mixers and generate IF signals. M3 M2 M4 IF– RF branch-line coupler C2 C1 LO M1 VG A B L1 L2 IF IF+ Fig. 1 Schematic of 140 GHz down-conversion mixer The adopted topology benefits from some valuable advantages over the widely adopted Gilbert-cell mixers [1–3]. First, it involves a lower number of stacks which results in sufficient voltage headroom. This would lead to improved linearity for a given supply voltage, or provide an option to lower the supply voltage for reduced power con- sumption while maintaining an acceptable conversion gain. Secondly, the common-gate configuration of the core transistors tends to show broadband matching characteristics, which alleviates the need for an extra matching network leading to a compact chip size. Further, its broadband matching will improve the robustness against PVT (process, voltage, temperature) variations and model mismatch, which is increasingly desired as frequency increases. Finally, the topology is more compatible with single-ended adjacent circuit blocks. In high-frequency bands beyond 100 GHz, VCOs often employ push– push topology or a frequency multiplier at the output, which results in a single-ended LO. Many LNAs are implemented in a single- ended configuration at raised frequency as well, delivering single- ended RF to the following mixers. These trends favour single-ended mixer input nodes. One general drawback of the topology is the large dimension of the branch-line coupler, which is not suitable for on-chip integration if the frequency is not high enough. This was the major reason why this topology has rarely been adopted for monolithic chips operating at rela- tively low frequency. Around 140 GHz, however, a quarter wavelength line, equivalent to one edge of the coupler, becomes shorter than 300 mm on silicon substrates and can be even further reduced with special techniques such as capacitive open-stub loading [5]. In this work, the open-stub loading technique was employed for an additional reduction of the vertical dimension by a factor of 2/3, resulting in an edge length around 180 mm. This value is quite acceptable for on-chip integration, clearly showing the feasibility of employing branch-line top- ology for mixers at this frequency band. The operation of the proposed mixer can be briefly described as follows. Single-ended RF and LO voltage signals, as represented by (1), are separately injected into the two input nodes of the branch-line coupler: V RF = A RF cos v RF t, V LO = A LO cos v LO t (1) The two signals are subsequently coupled and show up at the output node A and B of the coupler as combined signals, the magnitudes of which are suppressed by a factor of p 2 and the phases are split by 908. Then, the signals at nodes A and B can be respectively expressed as: V A =− A RF 2 sin v RF t A LO 2 cos v LO t, V B =− A RF 2 cos v RF t A LO 2 sin v LO t (2) The two hybrid signals are then injected into the source of the transistors M1 and M2, and the drain currents provide the product of the RF and LO signals owing to their quadratic relation to the gate–source voltage, gen- erating mixed or IF signals. Note that M1 and M2 are biased near the threshold voltage, where the transistor nonlinearity is maximised. The two load inductors (L1, L2) are designed to resonate with parasitic capacitance of the transistors at the intermediate frequency (IF), 4 GHz in this work, serving as an efficient bandpass filter. At the output stage, source follower buffers are employed to provide a 50 V matching to interface with outer circuitry. It is noted that tail current source is replaced by a l/4 short stub in this work, allowing additional voltage headroom and supply voltage reduction. Measurement: The mixer was fabricated in a 90 nm CMOS technology and the die photo of the completed mixer is shown in Fig. 2. It occupies 0.61 × 0.62 mm 2 excluding the pad region. For the measurement, a fre- quency tripler connected with a signal generator provided an RF source around 140 GHz, while a Gunn-diode with10 dBm output power at fixed frequency of 134 GHz was used to generate LO signal for the mixer. A fraction of the RF input was sampled by a directional power coupler connected to a D-band power meter to monitor the RF signal power injected to the mixer. The IF signal was measured with a spec- trum analyser. The measurement was carried out with on-wafer probing, and the losses through the waveguide and probes were carefully calibrated for the final measurement data. Fig. 2 Die photo of mixer Fig. 3 shows the conversion gain of the mixer measured against RF frequency from 136.2 to 140.4 GHz, with bias current of 0.66 mA ELECTRONICS LETTERS 10th May 2012 Vol. 48 No. 10

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Page 1: CMOS 138 GHz low-power active mixer with branch-line coupler

CMOS 138 GHz low-power active mixer withbranch-line coupler

Dong-Hyun Kim and Jae-Sung Rieh

A 138 GHz down-conversion mixer with a branch-line coupler hasbeen developed based on a 90 nm CMOS technology. The fabricatedmixer shows a differential conversion gain of 3.7 dB with the mixercore drawing a current 0.66 mA from a 1.2 V supply. The 1 dB gaincompression point is estimated to be larger than 26 dBm. The mixeroccupies 0.61 × 0.62 mm2 of chip area excluding pads.

Introduction: The continued performance improvement of Si deviceshas now made CMOS-based circuits operating over 100 GHz a quitefeasible option [1–4]. This has triggered a rapidly growing interest toexplore such frequencies for various applications, such as communi-cation and imaging. The frequency band around 140 GHz is of particularinterest as it shows low attenuation in the earth’s atmosphere and thus issuitable for applications that require long-range propagation. Mixersconduct essential functions in transceivers and the required performancestill needs to be met at the raised frequency, yet with limited availabledevice gain and model accuracy, which makes the design a challengingtask. There have been reports on active mixers operating beyond100 GHz with positive conversion gain, but most of them involvedhuge power dissipation [1–3]. A low-power approach has been reported,but only with a rather high LO-RF leakage due to the balun employed[4]. Passive mixers can provide mixing function with zero power con-sumption at raised frequency, but they inherently lack conversiongain. In this Letter, a low-power CMOS active mixer operating at138 GHz with a positive gain is proposed.

Circuit design: The mixer is based on the common-gate quadrature-balanced topology using a branch-line coupler, as shown in Fig. 1.The branch-line coupler converts the separate RF and LO inputsignals into two RF-LO combined signals, which are injected into M1and M2 that basically operate as independent mixers and generate IFsignals.

M3

M2

M4

IF–

RF

branch-linecoupler

C2C1LO

M1

VG

A B

L1 L2

IFIF+

Fig. 1 Schematic of 140 GHz down-conversion mixer

The adopted topology benefits from some valuable advantages overthe widely adopted Gilbert-cell mixers [1–3]. First, it involves a lowernumber of stacks which results in sufficient voltage headroom. Thiswould lead to improved linearity for a given supply voltage, orprovide an option to lower the supply voltage for reduced power con-sumption while maintaining an acceptable conversion gain. Secondly,the common-gate configuration of the core transistors tends to showbroadband matching characteristics, which alleviates the need for anextra matching network leading to a compact chip size. Further, itsbroadband matching will improve the robustness against PVT(process, voltage, temperature) variations and model mismatch, whichis increasingly desired as frequency increases. Finally, the topologyis more compatible with single-ended adjacent circuit blocks. Inhigh-frequency bands beyond 100 GHz, VCOs often employ push–push topology or a frequency multiplier at the output, which resultsin a single-ended LO. Many LNAs are implemented in a single-ended configuration at raised frequency as well, delivering single-ended RF to the following mixers. These trends favour single-endedmixer input nodes.

ELECTRONICS LETTERS 10th May 2012 Vol. 48

One general drawback of the topology is the large dimension of thebranch-line coupler, which is not suitable for on-chip integration if thefrequency is not high enough. This was the major reason why thistopology has rarely been adopted for monolithic chips operating at rela-tively low frequency. Around 140 GHz, however, a quarter wavelengthline, equivalent to one edge of the coupler, becomes shorter than300 mm on silicon substrates and can be even further reduced withspecial techniques such as capacitive open-stub loading [5]. In thiswork, the open-stub loading technique was employed for an additionalreduction of the vertical dimension by a factor of 2/3, resulting in anedge length around 180 mm. This value is quite acceptable for on-chipintegration, clearly showing the feasibility of employing branch-line top-ology for mixers at this frequency band.

The operation of the proposed mixer can be briefly described asfollows. Single-ended RF and LO voltage signals, as represented by(1), are separately injected into the two input nodes of the branch-linecoupler:

VRF = ARF cosvRF t, VLO = ALO cosvLOt (1)

The two signals are subsequently coupled and show up at the outputnode A and B of the coupler as combined signals, the magnitudes ofwhich are suppressed by a factor of

p2 and the phases are split by

908. Then, the signals at nodes A and B can be respectively expressed as:

VA = −ARF��

2√ sinvRF t − ALO

��

2√ cosvLOt,

VB = −ARF��

2√ cosvRF t − ALO

��

2√ sinvLOt

(2)

The two hybrid signals are then injected into the source of the transistorsM1 and M2, and the drain currents provide the product of the RF and LOsignals owing to their quadratic relation to the gate–source voltage, gen-erating mixed or IF signals. Note that M1 and M2 are biased near thethreshold voltage, where the transistor nonlinearity is maximised. Thetwo load inductors (L1, L2) are designed to resonate with parasiticcapacitance of the transistors at the intermediate frequency (IF),4 GHz in this work, serving as an efficient bandpass filter. At theoutput stage, source follower buffers are employed to provide a 50 V

matching to interface with outer circuitry. It is noted that tail currentsource is replaced by a l/4 short stub in this work, allowing additionalvoltage headroom and supply voltage reduction.

Measurement: The mixer was fabricated in a 90 nm CMOS technologyand the die photo of the completed mixer is shown in Fig. 2. It occupies0.61 × 0.62 mm2 excluding the pad region. For the measurement, a fre-quency tripler connected with a signal generator provided an RF sourcearound 140 GHz, while a Gunn-diode with10 dBm output power at fixedfrequency of 134 GHz was used to generate LO signal for the mixer.A fraction of the RF input was sampled by a directional powercoupler connected to a D-band power meter to monitor the RF signalpower injected to the mixer. The IF signal was measured with a spec-trum analyser. The measurement was carried out with on-waferprobing, and the losses through the waveguide and probes were carefullycalibrated for the final measurement data.

Fig. 2 Die photo of mixer

Fig. 3 shows the conversion gain of the mixer measured against RFfrequency from 136.2 to 140.4 GHz, with bias current of 0.66 mA

No. 10

Page 2: CMOS 138 GHz low-power active mixer with branch-line coupler

drawn from a 1.2 V supply. Current through the buffer is 1.6 mA. LOfrequency and power were fixed at 134 GHz and 10 dBm, respectively.The peak conversion gain of 0.7 dB was observed at 138 GHz of RF fre-quency. It also shows a very good agreement with simulation. Note thatthe measurement is single-ended, with one of the differential outputports terminated with a 50 V resistor, and the differential conversiongain is expected to be 3.7 dB. Linearity of the mixer was also measuredby increasing RF input power up to 27 dBm at 138 GHz, as shown inFig. 4. P21dB is estimated to be larger than 26 dBm, while input powerlevel was limited by the measurement environment. Compared to theprior arts [1–4], the proposed mixer shows competitive conversiongain as well as linearity with low DC power consumption.

136–25

–20 measured conversion gain

LO freq. = 134 GHzLO power = 10 dBm

simulated conversion gain

–15

–10

–5

5

0

137 138

frequency, GHz

conv

ersi

on g

ain,

dB

139 140

Fig. 3 Measured conversion gain against RF frequency

–25

–25

–20

–10

–5

0

–15

–30

–3

–2

0

1

2

–1

–4–20 –15

input power, dBm–10 –5 0

symbol: measuredline: simulated

RF freq. = 138 GHzLO freq. = 134 GHzLO power = 0 dBm

outp

ut p

ower

, dB

m

conv

ersi

on g

ain,

dB

Fig. 4 Measured linearity characteristics

Conclusion: A 138 GHz down-conversion mixer employing a branch-line coupler has been developed in a 90 nm RFCMOS technology. The

ELECTRO

proposed mixer will serve as an excellent candidate for high-frequencyand low-power applications.

Acknowledgment: This work was supported by the IT R&D programmeof MKE/KEIT. [KI001855, Wireless Local Area CommunicationSystems on Tera Hertz Band] and Samsung Electronics.

# The Institution of Engineering and Technology 20127 February 2012doi: 10.1049/el.2012.0402One or more of the Figures in this Letter are available in colour online.

Dong-Hyun Kim and Jae-Sung Rieh (School of Electrical Engineering,Korea University, 5-1 Anam-dong, Seongbuk-gu, Seoul, Republic ofKorea)

References

1 Pfeiffer, U.R., Ojefors, E., and Yan, Z.: ‘A SiGe quadrature transmitterand receiver chipset for emerging high-frequency applications at160 GHz’. IEEE Int. Solid-State Circuit Conf., Dig. Tech. Pprs,San Francisco, CA, USA, 2010, pp. 416–417

2 Schmalz, K., Winkler, W., Borngra, X., Ber, J., Debski, W., Heinemann,B., and Scheytt, J.C.: ‘A subharmonic receiver in SiGe technology for122-GHz sensor applications’, IEEE J. Solid-State Circuits, 2009, 45,(9), pp. 1644–1656

3 Laskin, E., Chvalier, P., Sautreuil, B., and Voinigescu, S.P.: ‘A 140-GHzdouble-sideband transceiver with amplitude and frequency modulationoperating over a few meters’. IEEE Bipolar/BiCMOS and TechnologyMeeting, Capri, Italy, 2009, pp. 178–181

4 Kim, D.-H., and Rieh, J.-S.: ‘A SiGe 140-GHz low power Gm-boosteddown-conversion mixer’. IEEE Asia Pacific Microwave Conf.,Melbourne, Australia, 2011, pp. 1–4

5 Kim, D.-H., and Rieh, J.-S.: ‘A 60-GHz wideband quadrature-balancedmixer based on 0.13-mm RFCMOS technology’, IEEE Microw.Wirel. Compon. Lett., 2011, 21, (4), pp. 215–217

NICS LETTERS 10th May 2012 Vol. 48 No. 10