closed-loop control of dc–dc dual active-bridge converters driving

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    Closed-Loop Control of DC–DC Dual

    Active-Bridge Converters DrivingSingle-Phase Inverters

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     Abstract

      A solid-state transformer (SST) is a high-frequency power electronic converter that is used as a

    distribution power transformer. A common three-stage configuration of an SST consists of ac– 

    dc rectifier isolated dc–dc dual-active-bridge (!A") converter and dc–ac inverter. This study

    addresses the controller design issue for a dc–dc !A" converter when driving a regulated

    single-phase dc–ac inverter. Since the switching frequency of the inverter stage is much

    higher than that of the !A" stage the single phase inverter is modeled as a double-line-

    frequency (e.g. #$% &') current sin. The effect of #$%-&' current by the single-phase

    inverter is studied. The limitation of a *-controller low gain at #$% &' is investigated. Two

    methods are proposed to improve the regulation of the output voltage of !A" converters. The

    first one uses a bands top filter and feed forward while the second method uses an additional

     proportional-resonant controller in the feedbac loop. Theoretical analysis simulation and

    e+periment results are provided.

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    Existing syste•

    The multistage ac–dc–ac–dc–ac configuration is one of many feasible

    single-phase SST topologies ,#–,. An SST is used to interface between

    a medium-voltage distribution networ (e.g. /.$ 0) and a low-voltage

    distribution networ (e.g. $% 0). The output voltage and the output

    current of the inverter stage are grid frequency while the input and

    output voltages of the dual-active-bridge (!A") converter stage are dc.

    As a result the instantaneous output power fluctuates at twice the line

    frequency and there is significant second-order harmonic current at the

    input side of the inverter stage.

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    Existing syste

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    Proposed syste

    • 1hen a dc–dc !A" converter is driving such an inverter it is common to

    select a sufficiently large output capacitor ban to absorb the double-

    frequency harmonic current and to minimi'e the output voltage ripple.

    "ecause the second-order harmonic frequency is relatively low this might

    result in a large capacitor ban at the output side of the !A" converter

    which increases cost weight and volume. 2urthermore large electrolytic

    capacitors are one ma3or factor affecting the reliability of power

    converters.

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    Cont!!

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    S"S#E$ C%&'I()*A#I%& A&DAPP*%+I$A#I%&

    • The schematic of a single-phase SST is shown in 2ig. #. The first

    stage is a single-phase active front-end rectifier which converts the

    grid ac voltage to a fi+ed dc voltage. The second stage is an isolated

    dc–dc !A" converter which transfers power between two dc buses

    with a high-frequency transformer.

    • The 4output5 dc bus is defined as the bus whose voltage is regulated

     by the !A" converter which is the low-voltage bus on the right in

    2ig. #. The last stage is a single-phase dc–ac inverter which generates

    an ac sinusoidal voltage as the SST6s output voltage.

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    Cont !!

    •  #he conventional po,er o, diagra of a ultistage SS# is given in 'ig! .! Ideally/ the

    voltage and current at 0oth the input of the recti1er and the output of the inverter are line

    fre2uency/ e!g!/ 34 56! #herefore/ the input po,er of the recti1er and the output po,er of the

    inverter consist ainly of average po,er 7,hich is in dc8 and ripple po,er 7,hich is the

    second-order haronic content at 9.4 568!

    • ,here V represents input/output RMS voltage, I represents input:output *$S current/ ωs =

    2πfs , and fs = 60 Hz is te grid fre2uency! %n the other hand/ the conventional control

    ethod for a dc–dc DAB converter can only process dc po,er! #his eans that the t,o dc

    0uses ust a0sor0 the 9.4 56 ripple po,er/ as visuali6ed in 'ig! . 7solid lines represent dc

    po,er ,hile dash lines represent 9.4 56 ripple po,er8! Because 9.4 56 is a relatively lo,

    fre2uency/ large 0us capacitance is needed to reduce the 0us voltage uctuation and achieve

    su;ciently high ripple current ratings!

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    Assuptions

    • The focus of this study is on the !A" converters in SSTs the following

    assumptions are made7

    #) The rectifier stage has been well designed to provide a stable input dc voltage

    for the !A" stage8

    $) The inverter stage has been well designed to provide a #$% 0 sinusoidal output

    voltage at 9% &'8 and

    :) The switching frequency of the inverter is higher than that of the !A" converter

    and the switching frequencies of all converter stages are much higher than the

    grid frequency

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    $%DEL A&AL"SISThe control-to-output transfer function of a

    !A" converter is given by

    ;iven the circuit parameters described in

    Tables * ** and ***

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    Cont!!

    The power transferred by a !A" converter is given by

    where vs is the input voltage. Given a specified power rating, a range of preferred

     phase-shift ratio d, and a specific range of soft switching the product of transformer

    leaage inductance  Lt , and switching frequency fs is fixed. Therefore, increase of fs

    would result in decrease of Lt , canceling the effect of increasing switching frequency.

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     #

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    Cont=

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    SI$)LA#I%& A&D E+PE*I$EAL *ES)L#S

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    C%&CL)SI%&

    • The cascaded connection of power converters poses a challenge for the closed

    loop controller design. A single-phase inverter has significant second-order (#$%

    &') harmonic current in its input side. A conventional * controller has limited

     bandwidth at #$% &' because of the relatively low switching frequency of the

    !A" converter. 1hat is more simply increasing switching frequency would not

    result in higher bandwidth. Two control methods are proposed to solve the

    aforementioned challenge without using a large dc bus capacitor between the

    !A" converter and the inverter. Simulation and e+perimental results confirm the

    effectiveness of the proposed methods. The *-= controller is more robust to

    changing load power factor whereas the feed forward method provides better

    transient response. "oth achieve ripple reduction similar to increasing bus

    capacitance by a factor of four.

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    *E'E*E&CES,# A. &uang >. ?row ;. &eydt @. heng and S. !ale 4The future renewable electric energy delivery and management (freedm) system7 The energy

    internet5 Proc. IEEE, vol. 99, no. , pp. !!"#$, %an. &'.

    ,$ B. =. =onan S. !. Sudhoff S. 2. ;lover and !. C. ;alloway 4A power electronic-based distribution transformer5  IEEE Power Eng. (ev., vol. &&, no. :

     pp. 9#–9# >ar. $%%$.

    ,: S. "hattacharya T. hao ;.1ang S. !utta S. "aeD.!u ". arhideh E. hou and A. F. &uang 4!esign and development of generation-* silicon

     based solid state transformer5 in Proc. IEEE )ppl. Power Electron. *onf. Expo., +e. &'', pp. ---"-!.  

    , &. Fin and @. Gimball 4A comparative efficiency study of silicon-based solid state transformers5 in Proc. IEEE Energ. *onvers. *ongr. Expo., Sep. $%#%

     pp. #HI–#9:.

    ,H !. &olmes T. Cipo ". >c;rath and 1. Gong 4

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