charging effect on conductance of magnetron sputtered si ... · the in uence of charging and...

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Copyright copy 2010 American Scientific PublishersAll rights reservedPrinted in the United States of America

Nanoscience andNanotechnology LettersVol 2 226ndash230 2010

Charging Effect on Conductance of MagnetronSputtered Si Nanocrystals Embedded SiO2 Films

Wa Li Zhang1 Sam Zhang1lowast Ming Yang2 Zhen Liu2 and Tu Pei Chen21School of Mechanical and Aerospace Engineering Nanyang Technological University

50 Nanyang Avenue Singapore 6397982School of Electrical and Electronic Engineering Nanyang Technological University

50 Nanyang Avenue Singapore 639798

Silicon nanocrystals are synthesized by reactive magnetron sputtering to distribute throughout thegate oxide layer The influence of charging and discharging of nc-Si on current conduction behaviorof the film is investigated by currentndashvoltage (IndashV ) characteristics It is found that a negative elec-tric stress can strongly charge the nc-Si suppressing the current conduction and increasing theDC resistance of the films while a positive electric stress can discharge the nc-Si leading to therecovery of the conductance

Keywords Si Nanocrystals Magnetron Sputtering Charging Effect Conductance

Amorphous SiO2 films embedded with Si nanocrystals(nc-Sia-SiO2 have been under intensive research becauseof its potential application in quantum dot non-volatileflash memory1 The memory effect is based on the charg-ing and discharging of the nc-Si embedded in the gateoxide2 Charging and discharging in nc-Si usually leadto the flat-band voltage shifts in the capacitancendashvoltagecharacteristics34 The charging and discharging of thenc-Si are carried out by means of carrier tunneling betweenthe adjacent nc-Si56 On the other hand it has been shownthat the charging and discharging of the nc-Si will inturn influence the carrier injection and transportation inthe dielectric oxide layer7 Some relevant research on thisissue has been reported89 but usually the studies werecarried out with memory-cell structures with the nano-crystals confined in a narrow layer embedded in the gatedielectrics It would be interesting to examine the chargingand discharging in the nc-Si that distribute throughout thegate dielectric For the MOS structures with such an nc-Si distribution charging and discharging of the nc-Si areexpected to occur easily and thus they will have a signif-icant impact on the electrical characteristics of the MOSstructures In this letter we report reproducible chargingand discharging induced decreaserecovery in conductanceof nc-Sia-SiO2 films It is found that the charging of nc-Siremarkably reduces the total conductance and capacitanceof the films while the discharging of nc-Si increases theconductance and capacitance

lowastAuthor to whom correspondence should be addressed

Si-rich oxide films were deposited on p-type (100) Siwafers by reactive radio frequency (136 MHz 200 W)magnetron sputtering of a pure Si target (4 inch 99999in purity) in a gas mixture of argon and oxygen Theprocess pressure was set at 05 Pa the Ar and oxygenflow rate were set at 800 and 09 sccm respectively Theresultant film was sim50 nm in thickness and sim42 at(or SiO14 in Si concentration as analyzed by X-ray photo-electron spectroscopy Thermal annealing was carried outin N2 ambient at 1050 C for 30 minutes to induce for-mation of nc-Si10 To fabricate the MOS structure thebackside of the sample was sputtered with a 1 m alu-minum layer as the back contact Round-shaped Al topelectrode with a thickness of 200 nm was sputtered onthe surface of the sample through a shadow hard maskwith a pad radius of 160 m The formation of the nc-Siwas confirmed using Transmission Electron Microscope(TEM JEM 2010) X-ray photoelectron spectroscopy anal-ysis was performed using a Kratos-Axis spectrometerwith monochromatic Al K (148671 eV) X-ray radia-tion after sputtering off the initial surface contaminationlayer with the built-in Ar+ ions gun for 5 mins (10 nm)The currentndashvoltage (IndashV ) and capacitancendashvoltage (CndashV )measurements were carried out at room temperature witha Keithley 4200 semiconductor characterization systemThe formation of nanoscale particles in a network of

amorphous SiO2 matrix are confirmed with TEM as shownin Figure 1 High density and homogeneously distributedSi nanoparticles of nearly spherical shape in the amor-phous matrix of SiO2 are clearly visible in the TEM

226 Nanosci Nanotechnol Lett 2010 Vol 2 No 3 1941-490020102226005 doi101166nnl20101074


IP 1556918390Fri 14 Jan 2011 090227

Zhang et al Charging Effect on Conductance of Magnetron Sputtered Si Nanocrystals Embedded SiO2 Films

Fig 1 TEM image of the SiO14 samples The inset shows the HRTEMimage of an individual Si nanocrystal

micrograph The corresponding HRTEM image shows thatthese nanoparticles have well defined atomic lattices indi-cating the formation of nc-Si Their size ranged from 4 to7 nm resulting in a mean crystal size of 5 nm in diameterFigure 2 shows the IndashV characteristics of the MOS

structure based on the nc-SiSiO2 films before (ie thevirgin sample) and after applying electric stress of minus10 Vand 10 V for 5 s Note that the maximum voltage ofthe IndashV measurement was set to 5 V which was lowenough to avoid any charging or discharging effect causedby the electrical measurement itself As can be seen inFigure 2 the repeated measurements did not cause signif-icant changes in the IndashV characteristic This indicates thatno significant charging or discharging taking place in thenanocrystals during the IndashV measurement thus the conduc-tion of the films was not affect by the measurement itselfHowever after application of electric stress of minus10 V for5 s the IndashV characteristic changed drastically As can beseen in Figure 2 the current was reduced by more than10 times upon negative electric stress The reduction inthe gate current indicated a large increase in DC resistance(or decrease in the conductance) in the film However the

Fig 2 IndashV characteristics of the MOS structure before (ie the virgincase) and after applying electric stress of minus10 V and +10 V to MOSstructure for 5 s

gate current recovered back to the virgin state after appli-cation of 10 V for 5 s on the same pad indicating an elec-tric field-induced decrease in DC resistance (or increase inthe conductance)The increase in the DC resistance can be explained in

terms of breaking of some tunneling paths due to charg-ing up of the nc-Si caused by the electric stress In thenc-Si distributed region the electron conduction can takeplace between adjacent uncharged nc-Si via tunneling orother mechanism under external electric field11 And alarge number of such nc-Si embedded in the oxide canform many conductive tunneling paths which significantlyincrease the conductance of the SiO2 as shown in Figure 3Charge trapping occurs when the injected carriers aretransported along the tunneling paths The injected car-riers could be trapped in the individual Si nanocrystalsOn the other hand it is well known that nc-SiSiO2

films contain high density of oxygen-related defects at thenc-Si SiO2 interface12 such as neutral oxygen vacancy(O3 equivSindashSiequivO3 where represents the bonds to three oxy-gen atoms)13 and non-bridging oxygen hole center (equivSindashO where represents an unpaired electron)14 The carrierscould also be trapped in these defects15 In either casecharge trapping is associated with the existence of thenc-Si The charge trapping in turn affects the carriertransport across the oxide layer in a number of waysfirstly charge trapping in an nc-Si or a defect increases theresistance of the tunneling paths involving the nc-Si or thedefect due to the electrostatic interaction of the transportedcarriers with the trapped carriers Secondly the tunnelingpaths related to the charged nc-Si could be broken due toCoulomb blockade effect Therefore charge trapping willsuppress the carrier transport across the oxide layerUnder strong negative stress holes from the p-type Si

substrate and electrons from the Al gate are easily injectedinto the films Some of the injected carriers could betrapped in the nc-Si associated trapping centers leading tothe reduction of the gate current The recovery after appli-cation of positive electric stress is due to the release ofsome of the charges trapped in the trapping centers Underpositive gate stress electrons and holes are injected intothe gate oxide filling the trapping centers On the otherhand some of the holes and electrons trapped under previ-ous negative stress are now pushed back to the Si substrateand the Al gate ldquodefilling the trapping centers Howeverbecause of the low injection efficiency of holes from Alelectrode and electrons from the electron minority p-typeSi substrate the defilling process overwhelms the fillingprocess Thus charged nc-Si associated trapping centersare released leading to the recovery of the tunneling pathsCharging and discharging of these centers under

external electric field have been confirmed by the CndashVcharacteristics as shown in Figure 4 The application ofa negative electrical stress of minus10 V for 5 s leads to alarge positive flat band voltage shift in the CndashV charac-teristic indicating a large amount of electrons trapped in

Nanosci Nanotechnol Lett 2 226ndash230 2010 227


IP 1556918390Fri 14 Jan 2011 090227

Charging Effect on Conductance of Magnetron Sputtered Si Nanocrystals Embedded SiO2 Films Zhang et al

Fig 3 Schematic diagram of the formation of the tunneling paths due to discharging (a) and broken of the tunneling paths due to the charging

these centers On the other hand the flat band voltage shiftcan be recovered by applying of a positive electrical stressof +10 V for 5 sTo examine the influence of the duration of the electric

stress on the chargingdischarging effect a sequence ofelectric stresses of minus10 V were applied on a fresh newpad for 5 s following a second electric stress of minus10 V for300 s after the initial IndashV measurement Figure 5 showsthe IndashV characteristics of the MOS structure before (iethe virgin sample) and after the electric stress The firstminus10 V for 5 s leads to the gate current decrease fromthe order of sim10minus6 A for the virgin case to the order of

sim10minus8 A The second minus10 V for 300 s leads to a furtherdecrease to the order of sim10minus9 A This indicates that anincrease in the duration of electric stress leads to a furthercharging up of the nc-Si resulting in a further decrease inconductance of the filmTo examine the influence of the magnitude of the elec-

tric stress on the chargingdischarging effect a sequenceof electric stresses of minus15 V and 15 V were applied on afresh new pad after the initial IndashV measurement Figure 6shows the IndashV characteristics of the MOS structure before(ie the virgin sample) and after applying the electricstress of minus15 V and 15 V for 5 s The IndashV curve after

228 Nanosci Nanotechnol Lett 2 226ndash230 2010


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Fig 4 Flat band voltage shift of the SiO2 film embedded with nc-Sibefore (ie the virgin sample) and after application of opposite electricalstress minus10 V and +10 V for 5 s

minus10 V for 5 s is also presented for comparison The appli-cation of minus15 V on the pad leads to a further decrease inthe current comparing with minus10 V It is observed that thecurrent is decreased from the order of 10minus5 A for the vir-gin sample to the order of 10minus7 A for the sample stressedat minus10 V for 5 s and the current is further decreased tothe order of 10minus9 A after minus15 V for 5 s This indicatesthat an increase in the magnitude of electrical stress leadsto a further charging up of the nc-Si resulting in a furtherdecrease in the conductance However a second applica-tion of 15 V can release the charged nc-Si resulting inrecovery of the conductanceThe charging and discharging of the nc-Si associ-

ated trapping centers under external stress is repeatableFigure 7 shows the IndashV characteristics of the devices after10 cyclesrsquo of minus15 V and 15 V for 5 s on the devices Thegate current is stable at around the order of 10minus7 sim 10minus6

A for the discharged samples under positive stress and at

Fig 5 IndashV characteristics of the MOS structure before (ie the virginsample) and after applying electric stress of minus10 V to the MOS structurefor 5 s and a second electrical stress of minus10 V for 300 s

Fig 6 IndashV characteristics of the MOS structure before (ie the virginsample) after applying electric stress of minus10 V minus15 V and +15 V tothe MOS structure for 5 s

around the order of 10minus9 sim 10minus8 A for the charged sam-ples under negative stress The phenomenon that the oxideresistance (or oxide conduction) can be changed by theexternal electric stress can be used in a new ldquotwo-terminalmemoryrdquo device where information is stored as a high- orlow-resistance state The memory could be programmedwith a negative electrical stress for a short duration anderased with a positive electrical stressIn conclusion application of negative electric stress

leads to charge up of the nc-Si while positive electricstress leads to the release of the charges The chargingand discharging of the nc-Si strongly influence the con-ductance of the films ie the charge trapping leads tostrong decrease in the conductance of the oxide while thedischarging leads to the recovery of the conductance Anincrease in the duration or magnitude of the electric stressleads to a further increase in the chargingdischargingeffect The chargingdischarging behavior of the devices isrepeatable As the conduction can be modulated by electric

Fig 7 IndashV characteristics of the MOS structure after several cyclesrsquoapplication of the electric stress of minus15 V and 15 V for 5 s



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stress it could be have potential applications in a new typeof silicon-based memory such as write-once-read-manytime memory

References and Notes

1 S Tiwari F Rana H Hanafi A Hartstein E F Crabbe andK Chan Appl Phys Lett 68 1377 (1996)

2 D Tsoukalas P Dimitrakis S Kolliopoulou and P Normand MatSci Eng B-Solid 124 93 (2005)

3 T Z Lu M Alexe R Scholz V Talalaev R J Zhang andM Zacharias J Appl Phys 100 5 (2006)

4 C M Compagnoni R Gusmeroli D Ielmini A S Spinelli andA L Lacaita J Nanosci Nanotechnol 7 193 (2007)

5 G Chakraborty S Chattopadhyay C K Sarkar and C PramanikJ Appl Phys 101 6 (2007)

6 X Zhou K Usami M A Rafiq Y Tsuchiya H Mizuta andS Oda J Appl Phys 104 4 (2008)

7 Y Liu T P Chen C Y Ng M S Tse S Fung Y C Liu S Liand P Zhao Solid State Lett 7 G134 (2004)

8 B De Salvo G Ghibaudo P Luthereau T BaronB Guillaumot and G Reimbold Solid-State Electron 45 1513(2001)

9 S Y Huang S Banerjee R T Tung and S Oda J Appl Phys93 576 (2003)

10 W Zhang S Zhang Y Liu and T Chen J Crystal Growth311 1296 (2009)

11 J I Wong T P Chen M Yang Y Liu C Y Ng and L DingJ Appl Phys 106 013718 (2009)

12 C Ternon C Dufour F Gourbilleau and R Rizk European Phys-ical Journal B 41 325 (2004)

13 C J Lin C K Lee E W G Diau and G R Lin J ElectrochemSoc 153 E25 (2006)

14 S M Prokes and W E Carlos J Appl Phys 78 2671(1995)

15 Y Shi K Saito H Ishikuro and T Hiramoto J Appl Phys84 2358 (1998)

Received 26 April 2010 Accepted 5 June 2010



IP 1556918390Fri 14 Jan 2011 090227


Fig 1 TEM image of the SiO14 samples The inset shows the HRTEMimage of an individual Si nanocrystal

micrograph The corresponding HRTEM image shows thatthese nanoparticles have well defined atomic lattices indi-cating the formation of nc-Si Their size ranged from 4 to7 nm resulting in a mean crystal size of 5 nm in diameterFigure 2 shows the IndashV characteristics of the MOS

structure based on the nc-SiSiO2 films before (ie thevirgin sample) and after applying electric stress of minus10 Vand 10 V for 5 s Note that the maximum voltage ofthe IndashV measurement was set to 5 V which was lowenough to avoid any charging or discharging effect causedby the electrical measurement itself As can be seen inFigure 2 the repeated measurements did not cause signif-icant changes in the IndashV characteristic This indicates thatno significant charging or discharging taking place in thenanocrystals during the IndashV measurement thus the conduc-tion of the films was not affect by the measurement itselfHowever after application of electric stress of minus10 V for5 s the IndashV characteristic changed drastically As can beseen in Figure 2 the current was reduced by more than10 times upon negative electric stress The reduction inthe gate current indicated a large increase in DC resistance(or decrease in the conductance) in the film However the

Fig 2 IndashV characteristics of the MOS structure before (ie the virgincase) and after applying electric stress of minus10 V and +10 V to MOSstructure for 5 s

gate current recovered back to the virgin state after appli-cation of 10 V for 5 s on the same pad indicating an elec-tric field-induced decrease in DC resistance (or increase inthe conductance)The increase in the DC resistance can be explained in

terms of breaking of some tunneling paths due to charg-ing up of the nc-Si caused by the electric stress In thenc-Si distributed region the electron conduction can takeplace between adjacent uncharged nc-Si via tunneling orother mechanism under external electric field11 And alarge number of such nc-Si embedded in the oxide canform many conductive tunneling paths which significantlyincrease the conductance of the SiO2 as shown in Figure 3Charge trapping occurs when the injected carriers aretransported along the tunneling paths The injected car-riers could be trapped in the individual Si nanocrystalsOn the other hand it is well known that nc-SiSiO2

films contain high density of oxygen-related defects at thenc-Si SiO2 interface12 such as neutral oxygen vacancy(O3 equivSindashSiequivO3 where represents the bonds to three oxy-gen atoms)13 and non-bridging oxygen hole center (equivSindashO where represents an unpaired electron)14 The carrierscould also be trapped in these defects15 In either casecharge trapping is associated with the existence of thenc-Si The charge trapping in turn affects the carriertransport across the oxide layer in a number of waysfirstly charge trapping in an nc-Si or a defect increases theresistance of the tunneling paths involving the nc-Si or thedefect due to the electrostatic interaction of the transportedcarriers with the trapped carriers Secondly the tunnelingpaths related to the charged nc-Si could be broken due toCoulomb blockade effect Therefore charge trapping willsuppress the carrier transport across the oxide layerUnder strong negative stress holes from the p-type Si

substrate and electrons from the Al gate are easily injectedinto the films Some of the injected carriers could betrapped in the nc-Si associated trapping centers leading tothe reduction of the gate current The recovery after appli-cation of positive electric stress is due to the release ofsome of the charges trapped in the trapping centers Underpositive gate stress electrons and holes are injected intothe gate oxide filling the trapping centers On the otherhand some of the holes and electrons trapped under previ-ous negative stress are now pushed back to the Si substrateand the Al gate ldquodefilling the trapping centers Howeverbecause of the low injection efficiency of holes from Alelectrode and electrons from the electron minority p-typeSi substrate the defilling process overwhelms the fillingprocess Thus charged nc-Si associated trapping centersare released leading to the recovery of the tunneling pathsCharging and discharging of these centers under

external electric field have been confirmed by the CndashVcharacteristics as shown in Figure 4 The application ofa negative electrical stress of minus10 V for 5 s leads to alarge positive flat band voltage shift in the CndashV charac-teristic indicating a large amount of electrons trapped in



IP 1556918390Fri 14 Jan 2011 090227









IP 1556918390Fri 14 Jan 2011 090227













IP 1556918390Fri 14 Jan 2011 090227






















IP 1556918390Fri 14 Jan 2011 090227









IP 1556918390Fri 14 Jan 2011 090227













IP 1556918390Fri 14 Jan 2011 090227






















IP 1556918390Fri 14 Jan 2011 090227













IP 1556918390Fri 14 Jan 2011 090227






















IP 1556918390Fri 14 Jan 2011 090227





















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