charge transport and trapping in batio3 thin films flash evaporated on si and sio2/si
TRANSCRIPT
Charge transport and trapping in BaTiO3 thin ®lms ¯ash evaporated on Siand SiO2/Si
R.E. Avilaa,*, J.V. Caballerob, V.M. Fuenzalidac, I. Eiseled
aComisioÂn Chilena de EnergõÂa Nuclear, Cas. 188-D Santiago, ChilebDepto. de FõÂsica, U. de Santiago de Chile, Cas. 307-2 Santiago, Chile
cDepto. de FõÂsica, FCFM, U. de Chile Santiago, ChiledUniv. der Bundeswehr, W. Heisenberg Weg 39, D85577 Neubiberg, Germany
Received 12 May 1998; accepted 10 December 1998
Abstract
BaTiO3 (BT) thin ®lms were prepared by ¯ash evaporation onto p-Si and SiO2/p-Si from a Re boat at 18008C in ultra high vacuum. The
®lms are amorphous and remain so after a thickness reduction by 10±20% upon annealing at 5008C for 3 min in O2 atmosphere. Annealing
raises, also, the index of refraction by some 5% and the extinction coef®cient by a factor of 2. Electron injection at the Al to BT interface of
Al/BT/Si capacitors is enhanced by the Schottky effect, yielding a value of 11.2 for the dielectric constant of BT. Modeling current±time
measurements yields a trap density of 1024 m23, 0.82 eV below the conduction band. Capacitance±voltage curve shifts due to bias stress on
Al/BT/SiO2/Si capacitors are interpreted as caused by electron injection and trapping in the BT ®lms. Starting deposition at 1708C or post-
deposition annealing reduces the trap density and increases the capacitance±voltage curve shifts by bias stress, from 0.3 to over 14 V at bias
stress of 2 10 V. q 1999 Elsevier Science S.A. All rights reserved.
Keywords: Barium titanate; Annealing; Dielectric properties; Electrical properties and measurements
1. Introduction
Perovskites such as BaTiO3 (BT), SrTiO3, and
Pb(Zr,Ti)O3 exhibit a high dielectric constant (e r), and are
ferroelectric at room or lower temperature. In addition to
their interesting physical properties these materials may ®nd
applications in piezoelectric transducers, pyroelectric and
optical devices, non-volatile random access memories
[1,2], and sensors. These applications require thin ®lm struc-
tures.
Oxygen vacancies in BT are active as traps, leading to
poor reproducibility of the electrical properties of MOS
structures [3] and current degradation under sustained bias
[4,5]. Studying the nature and energy distribution of these
traps is dif®cult when charge transport due to long-term
trapping activity is superimposed on dc leakage through
the ®lms. An approach to avoid this dif®culty, is to deposit
the thin ®lms on a thin SiO2 layer on Si.
The Al/BT/SiO2/Si structure may operate as a thin SiO2
capacitor under sustained dc bias, while presenting the high
permittivity BT ®lm at high frequency. Bare Si oxidizes
during deposition of ferroelectric ®lms, as observed by
Matsubara et al. [6] during deposition of SrTiO3 on bare
Si. The resulting SiO2 interlayer degrades the capacitance
of the overall structure. A similar observation is made by
Nam and Kim [7], who obtained a maximum relative dielec-
tric permittivity of 86 by sputtering in a 30% O2 in Ar atmo-
sphere from a target with excess SrO, and annealing at
6008C. Annealing at higher temperature, however,
decreased the effective permittivity, a result attributed to
the formation of an SiO2 layer at the SrTiO3/Si interface.
The amorphous BT ®lms exhibit a lower dielectric constant
(10±20), but higher resistivity than crystalline [8] BaTiO3.
The interest in contact of ferroelectric or high permittivity
materials to semiconductors is exempli®ed by the work of
Nagatomo et al. [9] who have built an MOS ®eld-effect
transistor on a 300 nm thick Si ®lm deposited over a
2.5 mm thick BT ®lm. The high permittivity of 100 of the
latter is considered an advantage over lower permittivity
insulators, like SiO2 or sapphire.
From the considerations above, this work focuses on the
electrical and optical characteristics of ¯ash evaporated
BaTiO3 thin ®lms on Si and on oxidized Si. Deposition on
bare Si is not intended for technological applications, but
Thin Solid Films 348 (1999) 44±48
0040-6090/99/$ - see front matter q 1999 Elsevier Science S.A. All rights reserved.
PII: S0040-6090(99)00007-3
* Corresponding author. Tel.: 1 56-2-364-6106; fax; 1 56-2-364-6255.
E-mail address: [email protected] (R.E. Avila)
will be used to monitor charge transport and trapping in the
BT ®lm.
2. Experimental
The BaTiO3 (BT) thin ®lms were prepared as detailed in
an earlier publication [10]. In summary, the substrates are p
type, (100) oriented silicon, 10±20 V cm, with a standard
31 nm gate oxide. The BT thin ®lms were ¯ash evaporated
from a Re source at 18008C in ultra high vacuum. The
substrate was either at room temperature and allowed to
heat to approximately 708C (type I) or evaporation started
with the substrate at 1708C, which was allowed to cool
down to 708C (type II) during evaporation.
X ray diffraction (XRD) and X ray photoelectron spectro-
scopy (XPS) were used to probe for crystallinity and
elemental distribution in the thin ®lms.
Spectroscopic ellipsometry in the photon energy range of
1.65 to 2.95 eV was used to model the thickness and optical
parameters, using the Woollam Co., M44 system, which
takes the ellipsometric C and D angles at 44 photon energy
values in the given range. Data were collected at three
angles of incidence, mostly in the range of 60±808 seeking
to include data near the principal angle (corresponding to
D � 908) over most of the energy range. The use of three
scans increases data redundancy but the correlation between
the scans is high, as observed by the similarity of the respec-
tive effective n, k spectra.
Al was deposited for electrical contacts by evaporation
through a shadow mask. Current±voltage (I±V), and differ-
ential capacitance±voltage (C±V) measurements were made
at high frequency (HF). A Keithley 590 was used for HF
measurements at 100 kHz and 1 MHz. A Keithley 617 was
used for higher voltage (up to 100 V) I±V measurements.
Pulsed HF C±V measurements were performed for obser-
ving the shift of the C±V characteristics along the gate bias
axis, as a result of applying a steady dc bias. In this mode,
the bias is kept at a `base bias', allowing the capacitor to
settle. Then, short bias pulses are applied, during which the
HF capacitance is measured. Between pulses the bias
returns to base bias for a lapse at least three times the dura-
tion of the pulse.
3. Results
XRD analysis shows the ®lms to be amorphous, and
remain so after annealing at 5008C for 3 min in O2 atmo-
sphere. From XPS depth pro®les [10], the signals expected
from BaTiO3 are observed. Interdiffusion is observed at the
BT/SiO2 ®lm interface, Si and Ba being the most mobile
species, resulting in a drop by one half of the Ba signal over
approximately 8 nm.
3.1. Optical parameters
The spectroscopic ellipsometry data were ®tted with a
model which includes the ®lm thickness and optical para-
meters. The model was built on the system library data for
the Si substrate, and direct measurement of the SiO2 and BT
thin ®lms, both of which were ®tted with the Cauchy model
[11], in which
n � A 1 B=l2 1 C=l4
k � aexp 1240b l21 2 g21� �� �
A, B, C, a and b being adjustable parameters, the wave-
length, l , is expressed in nm, and g � 400 nm.
The ®t follows the experimental data closely, with values
of the mean squared error (MSE), weighted by the experi-
mental uncertainties, of the order of unity, where the devia-
tions may be due to inhomogeneities in the ®lm thickness or
optical parameters. That the Cauchy model itself is appro-
priate for this type of material was tested by ®tting data
generated out of the library dispersion relation [12] of a
60 nm BaTiO3 thin ®lm on Si. Using comparable uncertain-
ties, the Cauchy model ®ts the library generated data with an
R.E. Avila et al. / Thin Solid Films 348 (1999) 44±48 45
Table 1
Properties of BT ®lms: thickness, n and k from spectroscopic ellipsometry modeling (thickness values in parentheses from direct pro®lometer readings); n, k
are reported at 2.3 eV, the center of the instrument energy range, [*] at 2 8 V, [u] unreliable due to strong dependence on geometry, [e] erratic dependence on
the stress applied
Type I Type II
SiO2/Si SiO2/Si Si Si SiO2/Si SiO2/Si
As deposited Annealed As deposited Annealed As deposited Annealed
Thickness (nm) 65.8 51.8 87.0 76.7 93.8 82.5
(Pro®lometer) (64:3 ^ 1:1) (50:9 ^ 1:2)
n 1.85 1.93 1.88 1.90 1.88 1.93
k 1:7 £ 1023 5 £ 1023 9 £ 1024 7:8 £ 1023 1:5 £ 1023 4 £ 1023
SE e r 18.1 11.2
CV e r 20.8 16 3 9.9 [u] 20.6
DVhw at 2 10 V 1 0.3 1 2.5 1 14[*] [e] 1 2 1 4
Nt (m23) at Et 2 Ec (eV) 20 £ 1023 at 2 0.85 9 £ 1023 at ±0.82
MSE lower than that of the experimental data by factors
between 3 and 20. That the global minimum was found
was tested by starting the ®tting process at various sets of
values of the parameters. On rare occasions a local mini-
mum was found, but with a much larger MSE, than the
accepted global minimum.
The results of these analysis are reported in Table 1.
There, the ®lm thickness values carry a typical uncertainty
of ^ 0.5 nm, and compares favorably with the direct pro®l-
ometer measurements included (in parentheses) in the table.
The refraction index and extinction coef®cient increase
over the energy range (1.65 to 2.95 eV) used. n increases
typically by 5%, and k roughly by a factor of 2. The values
of n and k at the center of this energy range are included in
Table 1.
Similar values of the refractive index were found [13] in
BT thin ®lms deposited by reactive partially ionized beam
deposition (RPIB). A value of 1.90 is reported for sotoichio-
metric BaTiO3, and higher values for Ba rich ®lms, n reach-
ing the value of 2.20 for a Ba/Ti � 0.3 ®lm.
The thickness reduction with the sintering temperature is
accompanied by an increase of the refractive index and
extinction coef®cient. This correlation, on a much larger
scale, was pointed out by Trolier-McKinstry et al. [14] in
studies of PT and PZT thin ®lms deposited by the sol-gel
technique.
3.2. I±V analysis
I±V measurements on type II Al/BT/Si capacitors, are
rectifying, with higher current in the negative-top-contact
direction. The leakage current of the Al/BT/SiO2/Si capaci-
tors is below 0.1 pA at 10 V. Because of uncertainty in the
limiting process for current transport, gate bias will not be
converted to average ®elds.
Upon ®rst contact, I±V measurements on as-deposited
type II Al/BT/Si capacitors display nearly ohmic behavior
in the 0.3 to 5 V range, followed, in some cases, as shown in
Fig. 1, by a sudden increase (soft breakdown), in the 5 to
10 V range. This is attributed to local breakdown of a
complex, probably non-stoichiometric and heavily contami-
nated SiOx ®lm, at the BT/Si interface.
Following soft breakdown, the I±V curve is smooth, and
sharply rectifying with 3 orders of magnitude larger at
210 V than at 1 10 V. Over this bias range, the Si to BT
contact appears blocking for charge injection, assuming
electronic [15] transport across the BT ®lm,. On the
contrary, the Al to BT contact appears injecting, leading
to a resemblance of space-charge limited [16] (SCL) beha-
vior in the 0 to 210 V range. There, the current goes
through a series of J � J0Vn regimes, starting with an
ohmic region down to 21 V. Then, a sharp increase, in
the 21.2 to 24 V region is interpreted to be due to ®lling
a close to exponentially decaying (away from the conduc-
tion band) electron trap band. In the 24 to 210 V range, the
conduction stays close to the ®lled-trap regime (n � 2).
Further bias stress produces destructive breakdown at
bias between 170 and 1100 V, interpreted to occur at the
BT ®lm. This breakdown does not occur in annealed
samples, which may sustain the maximum stress of our
instrument (1100 V, or 22 mA).
Annealing increases the conductivity of type II thin ®lms.
As shown in Fig. 1, in the 215 to 120 V range, the Al/BT/
Si capacitors present sharply rectifying I±V characteristics,
with the absolute value of the current some 20 to 2000 times
higher at 21 V than at 11 V. The current is essentially
R.E. Avila et al. / Thin Solid Films 348 (1999) 44±4846
Fig. 1. SCL analysis of I±V curves of as-deposited and annealed BT ®lms in
type II Al/BT/Si capacitors. The lower (upper) branch of each pair corre-
sponds to V . 0 (V , 0). (a) Annealed, (b) as deposited, (c) anealed, after
soft breakdown.
Fig. 2. Schottky enhanced analysis of the data shown in Fig. 1, using the
same notation.
ohmic in the 20.5 to 10.5 V range, then, above 1 V it
saturates. Sweeping from 230 to 170 V reduces the current
in the negative branch, deviating from the SCL behavior.
After stabilizing, a Schottky enhanced [17] (SE) model (Fig.
2) provides a close ®t over the 21 to 230 V range.
In this model, the injection ef®ciency depends on the
polarization of the dielectric during the electron injection
process. This is represented by the dielectric constant, e r, at
high frequency. From this analysis of the data in Fig. 2, the
value of 11.2 obtains for e r in BT. Values of e r calculated
from the negative bias branch of the other curves are shown,
also, in Fig. 2
Other current enhancement models, like Poole±Frenkel
[18] detrapping, or Fowler±Nordheim [19] tunneling, do
not ®t the data.
3.3. C±V analysis
HF C±V characteristics of all BT capacitors, on Si and on
SiO2/Si, display the expected behavior, including accumu-
lation, depletion and inversion regions; except in the Al/BT/
Si capacitors which may go into deep depletion instead of
inversion. The Si surface is normally inverted (at zero bias).
From the analysis of HF C±V curves of Al/SiO2/Si capa-
citors, the p-Si substrate has a doping level of 2 £ 1021 m23.
The Si surface is inverted at zero bias; the (wet) SiO2/Si
interface presents a ®xed oxide charge density of 1:7 £1016 m22. Bias stress of ^ 20 V for 5 min displaces the
pulsed HF C±V measurements by less than 0.1 V along the
gate bias axis.
From the value of capacitance in accumulation, corrected
for series resistance, the dielectric constants of the BT ®lms
are given in Table 1. The value of 3 for the as-deposited ®lm
on Si is unexpectedly low. The other values are within the
range found in other experiments [20,21].
HF C±V measurements focused on displacements of the
C±V curve by bias stress. The customary procedure [22] of
bias-temperature-stress in MOS electronics involves heating
the capacitor to the 200 to 4008C range for several minutes,
cooling under sustained bias, and measuring the C±V curve
back at room temperature. The overall displacements of the
C±V curve along the voltage axis provide a measure of the
ionic charge moving in the oxide under the applied bias.
In this work, all measurements were carried out at room
temperature, so that ionic displacements are unlikely. This
was veri®ed by slow current±voltage sweeps which do not
show a current peak at zero bias. Also, the C±V curve shifts
follow, albeit with a little hysteresis, the stress bias, even
without a polarity reversal. If the shifts were due to mobile
ionic charge, the shifts would be essentially stable until a
change of polarity of the stress bias. Thus, electron injection
from the Al/BT interface is assumed, which settle at traps
(in the BT ®lm) and at the BT/SiO2 interface.
The C±V curve shifts (DVhw), at a capacitance halfway
between the accumulation and inversion levels, were
observed by pulsed HF C±V measurements after allowing
the curves to settle (5 to 30 min). As shown in Table 1,
annealing increases the C±V curve shifts, a tendency consis-
tent with the larger shifts exhibited by type II ®lms than
those of type I ®lms. The immediate suggestion is that the
shifts are caused by the diffuse interface of BT to Si or to
SiO2. Noticeably, starting the deposition at 1708C is
approximately as effective, in terms of C±V curve shifts,
as annealing at 5008C for 3 min.
3.4. Transient current analysis
The time dependence of current following a voltage step
was observed as a measure of trap activity in ®lms deposited
on SiO2/Si. The capacitors have been stressed and settled at
2 10 V, followed by a step to 2 2 V. The latter value is
chosen to keep the Si surface in accumulation, avoiding
transients due to minority carrier generation or trapping
activity in the Si, and to maintain a certain electric ®eld to
sweep out the carriers ejected from traps (or to sweep in the
carriers to be trapped). Admittedly, this electric ®eld proce-
dure introduces a minor variation (aÁ la Poole±Frenkel) of the
effective trap depth.
Analysis of the current transient according to the theory
of Simmons and Tam [23] yields an estimate of the trap
density distribution across the BT energy band gap. This
calculation requires a value for the attempt-to-escape
frequency, usually of the order of 1011 to 1012 s21. A
value of 1012 s21 has been assumed to determine the energy
scale in this work (a factor of 10 error in this value intro-
duces an error of 2.3kBT, some 0.06 eV, in energy).
Transients in annealed type I ®lms (not shown) yield trap
densities one order of magnitude below the values shown in
Fig. 3.
R.E. Avila et al. / Thin Solid Films 348 (1999) 44±48 47
Fig. 3. Trap density distribution calculated from discharge I±t measure-
ments of type II Al/BT/SiO2/Si capacitors.
4. Discussion
The values of e r from the SE analysis (er � 11:2, 13) are
expected to be close to, but lower than, values determined
from the HF capacitance in accumulation (er � 10 to 20), as
the process of electron emission into the dielectric is
assumed to occur over a time interval substantially lower
than a period of the HF (100 kHz) measurement signal. This
relation is partly satis®ed, especially so, considering the
values determined from capacitors on SiO2/Si. Moreover,
the values calculated from capacitance measurements
re¯ect the effective permittivity which may be lowered by
an SiOx layer at the BT/Si interface. The Schottky effect
analysis is free of such interference as it probes the thin
layer at the Al/BT interface where the barrier lowering
occurs. However, a calculation of the thickness of an
assumed SiOx layer is unreliable as it depends on the differ-
ence between uncertain quantities.
The SCL and SE analysis must be extended to determine
their consistency with the dependence of the current on
temperature and ®lm thickness.
The calculation of trap densities using current transients
has probed deep traps only. Measurements at earlier times,
or lower temperature will be necessary to probe traps closer
to the conduction (or valence) band. However, a distinct
rise, towards the conduction band, appears in the as-depos-
ited sample, which is reduced by annealing. The density and
energy location of these distributions coincide with our own
preliminary measurements on Ag/BT/Ti capacitors, where
the BT thin ®lms were grown by an electrochemical hydro-
thermal process.
5. Conclusions
The characterization of BT thin ®lms deposited by ¯ash
evaporation on Si and on SiO2/Si sheds light on charge
injection and trapping in the BT ®lm. The interfaces of
both Al and Si to BT are blocking for electron injection,
especially after soft breakdown, which appear to burn ohmic
injection paths. The injection from Si to BT being a few
orders of magnitude less ef®cient than from Al to BT. As the
Al to BT interface becomes more blocking, the current is
enhanced by Schottky effect. Current±time measurements
and shifts of the capacitance±voltage curves due to bias
stress on Al/BT/SiO2/Si capacitors are interpreted as caused
by electron injection and trapping in the BT ®lms. Starting
the deposition at a moderate temperature (1708C) plays a
role similar to annealing at 5008C for 3 min, in terms of C±V
curve shifts.
The analysis of current and capacitance characteristics of
structures including an SiO2 layer between BT and Si
provides much insight into the time and voltage dependence
of charge transport in the BT thin ®lm.
Acknowledgements
This work was partially funded by the Commission of the
European Communities under grant CI1CT910875, Fonde-
cyt grant 1980285 and FundacioÂn Andes contract C12510.
J.C. acknowledges Fondecyt grant 2950007.
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