chapter1 -basic structure of computers · pdf filebasic structure of computers • computer...
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Computer
OrganizationDesign
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Chapter 1. Basic Structure of
Computers
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Basic Structure of Computers
• COMPUTER TYPES
• FUNCTIONAL UNITS
• BASIC OPERATIONAL CONCEPTS
• BUS STRUCTURES
• SOFTWARE
• PERFORMANCE
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Types of computer
Type of computer
Digital computer Analog computer Hybrid Computer
Micro ComputerMain frame
ComputerSuper Computer
Home PC
Mini Computer
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Analog computer
Analog computer measures and answer the questions by the method of “HOW MUCH”. The input data is not a number infect a physical quantity like tem, pressure, speed, velocity.
� Signals are continuous of (0 to 10 V)
�Accuracy 1% Approximately
�High speed
�Output is continuous
� Time is wasted in transmission time
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Analog computer
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Digital Computers
Digital computer counts and answer the questions by
the method of “HOW Many”. The input data is
represented by a number. These are used for the
logical and arithmetic operations.
� Signals are two level of (0 V or 5 V)
�Accuracy unlimited
� low speed sequential as well as parallel processing
�Output is continuous but obtain when computation
is completed.
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Micro Computer
Micro computer are the smallest computer system.
There size range from calculator to desktop size. Its
CPU is microprocessor. It also known as Grand child
Computer.
• Application : - personal computer, Multi user system,
offices.
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Mini Computer
These are also small general purpose system.
They are generally more powerful and most
useful as compared to micro computer. Mini
computer are also known as mid range
computer or Child computer.
• Application :- Departmental systems, Network
Servers, work group system.
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Mini computer
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Handheld
• Also called a PDA (Personal Digital Assistant).
• A computer that fits into a pocket, runs on batteries, and is used while holding in your hand.
• Typically used as an appointment book, address book, calculator, and notepad.
• Can be synchronized with a personal microcomputer as a backup.
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Handheld PC(PDA)
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Workstation
• Desktop computer which is usually more powerful than a Microcomputer.
• Powerful desktop computer designed for specialized tasks.
• A microcomputer that fits on a desk and runs on power from an electrical wall outlet.
• The CPU can be housed in either a vertical or horizontal case.
• Has separate components (keyboard, mouse, etc.) that are each plugged into the computer.
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workstation
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Laptop or Notebook
• Portable, compact computer that runs on a wall
outlet or battery unit with all components in one
unit.
• All components (keyboard, mouse, etc.) are in
one compact unit.
• Usually more expensive than a comparable
desktop.
• Sometimes called a notebook.
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Mainframe• Large powerful computer often serving many connected terminals.
• Large expensive computer capable of simultaneously processing data for hundreds or thousands of users.
• Used to store, manage, and process large amounts of data that need to be reliable, secure, and centralized.
• Usually housed in a closet sized cabinet.
• Application – Host computer, Central data base server.
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Server
• A computer that processes request for HTML
and other documents that are components of
Web pages.
• Purpose is to “serve.”
• A computer that has the purpose of supplying its
users with data; usually through the use of a
LAN (Local Area Network).
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Super Computer
• Super computer are those computer which are
designed for scientific job like whether forecasting
and artificial intelligence etc. They are fastest and
expensive. A super computer contains a number of
CPU which operate in parallel to make it faster. It also
known as grand father computer.
• Application – whether forecasting, weapons research
and development.
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Super computer
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Functional Units
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Functional Units
Figure : Basic functional units of a computer.
I/O Processor
Output
Memory
Input andArithmetic
logic
Control
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Information Handled by a Computer
• Instructions/machine instructions� Govern the transfer of information within a computer as well
as between the computer and its I/O devices
� Specify the arithmetic and logic operations to be performed
� Program
• Data� Used as operands by the instructions
� Source program
• Encoded in binary code – 0 and 1
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Memory Unit
• Store programs and data
• Two classes of storage� Primary storage
� Fast
� Programs must be stored in memory while they are being executed
� Large number of semiconductor storage cells
� Address
� RAM and memory access time
� Memory hierarchy – cache, main memory
� Secondary storage – larger and cheaper
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Arithmetic and Logic Unit (ALU)
• Most computer operations are executed in ALU of
the processor.
• Load the operands into memory – bring them to the
processor – perform operation in ALU – store the
result back to memory or retain in the processor.
• Registers
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Control Unit
• All computer operations are controlled by the control unit.
• The timing signals that govern the I/O transfers are also generated by the control unit.
• Control unit is usually distributed throughout the machine instead of standing alone.
• Operations of a computer:� Accept information in the form of programs and data through an input
unit and store it in the memory
� Fetch the information stored in the memory, under program control, into an ALU, where the information is processed
� Output the processed information through an output unit
� Control all activities inside the machine through a control unit
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Basic Operational Concepts
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Basic Operational Concepts
• Activity in a computer is governed by instructions.
• To perform a task, an appropriate program consisting of a
list of instructions is stored in the memory.
• Individual instructions are brought from the memory into
the processor, which executes the specified operations.
• Data to be used as operands are also stored in the
memory.
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A Typical Instruction
• Add LOCA, R0
– Add the operand at memory location LOCA to the operand in a register R0 in the processor.
– Place the sum into register R0.
– The original contents of LOCA are preserved.
– The original contents of R0 is overwritten.
• Instruction is fetched from the memory into the processor – the operand at LOCA is fetched and added to the contents of R0 – the resulting sum is stored in register R0.
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Separate Memory Access and ALU
Operation
• Load LOCA, R1
• Add R1, R0
• Whose contents will be overwritten?
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Connection Between the Processor
and the Memory
Figure : Connections between the processor and the memory.
Processor
Memory
PC
IR
MDR
Control
ALU
Rn 1-
R1
R0
MAR
ngeneral purposeregisters
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Registers
• Instruction register (IR)
• Program counter (PC)
• General-purpose register (R0 – Rn-1)
• Memory address register (MAR)
• Memory data register (MDR)
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Typical Operating Steps
• Programs reside in the memory through input devices
• PC is set to point to the first instruction
• The contents of PC are transferred to MAR
• A Read signal is sent to the memory
• The first instruction is read out and loaded into MDR
• The contents of MDR are transferred to IR
• Decode and execute the instruction
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Typical Operating Steps (Cont’)
• Get operands for ALU�General-purpose register
�Memory (address to MAR – Read – MDR to ALU)
• Perform operation in ALU
• Store the result back�To general-purpose register
�To memory (address to MAR, result to MDR – Write)
• During the execution, PC is incremented to the next instruction
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Operating Steps Involved for the Instruction Execution Of :
ADD LOCA, R0
• Transfer the contents of register PC to register MAR
• Issue a Read command to memory, and then wait until it has
transferred the
• requested word into register MDR
• Transfer the instruction from MDR into IR and decode it
• Transfer the address LOCA from IR to MAR
• Issue a Read command and wait until MDR is loaded
• Transfer contents of MDR to the ALU
• Transfer contents of R0 to the ALU
• Perform addition of the two operands in the ALU and transfer
result into R0
• Transfer contents of PC to ALU
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Interrupt
• Normal execution of programs may be preempted if
some device requires urgent servicing.
• The normal execution of the current program must be
interrupted – the device raises an interrupt signal.
• Interrupt-service routine
• Current system information backup and restore (PC,
general-purpose registers, control information, specific
information)
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Bus Structures
• There are many ways to connect different
parts inside a computer together.
• A group of lines that serves as a connecting
path for several devices is called a bus.
• Address/data/control
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Bus Structure
• Single-bus
Figure : Single-bus structure.
MemoryInput Output Processor
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Speed Issue
• Different devices have different
transfer/operate speed.
• If the speed of bus is bounded by the slowest
device connected to it, the efficiency will be
very low.
• How to solve this?
• A common approach – use buffers.
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Software
Software
– Consists of instructions that control the hardware
and cause the desired process to happen
– A Disk is considered hardware. A program ON the
disk is considered software!
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• Applications (Application Programs)
– Sets of computer instructions designed to perform
a particular application or task.
• Examples of popular application programs:
– Word or WordPerfect for word processing.
– Excel for keeping a ledger.
– Norton’s Utilities for checking disks for damage.
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• Operating Systems
– A collection of programs that manage and control all operations and coordinate all hardware components of the computer.
– Some functions include:
• Controlling the mouse pointer.
• Sending data to the printer and screen.
• Managing files.
• Formatting disks.
– Popular Operating Systems include Windows, Unix, MacOS, VMS, Linux, OS/2.
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SOFTWARE
Program
OS
routines
Hard disk
Printer
t1 t2 t3 t4t0 t5
Figure : User program and OS routines sharing the processor.
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Performance
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Performance
• The most important measure of a computer is
how quickly it can execute programs.
• Three factors affect performance:
�Hardware design
�Instruction set
�Compiler
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Performance
• Processor time to execute a program depends on the hardware involved in the execution of individual machine instructions.
Mainmemory Processor
Bus
Cachememory
Figure : The processor cache.
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Performance
• The processor and a relatively small cache
memory can be fabricated on a single
integrated circuit chip.
• Speed
• Cost
• Memory management
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Processor Clock
• Clock, clock cycle, and clock rate
• The execution of each instruction is divided
into several steps, each of which completes in
one clock cycle.
• Hertz – cycles per second
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Basic Performance Equation
• T – processor time required to execute a program that has been prepared in high-level language
• N – number of actual machine language instructions needed to complete the execution (note: loop)
• S – average number of basic steps needed to execute one machine instruction. Each step completes in one clock cycle
• R – clock rate
• Note: these are not independent to each other
R
SNT
×=
How to improve T?
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Pipeline and Superscalar Operation
• Instructions are not necessarily executed one after another.
• The value of S doesn’t have to be the number of clock cycles to execute one instruction.
• Pipelining – overlapping the execution of successive instructions.
• Superscalar operation – multiple instruction pipelines are implemented in the processor.
• Goal – reduce S (could become <1!)
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Clock Rate
• Increase clock rate� Improve the integrated-circuit (IC) technology to make the
circuits faster
� Reduce the amount of processing done in one basic step (however, this may increase the number of basic steps needed)
• Increases in R that are entirely caused by improvements in IC technology affect all aspects of the processor’s operation equally except the time to access the main memory.
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CISC and RISC
• Tradeoff between N and S
• A key consideration is the use of pipelining
�S is close to 1 even though the number of basic steps
per instruction may be considerably larger
�It is much easier to implement efficient pipelining in
processor with simple instruction sets
• Reduced Instruction Set Computers (RISC)
• Complex Instruction Set Computers (CISC)
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Compiler
• A compiler translates a high-level language program into
a sequence of machine instructions.
• To reduce N, we need a suitable machine instruction set
and a compiler that makes good use of it.
• Goal – reduce N×S
• A compiler may not be designed for a specific processor;
however, a high-quality compiler is usually designed for,
and with, a specific processor.
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Performance Measurement
• T is difficult to compute.
• Measure computer performance using benchmark programs.
• System Performance Evaluation Corporation (SPEC) selects and publishes representative application programs for different application domains, together with test results for many commercially available computers.
• Compile and run (no simulation)
• Reference computer
under testcomputer on the timeRunning
computer reference on the timeRunning =ratingSPEC
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Chapter 2. Machine
Instructions and
Programs
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Machine Instructions and Programs
� NUMBERS
� ARITHMETIC OPERATIONS AND CHARACTERS
� MEMORY LOCATIONS AND ADDRESSES
� MEMORY OPERATIONS
� INSTRUCTIONS AND INSTRUCTION SEQUENCING
� ADDRESSING MODES
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Number, Arithmetic
Operations, and
Characters
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Humans
• Decimal Numbers (base 10)
• Sign-Magnitude (-324)
• Decimal Fractions (23.27)
• Letters for text
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Computers• Binary Numbers (base 2)
• Two’s complement and sign-magnitude
• Binary fractions and floating point
• ASCII codes for characters (A↔65)
Why binary?
• Information is stored in computer via voltage levels.
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Decimal: Non-negatives
• Base 10
• Uses decimal digits: 0,1,2,3,4,5,6,7,8,9
• Positional System - position gives power ofthe base
• Example:3845 = 3x103 + 8x102 + 4x101 + 5x100
• Positions: …543210
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Binary: Non-negatives
• Base 2
• Uses binary digits (bits): 0,1
• Positional system
• Example:
1101 = 1x23 + 1x22 + 0x21 + 1x20
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Conversions
• External Internal
(Human) (Computer)
25 11001
A 01000001
• Humans want to see and enter numbers in
decimal.
• Computers must store and compute with bits.vishnu 61
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Binary to Decimal Conversion
• Algorithm:
– Expand binary number using positional scheme.
– Perform computation using decimal arithmetic.
• Example:
110012 ↔ 1x24 + 1x23 + 0x22 + 0x21 + 1x20
= 24 + 23 + 20
= 16 + 8 + 1
= 2510
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Decimal to Binary
• Algorithm:
While N ≠ 0 doSet N to N/2Record the remainder (1 or 0)
end-of-loop
Set A to remainders in reverse order
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Decimal to binary - Example
N Rem 324
162 0
81 040 120 010 0
5 02 1
1 0
0 1
Example: Convert 32410 to binary
32410 = 1010001002
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Signed Integer
• 3 major representations:
�Sign and magnitude
�One’s complement
�Two’s complement
• Assumptions:
4-bit machine word
16 different values can be represented
Roughly half are positive, half are negative
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0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1 -
b3b2b1b0
B
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Sign and Magnitude Representation
High order bit is sign: 0 = positive (or zero), 1 = negativeThree low order bits is the magnitude: 0 (000) thru 7 (111)Number range for n bits = +/-2n-1 -1Two representations for 0
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001
+0
+1
+2
+3
+4
+5
+6
+7-0
-1
-2
-3
-4
-5
-6
-7
0 100 = + 4
1 100 = - 4
+
-
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One’s Complement Representation
• Subtraction implemented by addition & 1's complement
• Still two representations of 0! This causes some problems
• Some complexities in addition
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001
+0
+1
+2
+3
+4
+5
+6
+7-7
-6
-5
-4
-3
-2
-1
-0
0 100 = + 4
1 011 = - 4
+
-
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Two’s Complement Representation
• Only one representation for 0
• One more negative number than positive number
like 1's compexcept shiftedone positionclockwise
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001
+0
+1
+2
+3
+4
+5
+6
+7-8
-7
-6
-5
-4
-3
-2
-1
0 100 = + 4
1 100 = - 4
+
-
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Binary, Signed-Integer
Representations
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1+
1-
2+
3+
4+
5+
6+
7+
2-
3-
4-
5-
6-
7-
0+
0-
b3b2b1b0
Sign andmagnitude 1's complement 2's complement
B Values represented
Figure : Binary, signed-integer representations.vishnu 70
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Binary, Signed-Integer
Representations
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1+
1-
2+
3+
4+
5+
6+
7+
2-
3-
4-
5-
6-
7-
0+
0-
1+
2+
3+
4+
5+
6+
7+
0+
7-
6-
5-
4-
3-
2-
1-
0-
b3b2b1b0
Sign andmagnitude 1's complement 2's complement
B Values represented
Figure : Binary, signed-integer representations.vishnu 71
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Binary, Signed-Integer
Representations
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1+
1-
2+
3+
4+
5+
6+
7+
2-
3-
4-
5-
6-
7-
8-
0+
0-
1+
2+
3+
4+
5+
6+
7+
0+
7-
6-
5-
4-
3-
2-
1-
0-
1+
2+
3+
4+
5+
6+
7+
0+
7-
6-
5-
4-
3-
2-
1-
b3b2b1b0
Sign andmagnitude 1's complement 2's complement
B Values represented
Figure : Binary, signed-integer representations.vishnu 72
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Addition of 2 Single Bits
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Addition
• From right to left, we add each pair of digits
• We write the sum, and add the carry to the next
column on the left
1 9 8
+ 2 6 4
Sum
Carry
0 1 1
+ 0 0 1
Sum
Carry
2
1
6
1
4
0
0
1
0
1
1
0
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Addition and Subtraction – 2’s Complement
4
+ 3
7
0100
0011
0111
-4
+ (-3)
-7
1100
1101
11001
4
- 3
1
0100
1101
10001
-4
+ 3
-1
1100
0011
1111
If carry-in to the high order bit =
carry-out then ignore carry
if carry-in != carry-out then overflow
Simpler addition scheme makes twos complement the most commonchoice for integer number systems within digital systems
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2’s-Complement Add and Subtract
Operations
1 1 0 10 1 1 1
0 1 0 0
0 0 1 01 1 0 0
1 1 1 0
0 1 1 01 1 0 1
0 0 1 1
1 0 0 10 1 0 1
1 1 1 0
1 0 0 11 1 1 1
1 0 0 0
0 0 1 00 0 1 1
0 1 0 1
4+( )
2-( )
3+( )
2-( )
8-( )
5+( )
+
+
+
+
+
+
1 1 1 0
0 1 0 01 0 1 0
0 1 1 11 1 0 1
0 1 0 0
6-( )
2-( )
4+( )
3-( )
4+( )
7+( )+
+(b)
(d)1 0 1 11 1 1 0
1 0 0 1
1 1 0 11 0 0 1
0 0 1 00 1 0 0
0 1 1 00 0 1 1
1 0 0 11 0 1 1
1 0 0 10 0 0 1
0 0 1 01 1 0 1
0 1 0 1
0 0 1 00 0 1 1
5-( )
2+( )3+( )
5+( )
2+( )4+( )
2-( )
7-( )
3-( )7-( )
6+( )3+( )
1+( )
7-( )5-( )
7-( )
2+( )3-( )
+
+
-
-
-
-
-
-
(a)
(c)
(e)
(f)
(g)
(h)
(i)
(j)
Figure : 2's-complement Add and Subtract operations.vishnu 76
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Overflow - Add two positive numbers to get a negative number
or two negative numbers to get a positive number
5 + 3 = -8 -7 - 2 = +7
0000
0001
0010
0011
1000
0101
0110
0100
1001
1010
1011
1100
1101
0111
1110
1111
+0
+1
+2
+3
+4
+5
+6
+7-8
-7
-6
-5
-4
-3
-2
-1
0000
0001
0010
0011
1000
0101
0110
0100
1001
1010
1011
1100
1101
0111
1110
1111
+0
+1
+2
+3
+4
+5
+6
+7-8
-7
-6
-5
-4
-3
-2
-1
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Overflow Conditions
5
3
-8
0 1 1 10 1 0 1
0 0 1 1
1 0 0 0
-7
-2
7
1 0 0 01 0 0 1
1 1 0 0
1 0 1 1 1
5
2
7
0 0 0 00 1 0 1
0 0 1 0
0 1 1 1
-3
-5
-8
1 1 1 11 1 0 1
1 0 1 1
1 1 0 0 0
Overflow Overflow
No overflow No overflow
Overflow when carry-in to the high-order bit does not equal carry out
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Sign Extension
• Task:
– Given w-bit signed integer x
– Convert it to w+k-bit integer with same value
• Rule:
– Make k copies of sign bit:
– X ′ = xw–1
,…, xw–1
, xw–1
, xw–2
,…, x0
k copies of MSB
• • •X
X ′ • • • • • •
• • •
w
wkvishnu 79
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Sign Extension Example
short int x = 15213;
int ix = (int) x;
short int y = -15213;
int iy = (int) y;
Decimal Hex Binary
x 15213 3B 6D 00111011 01101101
ix 15213 00 00 C4 92 00000000 00000000 00111011 01101101
y -15213 C4 93 11000100 10010011
iy -15213 FF FF C4 93 11111111 11111111 11000100 10010011
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Representation of Character
Since we are working with 0's and 1's only, to represent character in computer we use
strings of 0's and 1's only.
To represent character we are using some coding scheme, which is nothing but a mapping
function.
Some of standard coding schemes are: ASCII, EBCDIC, UNICODE.
ASCII : American Standard Code for Information Interchange.
It uses a 7-bit code. All together we have 128 combinations of 7 bits and we can represent
128 character.
As for example 65 = 1000001 represents character 'A'.
EBCDIC : Extended Binary Coded Decimal Interchange Code.
It uses 8-bit code and we can represent 256 character.
UNICODE : It is used to capture most of the languages of the world. It uses 16-bit
Unicode provides a unique number for every character, no matter what the platform, no
matter what the program, no matter what the language. The Unicode Standard has been
adopted by such industry leaders as Apple, HP, IBM, JustSystem, Microsoft, Oracle, SAP,
Sun, Sybase, Unisys and many others.vishnu 81
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Memory Locations,
Addresses, and
Operations
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Memory Location, Addresses, and
Operation
• Memory consists of
many millions of
storage cells, each
of which can store 1
bit.
• Data is usually
accessed in n-bit
groups. n is called
word length.
• 2 k
second word
first word
Figure : Memory words.
nbits
last word
i th word
•••
•••
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Memory Location, Addresses, and
Operation
• 32-bit word length example
(b) Four characters
charactercharactercharacter character
(a) A signed integer
Sign bit: for positive numbers
for negative numbers
ASCIIASCIIASCIIASCII
32 bits
8 bits 8 bits 8 bits 8 bits
b31 b30 b1 b0
b31 0=
b31 1=
• • •
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Memory Location, Addresses, and
Operation
• To retrieve information from memory, either for one
word or one byte (8-bit), addresses for each location are
needed.
• A k-bit address memory has 2k memory locations, namely
0 – 2k-1, called memory space.
• 24-bit memory: 224 = 16,777,216 = 16M (1M=220)
• 32-bit memory: 232 = 4G (1G=230)
• 1K(kilo)=210
• 1T(tera)=240
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Memory Location, Addresses, and
Operation
• It is impractical to assign distinct addresses to individual
bit locations in the memory.
• The most practical assignment is to have successive
addresses refer to successive byte locations in the
memory – byte-addressable memory.
• Byte locations have addresses 0, 1, 2, … If word length is
32 bits, the successive words are located at addresses 0,
4, 8,…
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Big-Endian and Little-Endian
Assignments
2k
4- 2k
3- 2k
2- 2k
1- 2k
4-2k
4-
0 1 2 3
4 5 6 7
00
4
2k
1- 2k
2- 2k
3- 2k
4-
3 2 1 0
7 6 5 4
Byte addressByte address
(a) Big-endian assignment (b) Little-endian assignment
4
Word
address
•••
•••
Figure : Byte and word addressing.
Big-Endian: lower byte addresses are used for the most significant bytes of the word
Little-Endian: opposite ordering. lower byte addresses are used for the less significant
bytes of the word
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Memory Location, Addresses, and
Operation
• Address ordering of bytes
• Word alignment– Words are said to be aligned in memory if they
begin at a byte addr. that is a multiple of the numof bytes in a word.• 16-bit word: word addresses: 0, 2, 4,….
• 32-bit word: word addresses: 0, 4, 8,….
• 64-bit word: word addresses: 0, 8,16,….
• Access numbers, characters, and character strings
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Memory Operation
• Load (or Read or Fetch)
� Copy the content. The memory content doesn’t change.
� Address – Load
� Registers can be used
• Store (or Write)
� Overwrite the content in memory
� Address and Data – Store
� Registers can be used
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Instruction and
Instruction Sequencing
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Types of Instructions
Types of Instructions:
• Data transfers between the memory and the
processor registers
• Arithmetic and logic operations on data
• Program sequencing and control
• I/O transfers
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Representation of Machine Instruction
2 ways:
1. REGISTER TRANSFER NOTATION
2. ASSEMBLY LANGAGE NOTATION
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Register Transfer Notation
• Identify a location by a symbolic name standing for its hardware binary address (LOC, R0,…)
• Example:– Momery locations – LOC, PLACE, A,VAR2
– Processor register – R0 . . . Rn-1
– IO register - DATAIN, DATAOUT
• Contents of a location are denoted by placing square brackets around the name of the location
• Example:
[LOC]
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• R1←[LOC]
• R3 ←[R1]+[R2]
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Assembly Language Notation
• Represent machine instructions and programs.
• Instruction having the format:
• Example:
• Move LOC, R1
• Add R1, R2, R3
Opcode Operand(s) or Address(es)
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Basic Instruction Types
Let A, B and C are variables then
C=A+B
In register transfer notation it can be written as:
C�[A]+[B]
Types of Instructions:• Three-Address Instructions
• Two-Address Instructions
• One-Address Instructions
• Zero-Address Instructions
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Three-Address Instructions
Operation Source 1 ,Source2,Destination
Example:
ADD R1, R2, R3 R3 ← R1 + R2
For C=A+B
ADD A, B, C
What is the problem?.
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Two-Address Instructions
Operation Source, Destination
Example:ADD R1, R2 R2 ← R1 + R2
For C=A+B:
ADD A, B
MOV B, C
What is the problem?.
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One-Address Instructions
• Instruction can have only one memory operand
• Implicitly Accumulator is taken as another operand
• Example:
ADD A AC�[AC]+[A]
For C=A+B
LOAD A
ADD B
STORE C
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Zero-Address Instructions
• Processor uses pushdown stack
Example:ADD TOS ← TOS + (TOS – 1)
For C=A+B
PUSH A
PUSH B
ADD
POP C
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Summery: Basic Instruction Types
• Three-Address Instructions
– ADD R1, R2, R3 R3 ← R1 + R2
• Two-Address Instructions
– ADD R1, R2 R2 ← R1 + R2
• One-Address Instructions
– ADD M AC ← AC + M[AR]
• Zero-Address Instructions
– ADD TOS ← TOS + (TOS – 1)
• RISC Instructions
– Lots of registers. Memory is restricted to Load & Store
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Instruction Execution and Straight-Line Sequencing
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• C=A+B is a High Level Language statement where
A, B and C are memory locations
• Assembly language program for C=A+B is:
MOV A, R0
ADD B, R0
MOV R0, C
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Instruction Execution and Straight-
Line Sequencing
R0,C
B,R0
A,R0
Movei + 8
Begin execution here Movei
ContentsAddress
C
B
A
the programData for
segmentprogram3-instruction
Addi + 4
Figure : A program for C ← [Α] + [Β].
Assumptions:
- One memory operand
per instruction
- 32-bit word length
- Memory is byte
addressable
- Full memory address
can be directly specified
in a single-word instruction
Two-phase procedure
-Instruction fetch
-Instruction execute
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Branching
NUMn
NUM2
NUM1
R0,SUM
NUMn,R0
NUM3,R0
NUM2,R0
NUM1,R0
Figure : A straight-line program for adding n numbers.
Add
Add
Move
SUM
i
Move
Add
i 4n+
i 4n 4-+
i 8+
i 4+
•••
•••
•••
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BranchingN,R1Move
NUMn
NUM2
NUM1
R0,SUM
R1
"Next" number to R0
Figure : Using a loop to add n numbers.
LOOP
Decrement
Move
LOOP
loop
Program
Determine address of"Next" number and add
N
SUM
n
R0Clear
Branch>0
•••
•••
Branch target
Conditional branch
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Condition Codes
• Condition code flags
• Condition code register / status register
• N (negative)
• Z (zero)
• V (overflow)
• C (carry)
• Different instructions affect different flags
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Summery: Basic Instruction Types
• Three-Address Instructions
– ADD R1, R2, R3 R3 ← R1 + R2
• Two-Address Instructions
– ADD R1, R2 R2 ← R1 + R2
• One-Address Instructions
– ADD M AC ← AC + M[AR]
• Zero-Address Instructions
– ADD TOS ← TOS + (TOS – 1)
• RISC Instructions
– Lots of registers. Memory is restricted to Load & Store
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Conditional Branch Instructions
• Example:
– A: 1 1 1 1 0 0 0 0
– B: 0 0 0 1 0 1 0 0
A: 1 1 1 1 0 0 0 0
+(−B): 1 1 1 0 1 1 0 0
1 1 0 1 1 1 0 0
C = 1
S = 1
V = 0
Z = 0
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Addressing Modes
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• Register mode
– Operand is in the processor register
– Name of the register is given in the instruction
• Absolute/Direct mode
– Operand is in memory location.
– Address of the memory location is given in the
instruction
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• Immediate
– Operand is given explicitly in the instruction
– The use of a constant in “MOV #5, R1,”, i.e. R1 ← 5
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• Indirect Address
– Indicate the memory location that holds the
address of the memory location that holds the
dataAR = 101
100
101
102
103
104
0 1 0 4
1 1 0 A
i.e., Operand is avialable in memory,
That Memory address is avialable in either
register or Memory.
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• Index mode – the effective address of the operand is
generated by adding a constant value to the contents of a
register.
• X(Ri):
EA = X + [Ri]
• Several variations:
(Ri, Rj): EA = [Ri] + [Rj]
X(Ri, Rj): EA = X + [Ri] + [Rj]
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• Indexed
– EA = Index Register + Relative Addr
100
101
102
103
104
Rj = 100
1 1 0 A
Ri = 2
+
Could be Positive or Negative
(2’s Complement)
Useful with “Autoincrement” or “Autodecrement”
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• Relative mode – the effective address is determined by
the Index mode using the program counter in place of
the general-purpose register.
• X(PC) – note that X is a signed number
• Branch>0 LOOP
• This location is computed by specifying it as an offset
from the current value of PC.
NOTE: Branch target may be either before or after the
branch instruction, the offset is given as a singed num.
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100
101
102
103
104
0
1
2
• Relative Address
– EA = PC + Relative Addr
AR = 100
1 1 0 A
PC = 2
+
Could be Positive or Negative
(2’s Complement)
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• Autoincrement mode – the effective address of the operand is the contents of a register specified in the instruction. After accessing the operand, the contents of this register are automatically incremented to point to the next item in a list.
• (Ri)+. The increment is 1 for byte-sized operands, 2 for 16-bit operands, and 4 for 32-bit operands.
• Autodecrement mode: -(Ri) – decrement first
R0Clear
R0,SUM
R1
(R2)+,R0
Figure : The Autoincrement addressing mode used in the program
Initialization
Move
LOOP Add
Decrement
LOOP
#NUM1,R2
N,R1Move
Move
Branch>0
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Addressing Modes
• The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes.
Name Assembler syntax Addressing function
Immediate #Value Operand = Value
Register R i EA = Ri
Absolute(Direct) LOC EA = LOC
Indirect (Ri ) EA = [Ri ]
(LOC) EA = [LOC]
Index X(R i) EA = [Ri ] + X
Basewith index (Ri ,Rj ) EA = [Ri ] + [Rj ]
Basewith index X(R i ,Rj ) EA = [Ri ] + [Rj ] + X
and offset
Relative X(PC) EA = [PC] + X
Autoincrement (Ri )+ EA = [Ri ] ;Increment R i
Autodecrement (R i ) Decrement R i ;
EA = [Ri ]
−
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