chapter 2
DESCRIPTION
Chapter 2. B. V. alues represented. Sign and. b. b. b. b. magnitude. 1'. s complement. 2'. s complement. 3. 2. 1. 0. +. 7. +. 7. +. 7. 0. 1. 1. 1. +. 6. +. 6. +. 6. 0. 1. 1. 0. +. 5. +. 5. +. 5. 0. 1. 0. 1. +. 4. +. 4. +. 4. 0. 1. 0. 0. +. - PowerPoint PPT PresentationTRANSCRIPT
![Page 1: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/1.jpg)
Chapter 2
![Page 2: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/2.jpg)
0000000011111111
00000000
1111
1111
1100110000110011
1010101001010101
1+
1-
2+3+4+5+6+7+
2-3-4-5-6-7-
8-0+0-
1+2+3+4+5+6+7+
0+7-6-5-4-3-2-1-0-
1+2+3+4+5+6+7+
0+
7-6-5-4-3-2-1-
b3b2b1b0Sign and
magnitude 1's complement 2's complement
B Values represented
Figure 2.1. Binary, signed-integer representations.
![Page 3: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/3.jpg)
second wordfirst word
Figure 2.5. Memory words.
n bits
last word
i th word
•••
•••
![Page 4: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/4.jpg)
Figure 2.6. Examples of encoded information in a 32-bit word.
(b) Four characters
charactercharactercharacter character
(a) A signed integer
Sign bit: for positive numbers for negative numbers
ASCIIASCIIASCIIASCII
32 bits
8 bits 8 bits 8 bits 8 bits
b31 b30 b1 b0
b31 0=b31 1=
• • •
![Page 5: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/5.jpg)
2k 4- 2k 3- 2k 2- 2k 1- 2k 4-2k 4-
0 1 2 3
4 5 6 7
0 0
4
2k 1- 2k 2- 2k 3- 2k 4-
3 2 1 0
7 6 5 4
Byte addressByte address
(a) Big-endian assignment (b) Little-endian assignment
4
Wordaddress
•••
•••
Figure 2.7. Byte and word addressing.
![Page 6: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/6.jpg)
Register Transfer Notation
[ ] means “content of” [R2] means “content of register R2” [A] means “content of memory location A”
means “transfer content” R1 [R2] means “transfer content of register R2 to register R1”
![Page 7: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/7.jpg)
Register Transfer Notation
R1 [LOC] Transfer the content of memory
location LOC to register R1
R3 [R1] + [R2] Sum the contents of registers R1 and R2
and transfer the result to R3
![Page 8: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/8.jpg)
Assembly Language Notation
• MOVE LOC, R1• ADD R1, R2• SUB R1, R2, R3
– Mnemonic op codes– Symbolic addresses
![Page 9: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/9.jpg)
R0, CB, R0A, R0
Movei + 8
Begin execution here Movei
ContentsAddress
C
B
A
the programData for
segmentprogram3-instruction
Addi + 4
Figure 2.8. A program for C +
•••
•••
•••
![Page 10: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/10.jpg)
NUM n
NUM2NUM1
R0,SUMNUM n ,R0
NUM3,R0NUM2,R0NUM1,R0
Figure 2.9. A straight-line program for adding n numbers.
AddAddMove
SUM
i
MoveAdd
i 4n+i 4n 4-+
i 8+i 4+
•••
•••
•••
n-1 ADD
instructions
![Page 11: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/11.jpg)
N,R1Move
NUM n
NUM2NUM1
R0,SUM
R1"Next" number to R0
Figure 2.10. Using a loop to add n numbers.
LOOPDecrement
Move
LOOP
loopProgram
Determine address of"Next" number and add
NSUM
n
R0Clear
Branch>0
•••
•••
N times
![Page 12: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/12.jpg)
Table 2.1 Generic addressing modesName Assembler syntax Addressing functionImmediate #Value Operand = ValueRegister Ri EA = RiAbsolute (Direct) LOC EA = LOCIndirect (Ri) EA = [Ri ]
(LOC) EA = [LOC]Index X(Ri) EA = [Ri ] + XBase with index (Ri,R j) EA = [Ri ] + [R j ]Base with index X(Ri,R j) EA = [Ri ] + [R j ] + X
and offsetRelative X(PC) EA = [PC] + XAutoincrement (Ri )+ EA = [Ri ];
Increment RiAutodecrement −(Ri ) Decrement Ri ;
EA = [Ri ]
EA = effective address Value = a signed number
![Page 13: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/13.jpg)
Immediate Addressing
• Operand is part of the instruction
• Operand is in the address field
• Example: ADD 17
– Add 17 to the contents of the accumulator
– 17 is the operand
![Page 14: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/14.jpg)
OP CODE OPERAND
Instruction word:
ADD 17
•No memory reference to fetch the data
• Fast
• Limited range of values
![Page 15: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/15.jpg)
OP CODE Address
Direct Addressing (Register)
Registers
Operand
INC R4
R0
R1
R2
R3
R4
R5
![Page 16: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/16.jpg)
OP CODE Address
Direct Addressing (Absolute)
Memory
OperandADD LOC
![Page 17: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/17.jpg)
R1
Add (R1), R0 Add (A), R0
Figure 2.11. Indirect addressing.
RegisterB B Operand
memoryMain
(a) Through a general-purpose register (b) Through a memory location
A BOperandB
![Page 18: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/18.jpg)
Clear R0
Contents
Move
Add
DecrementAdd
LOOP
Initialization
LOOP
Address
Figure 2.12. Use of indirect addressing in the program of Figure 2.10.
(R2), R0#4, R2R1
R0,SUM
MoveMove N,R1
#NUM1, R2
Branch > 0
Add N numbers starting with NUM1
![Page 19: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/19.jpg)
Operand1020
Figure 2.13. Indexed addressing.
Add 1000(R1),R2
R1
R1
Add 20(R1),R2
Operand1020
201000
20 = offset
20 = offset
10001000
(a) Offset is given as a constant
(b) Offset is in the index register
see next
![Page 20: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/20.jpg)
1020
Figure 2.13. Indexed addressing.
R1Add 20(R1), R2
20 = offset
1000
1000
(a) Offset is given as a constant
Operand
base address
index: 0,4,8,16,20,etc.
![Page 21: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/21.jpg)
1020
Figure 2.13. Indexed addressing.
R1Add 1000(R1), R2
20 = offset
20
1000
(a) Offset is in the register
Operand
base address
index: 0,4,8,16,20,etc.
![Page 22: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/22.jpg)
Figure 2.14. A list of students' grades.
Student 1
Student 2
Test 3Test 2Test 1
Student IDTest 3Test 2
Student IDnN
LISTTest 1LIST + 4
LIST + 8LIST + 12LIST + 16
•••
![Page 23: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/23.jpg)
Move #LIST, R0
Add
MoveAdd
12(R0), R3
LOOP
Figure 2.15. Indexed addressing used in accessing test scores in the list in Figure 2.14.
#16, R0
Clear R1
Clear R3
4(R0), R1
Clear R2
Add 8(R0), R2
N,R4
Decrement R4LOOP
Move R1, SUM1Move R2, SUM2Move R3, SUM3
Branch > 0
Add
;base of array
;number of students;first test score;second;third
;accumulator for T1;accumulator for T2;accumulator for T3
;next student;decrement count
![Page 24: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/24.jpg)
R0Clear
R0,SUM
R1(R2)+, R0
Figure 2.16. The Autoincrement addressing mode used in the program of Figure 2.12.
Initialization
Move
LOOP AddDecrement
LOOP
#NUM1, R2N, R1Move
Move
Branch>0
Add N numbers starting with NUM1
![Page 25: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/25.jpg)
NUM2
NUM n
NUM1
R0Clear
R0,SUM
R1#4,R2(R2),R0
Figure 2.17. Memory arrangement for the program in Figure 2.12.
100
132
604
212208204200
128124120116112108104100
SUMN
LOOP
LOOPDecrementAddAdd
Move
#NUM1,R2N,R1Move
Move
Branch>0
the list (array) of numbers
the program
accumulator for sumlength of list
![Page 26: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/26.jpg)
Table 2.1 Generic addressing modesName Assembler syntax Addressing functionImmediate #Value Operand = ValueRegister Ri EA = RiAbsolute (Direct) LOC EA = LOCIndirect (Ri) EA = [Ri ]
(LOC) EA = [LOC]Index X(Ri) EA = [Ri ] + XBase with index (Ri,R j) EA = [Ri ] + [R j ]Base with index X(Ri,R j) EA = [Ri ] + [R j ] + X
and offsetRelative X(PC) EA = [PC] + XAutoincrement (Ri )+ EA = [Ri ];
Increment RiAutodecrement −(Ri ) Decrement Ri ;
EA = [Ri ]
EA = effective address Value = a signed number
![Page 27: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/27.jpg)
Memory Addressingaddress ordatalabel Operation information
SUM EQU 200ORIGIN 204
N DATAWORD 100NUM1 RESERVE 400
ORIGIN 100START MOVE N,R1
MOVE #NUM1, R2CLR R0
LOOP ADD (R2), R0ADD #4, R2DEC R1BGTZ LOOPMOVE R0, SUMRETURNEND START
Figure 2.18. Assembly language representation for the program in Figure 2.17.
assembler directives
assembler directives
statements that generate machine instructions
![Page 28: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/28.jpg)
The Assembler(first pass)
Read the AL program file, processing the directives and locating all of the labels
Assign addresses to instructions and data
Build a symbol table containing all of the names (labels) and their corresponding values (addresses)
![Page 29: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/29.jpg)
Symbol table for the example:
SUM 200 from the EQU directive
N 204 from the ORIGIN directive
NUM1 208 counting from ORIGIN
START 100 from 2nd ORIGIN
LOOP 112 counting from ORIGIN
![Page 30: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/30.jpg)
The Assembler(second pass)
Read the AL program file again
Replace all mnemonic op codes with their binary code values
Replace all symbolic addresses (labels) with their numeric value
Generate a code file with the machine language program
![Page 31: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/31.jpg)
DATAIN
SIN
Keyboard
Processor
Bus
Figure 2.19 Bus connection for processor, keyboard, and display
DATOUT
SOUT
Display
![Page 32: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/32.jpg)
DATAIN
SIN
Keyboard
Processor
Bus
Figure 2.19 Bus connection for processor, keyboard, and display
DATOUT
SOUT
Display
buffers flags
![Page 33: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/33.jpg)
DATAIN
SIN
Keyboard
Processor
Bus
keystroke puts character in DATAIN, sets flag SIN to 1 to indicate to processor that character can be read
Program:
READWAIT Branch to READWAIT if SIN = 0 ;wait for keystroke
Input content of DATAIN to R1
![Page 34: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/34.jpg)
Processor
Bus
DATOUT
SOUT
Display
display sets flag SOUT to 1 to indicate to processor that it is ready to receive a character
Program:
WRITEWAIT Branch to WRITEWAIT if SOUT = 0 ;wait for display
Output content of R1 to DATAOUT
![Page 35: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/35.jpg)
READWAIT Branch to READWAIT if SIN = 0
Input content of DATAIN to R1
WRITEWAIT Branch to WRITEWAIT if SOUT = 0
Output content of R1 to DATAOUT
“busy wait”
What the CPU Must Do
![Page 36: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/36.jpg)
READWAIT Testbit #3, INSTATUS
Branch=0 READWAIT
MoveByte DATAIN, R1
WRITEWAIT Testbit #3, OUTSTATUS
Branch=0 WRITEWAIT
MoveByte R1, DATAOUT
Assembler Language Instructions
device status registers
![Page 37: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/37.jpg)
Move #LOC, R0 Initialize pointer to register R0 to point to the address of the first location in memory where the characters are to be stored
READ TestBit #3, INSTATUS Wait for a character to be entered in the Branch=0 READ keyboard buffer DATAINMoveByte DATAIN, (R0) Transfer the character from DATAIN into the
memory (this clears SIN to 0)ECHO TestBit #3, OUTSTATUS Wait for the display to become ready
Branch=0 ECHOMoveByte (R0), DATAOUT Move the character just read to the display
buffer register (this clears SOUT to 0)Compare #CR, (R0)+ Check if the character just read is CR
(carriage return). If it is not CR, thenBranch= READ branch back and read another character
and also increment the pointer to store the next character
Figure 2.20. A program that reads a line of characters and displays it.
![Page 38: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/38.jpg)
![Page 39: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/39.jpg)
![Page 40: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/40.jpg)
![Page 41: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/41.jpg)
Calling programMove N, R1 R1 serves
as a counter.Move #NUM1, R2 R2 points
to the list.Call LISTADD Call
subroutine.Move R0, SUM Save
result.
...
SubroutineLISTADD Clear R0 Initialize sum to 0.LOOP Add (R2)+, R0 Add entry from list.
Decrement R1Branch>0 LOOPReturn Return to calling
program.Figure 2.25 Program of Figure 2.16 written as a subroutine;
parameters passed through registers.
![Page 42: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/42.jpg)
Figure 2.26. Program of Figure 2.16 written as a
subroutine; parameters passed on the stack.
Assume top of stack is at level 1 below.Move #NUM1,−(SP) Push parameters onto stack.Move N,−(SP)Call LISTADD Call subroutine
(top of stack at level 2).Move 4(SP),SUM Save result.Add #8,SP Restore top of stack
(top of stack at level 1).
...
LISTADD MoveMultiple R0−R2,−(SP) Save registers(top of stack at level 3).
Move 16(SP),R1 Initialize counter to n.Move 20(SP),R2 Initialize pointer to the list.Clear R0 Initialize sum to 0.
LOOP Add (R2)+,R0 Add entry from list.Decrement R1Branch>0 LOOPMove R0,20(SP) Put result on the stack.MoveMultiple (SP)+,R0−R2 Restore registers.Return Return to calling program.
![Page 43: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/43.jpg)
![Page 44: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/44.jpg)
![Page 45: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/45.jpg)
Memory location Instructions Comments
Main program
...
2000 Move PARAM2, −(SP) Place parameters on stack.2004 Move PARAM1, −(SP)2008 Call SUB12012 Move (SP), RESULT Store result.2016 Add #8, SP Restore stack level.2020 next instruction
...
First subroutine
2100 SUB1 Move FP, −(SP) Save frame pointer register.2104 Move SP,FP Load the frame pointer.2108 MoveMultiple R0−R3,−(SP) Save registers.2112 Move 8(FP), R0 Get first parameter.
Move 12(FP), R1 Get second parameter.
...
Move PARAM3, −(SP) Place a parameter on stack.2160 Call SUB22164 Move (SP)+, R2 Pop SUB2 result into R2.
...
Move R3, 8(FP) Place answer on stack.MoveMultiple (SP)+, R0−R3 Restore registers.Move (SP)+, FP Restore frame pointer register.Return Return to Main program.
Second subroutine
3000 SUB2 Move FP,−(SP) Save frame pointer register.Move SP,FP Load the frame pointer.MoveMultiple R0−R1,−(SP) Save registers R0 and R1.Move 8(FP),R0 Get the parameter.
...
Move R1,8(FP) Place SUB2 result on stack.MoveMultiple (SP)+,R0−R1 Restore registers R0 and R1.Move (SP)+,FP Restore frame pointer register.Return Return to Subroutine 1.
Figure 2.28 Nested subroutines.
![Page 46: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/46.jpg)
Memory location Instructions Comments
Main program
...
2000 Move PARAM2, −(SP) Place parameters on stack.2004 Move PARAM1, −(SP)2008 Call SUB12012 Move (SP), RESULT Store result.2016 Add #8, SP Restore stack level.2020 next instruction
...
Figure 2.28 Nested subroutines.
![Page 47: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/47.jpg)
Memorylocation Instructions Comments
First subroutine
2100 SUB1 Move FP, −(SP) Save frame pointer register.2104 Move SP,FP Load the frame pointer.2108 MoveMultiple R0−R3, −(SP) Save registers.2112 Move 8(FP), R0 Get first parameter.
Move 12(FP), R1 Get second parameter.
...
Move PARAM3, −(SP) Place a parameter on stack.2160 Call SUB22164 Move (SP)+, R2 Pop SUB2 result into R2.
...
Move R3, 8(FP) Place answer on stack.MoveMultiple (SP)+, R0−R3 Restore registers.Move (SP)+, FP Restore frame pointer
register.Return Return to Main program.
Figure 2.28 Nested subroutines.
![Page 48: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/48.jpg)
Memorylocation Instructions Comments
Second subroutine
3000 SUB2 Move FP,−(SP) Save frame pointer register.Move SP,FP Load the frame pointer.MoveMultiple R0−R1,−(SP) Save registers R0 and R1.Move 8(FP),R0 Get the parameter.
...
Move R1,8(FP) Place SUB2 result on stack.MoveMultiple (SP)+,R0−R1 Restore registers R0 and R1.Move (SP)+,FP Restore frame pointer
register.Return Return to Subroutine 1.
Figure 2.28 Nested subroutines.
![Page 49: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/49.jpg)
Figure 2.29. Stack frames for Figure 2.28.
FP
FP
[FP] from SUB12164
Stackframe
forfirst
subroutine
[R0] from Main
param3[R3] from Main[R2] from Main[R1] from Main
Old TOS
2012[FP] from Main
param1param2
[R0] from SUB1[R1] from SUB1
Stackframe
forsecond
subroutine
![Page 50: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/50.jpg)
Figure 2.30. Logical shift instructions.
carry flag fill with zeros
![Page 51: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/51.jpg)
Figure 2.30. Logical shift instructions.
carry flagfill with zeros
![Page 52: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/52.jpg)
Figure 2.30. Arithmetic shift instructions.
carry flagretain the “sign bit”
![Page 53: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/53.jpg)
Move #LOC, R0 R0 points to data.MoveByte (R0)+, R1 Load first byte into R1.LShiftL #4, R1 Shift left by 4 bit positions.MoveByte (R0), R2 Load second byte into R2.And #$F, R2 Eliminate high-order bits.Or R1, R2 Concatenate the BCD digits.MoveByte R2, PACKED Store the result.
Figure 2.31. A routine that packs two BCD digits.
#$F: 00 …01111 (28 leading zeros)
![Page 54: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/54.jpg)
Figure 2.32. Rotate instructions.
CR0
before:
after:
0
1
0 0 01 1 1 . . . 11
1 0 1 1 1 001
(c) Rotate r ight without carr y RotateR #2,R0
(a) Rotate left without carr y RotateL #2,R0
C R0
before:
after:
0
1
0 0 01 1 1 . . . 11
1 10 . . . 10101
C
before:
after:
0
1
0 0 01 1 1 . . . 11
1 0 1 1 1 000
(d) Rotate r ight with carr y RotateRC #2,R0
R0
. . .
. . .
(b) Rotate left with carr y RotateLC #2,R0
C R0
before:
after:
0
1
0 0 01 1 1 . . . 11
1 10 . . . 00101
![Page 55: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/55.jpg)
Figure 2.32. Rotate instructions.
![Page 56: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/56.jpg)
Figure 2.32. Rotate instructions.
![Page 57: Chapter 2](https://reader034.vdocuments.us/reader034/viewer/2022042719/56812a75550346895d8dfb3a/html5/thumbnails/57.jpg)
OP code
Figure 2.39. Encoding instructions into 32-bit words.
Source Dest Other info
8 7 7 10
(b) Two-word instruction
Memory address/Immediate operand
OP code
(c) Three-operand instruction
R i R j Other infoRk
OP code Source Dest Other info
(a) One-word instruction