center for integrated systems preamplifier in 0.5 a...
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A 2.125 Gbaud 1.6kΩ Transimpedance
Preamplifier in 0.5µm CMOS
Sunderarajan S. Mohan
Thomas H. Lee
Center for Integrated Systems
Stanford University
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
OUTLINE
• Motivation
• Shunt-peaked Amplifier
• Inductor Modeling and Optimization
• Circuit Layout and Measurement
• Summary
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
SYSTEM OVERVIEW
Opticalfiber Photo
diode
Pre-AGC
Var. gainamp
amp
Decisioncircuit
Clocksynthesizer
Digitaldata
• Pre-amp design is critical
• Challenge: CMOS implementation
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CMOS VS. GAAS
Factor GaAs CMOS
Performance Excellent Sufficient for up to low GHz
Integration Photodiode with Pre-amp Analog and Digital
Cost High Low
• Photodiode in GaAs
• Flip-chip techniques can reduce parasitics at the GaAsto CMOS transition
• Parasitic coupling from digital to analogis a challenge for integration
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE AMPLIFIER
Photodiode
Transimpedanceamplifier
−
+
Cd Cg
Rf
A
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
• ω3dB = 1RinCin
= (A+1)Rf(Cd+Cg)
≈ ARf(Cd+Cg)
• AMAX = k ωT
ω3dBwhere (k ≈ 1)
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE LIMIT
• Rf,MAX ≈ kωT
ω3dB2(Cd+Cg)
• Desire maximum Rf for sensitivity,stability and high gain
• Need to circumvent this limit
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CIRCUMVENTING THE TRANSIMPEDANCE LIMIT
Common-gatestage
Photodiode transimpedance stage
−
+
Cg
Rf
A
Shunt-peaked
Cd
• Decouple photodiode from the transimpedance stagewith common-gate stage
• Increase gain-bandwidth product by shunt-peaking
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
SHUNT-PEAKED AMPLIFIER
Common Source Amplifier
R
C
Vdd
vout
vin
Shunt-peaked Amplifier
L
R
C
Vdd
vout
vin
• Bandwidth enhancement using zeros
• No additional power dissipation
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
SMALL SIGNAL MODELS
Common Source Amplifier
R C
vout
gmvin
• One pole
• vout
vin(ω) = gmR
1+jωRC
Shunt-peaked Amplifier
L
R
C
vout
gmvin
• One zero, two poles
• vout
vin(ω) = gm(R+jωL)
1+jωRC−ω2LC
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
MAGNITUDE RESPONSE
No peakingOptimum group delayMaximally flatMaximum bandwidth
0 0.20.4 0.4
0.5
0.6
0.6
0.7
0.8
0.8
0.9
1.0
1.0
1.1
1.2 1.4 1.6 1.8 2.0Normalized frequency
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
PHASE RESPONSE
No peakingOptimum group delayMaximally flatMaximum bandwidth
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
−10
−20
−30
−40
−50
−60
−70
−80
−90
Normalized frequency
Pha
se
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
FREQUENCY RESPONSE
L
R
C
vout
gmvin
• Two time constants:τC = RC , τL = L/R
• Ratio determines performance:m = τL
τC= L
R2C
Factor ( m) Normalized ω3dB Response
0 1.00 No shunt peaking
0.32 1.60 Optimum group delay
0.41 1.72 Maximally flat
0.71 1.85 Maximum bandwidth
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
ON-CHIP SHUNT PEAKING : PREVIOUS WORK
Bond-wire inductor
Vdd
Lbondwire
Rvout
vin
Cg
Cbondpad
Cd Cload
• Large Cbondpad
• Limited Lbondwire
• Coupling issues
Maximum Q on-chip
Vdd
L
R
Rs
vout
vin
Cg
CL
Cd Cload
• Large CL
• Large area
• Limited L
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
ON-CHIP SHUNT PEAKING: NEW
Vdd
L
(R − Rs)
Rs
vout
vin
Cg
CL
Cd Cload
• Work with inductor parasitics
• Rs is not an issue(now part of load resistance)
• Inductor Q is not relevant
• Minimize area and CL
• L determined byR, Cload, CL and Cd
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
MODELING CHALLENGE
• Simultaneous optimization ofactive and passive components
• 3-D field solvers are inconvenient
Numerically expensive and cumbersome
Good for verification but not for design
• Scalable, analytical models
Design guidelines and explore trade-offs
Circuit design and optimization
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
INDUCTOR MODELING
Two port (without PGS)Cs
RsLport 2
RsiCsi
Cox
Rsi Csi
Cox
port 1
substrate
One port (with PGS)
CL = Cox + Cs Rs
L
• Simple expressions for Rs, Cox and Cs
• Patterned ground shield (PGS) eliminates Rsi and Csi
• NEED simple, accurate expression for inductance!
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CURRENT SHEET APPROACH
AD
w
s
nI
OD = (1 + ρ)AD
ρAD = nw + (n − 1)s
• Reduce complexity by 4n2
• Use symmetry
• Derive simple expression using GMD, AMD and AMSD
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
GMD, AMD AND AMSD
l I
w2
w2
x1 x2
−w
2< x1, x2 <
w
2
ln (GMD) = ln |x1 + x2| = lnw − 1.5
AMD = |x1 + x2| =w
3
AMSD2 = (x1 + x2)2 =w2
6
L = µl2π
[ln
(2l
GMD
) − 1 + AMDl − AMSD2
4l2
]
= µl2π
[ln
(2lw
)+ 0.5 + w
3l − w2
24l2
]
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
INDUCTANCE EXPRESSSION
ws
ODID
AD
• AD = 0.5(OD + ID)
• ρ = OD−IDOD+ID
• ρAD = nw + (n − 1)s
• L = 2µn2ADπ
[ln
(2.067
ρ
)+ 0.176ρ + 0.125ρ2
]
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
INDUCTANCE EXPRESSSION
00 1 2 3 4 5 6 7
20
40
60
80
100
% Absolute error
%In
duct
ors
exce
edin
gab
s.er
ror
Min Max
L(nH) 0.1 70
OD(µm) 100 400
n 1 20
s/w 0.02 3
ρ 0.03 0.95
Verified by measurements (75) and 3-D field solver simulations (19,000)
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE STAGE
Vdd
L
(R − Rs)
Rs
Rf
vout
iin Cin Cg
CL
Cd Cload
• Input current drive
• Cascode stage
• On-chip shunt-peaking
• Feedback
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
DESIGN METHODOLOGY
1. Design and optimize transimpedance stagewithout shunt peaking
2. Transistor current determines conductor width, w
3. Lithography sets spacing, s
4. Choose n and AD to realize desired Lwhile minimizing parasitic capacitance and area
5. Increase transimpedance resistance, Rf
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
OPTIMIZATION VIA GEOMETRIC PROGRAMMING
• Simultaneous optimization ofactive and passive components
• Global Optimum or Proof of Infeasibility
DAC99, Session 54.3 (June 24, 1999):
Optimization of Inductor Circuits
via Geometric Programming
Maria del Mar Hershenson, Sunderarajan S. Mohan
Stephen P. Boyd and Thomas H. Lee
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
EXPERIMENTAL VERIFICATION OF INDUCTOR
real(ZL) measuredreal(ZL) predictedimag(ZL) measuredimag(ZL) predicted
0 0 0.5 1.0 1.5 2.0 2.5 3.0
200
400
600
800
1000
Frequency (GHz)
Impe
danc
e(Ω
) • OD = 180µm
• w = 3.2µm
• s = 2.1µm
• n = 11.75
• Lmeas = 20.5nH
• Lpred = 20.3nH
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
COMMON-GATE STAGE
Vdd
Photodiode
Common-gatestage
Shunt-peakedtransimpedance stage
• Decouple sensitive feedback nodefrom external capacitances
• Realize higher transimpedance
• Extra power
• Additional noise terms
• Junction capacitances degrade noiseat high frequency
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
DIFFERENTIAL PREAMPLIFIER
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE BANDWIDTH
0 0.2 0.4 0.6 0.8 1.0 1.2
1200
1400
1600
1800
800
1000
CPD = 100fF
CPD = 300fF
CPD = 500fF
CPD = 700fF
frequency (GHz)
Tran
smpe
danc
e(Ω
)
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
INPUT REFERRED CURRENT NOISE DENSITY
0 0 0.5 1.0 1.5 2.0
10
20
30
40γ = 2/3γ = 4/3γ = 2
frequency (GHz)
pA/√ H
z
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
EYE DIAGRAM
1.6 Gb/s
mV
ns
05
101520
−5−10−15−20−25
25
6.2 6.4 6.6 6.8 7.0 7.2
2.1 Gb/s
mV
ns
0
40
120
80
−40
−120
−80
6.0 6.2 6.4 6.6 6.8 7.0
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
PERFORMANCE SUMMARY
Transimpedance (small-signal) 1600Ω (differential)
800Ω (single-ended)
Bandwidth (3dB) 1.2GHzMax. photodiode capacitance 0.6pFMax. input current 1.0mASimulated input noise current 0.6µAMax. output voltage swing 1.0Vpp (differential)
(50Ω load at each output) 0.5Vpp (single-ended)
Power consumption 115mW (core)
110mW (50Ω driver)
Die area 0.6mm2
Technology 0.5µm CMOS
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CONTRIBUTIONS
• Shunt-peaking with optimized on-chip inductor
• Simple accurate expression for inductance
• Common-gate input stage
• CMOS implementation of differential preamplifier
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
ACKNOWLEDGMENTS
IBM fellowship support
Rockwell InternationalDr. Christopher HullDr. Paramjit Singh
Prof. L. Kazovsky and Dr. Allen Lu
Dr. C. Patrick Yue, Dr. Derek Shaeffer, Dr. Arvin ShahaniMaria del Mar Hershenson and Dr. Ali Hajimiri
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.