CEN 316

Computer Architecture for Computer Science

Dr. Mansour Al Zuair

References:

www.cs.berkeley.edu/~patterson

Dr. Hisham Al Twaijry presentations

www.cs.berkeley.edu/~lazzaro

Computer Organization and DesignComputer Abstractions and Technology

2

Class Objectives° You want to call yourself a “computer scientist”

° You need to make a purchasing decision or offer “expert” advice?

° Understand the interface between the software and hardware.• The basis of understanding the program performance• design the system software (compiler, OS) for a new processor

° To learn the factors affecting the performance of a program and how to improve the performance

• choose right computers for a set of applications in a project.• interpret the benchmark figures given by salespersons.• Write efficient programs

° To learn the principles for designing processors and systems and • To learn the system configuration trade-off• techniques to improve the performance of hardware

3

Class Objectives

° Understand assembly-language programming

• Write assembler-language programs for MIPS

• Know how programs translate to machine language

° Learn system functional partition and interfaces

• Processor, memory, input/output

° Understand performance assessment & components

• Interpret measures and avoid common flaws

• Know how system characteristics affect performance

° Understand basic computer arithmetic

° Understand how computer “executes” instructions

° Understand basics of modern memory and I/O systems

4

Today’s Lecture°Computer architecture forces and trends

• Technology- Semiconductor

- Magnetic storage

• System price/performance 1965..today

• Future

°Define Computer Architecture• Levels of abstraction

• Computer system organization

5

Computer Architecture° Computer Architecture =

Instruction Set Architecture + Machine Organization

° Instruction set• What does the machine understand?

• What does the machine need to understand?

• What is the interface between hardware and software?

° Machine organization• How does it work?

• How do we design a computer?

• How does the speed depend on the design?

6

Anatomy: 5 components of any Computer

Personal Computer

Processor

Computer

Control(“brain”)

Datapath(“brawn”)

Memory

(where programs, data live whenrunning)

Devices

Input

Output

Keyboard, Mouse

Display, Printer

Disk (where programs, data live whennot running)

7

Computer Technology - Dramatic Change!°Processor

• 2X in speed every 1.5 years (since ‘85); 100X performance in last decade.

°Memory• DRAM capacity: 2x / 2 years (since ‘96); 64x size improvement in last decade.

°Disk• Capacity: 2X / 1 year (since ‘97)

• 250X size in last decade.

8

Tech. Trends: Microprocessor Complexity

2X transistors/Chip Every 1.5 to 2.0 yearsCalled “Moore’s Law”

9 `

Technology Trends: Memory Capacity(Single-Chip DRAM)

• Now 1.4X/yr, or 2X every 2 years.

10

Moore’s Law

Moore’s Law: No. Transistors per chip increases 4 every 3 yearsCAGR = 60%

TransistorsPer Die

Pentium™Processor

8080

8086

80286

Intel386™Processor

Intel486™Processor

20001970 1975 1980 1985 1990 1995

4004

108

107

106

105

104

103

102

101

1

16M

1K

4K16K

64K

256K1M

4M

11

Performance Growth

HP 9000/750

SUN -4/260

MIPS M2000

MIPS M/120

IBMRS6000

100

200

300

400

500

600

700

800

900

1100

DEC Alpha 5/500

DEC Alpha 21264/600

DEC Alpha 5/300

DEC Alpha 4/266

DEC AXP/500IBM POWER 100

Year

Pe r

for

ma n

ce

0

1000

1200

19971996199519941993199219911990198919881987

Workstation Performance Improving 54% per year

12

System Price/Performance

DEC VAX11/7801 MIPS1 MB

$200K

$200K per MIPS

1977

IBM System 360/500.15 MIPS

64 KB$1M

$6.6M per MIPS

Intel Xeon Dual core3 GH

More than 18000 MIPS$2000

$.11 per MIPS

1965 2005

Types of computers

13

Types of microprocessors

14

Program Performance

15

HW or SW component

How this component affect performance

Where is this topic covered

Algorithm Determine both the number of source-level statements and the number of IO operations executed

Not this course

Programming language, compiler and architecture

Determine the number of machine instructions for each source level statement

Chapter 2 and 3

Processor and memory system

Determine how fast instructions can be executed

Chapters 5,6, and 7

I/O system Determine how fast I/O operations may be executed

Chapter 8

Below your Program

16

17

Where is “Computer Architecture and Engineering”?

*Coordination of many levels of abstraction

I/O systemProcessor

CompilerOperating

System(Windows 2K)

Application (Netscape)

Digital DesignCircuit Design

Instruction Set Architecture

Datapath & Control

transistors

MemoryHardware

Software Assembler

18

Key Concepts of Abstraction° Instruction Set Architecture (ISA)

• Functional interface for assembly-language programmer

• Examples: MIPS, SPARC, PowerPC, HP PA, Alpha, Intel (x86), IBM System/390, IBM AS/400

° Implementation (Machine Organization)• Partitioning into units and logic design

• Examples- Intel386 CPU, Intel486 CPU, Pentium® Processor,

Pentium® II Processor, ..

- Alpha 21064, 21164, 21264

19

Key Concepts of Abstraction°Realization

• Physical fabrication and assembly

• Examples- IBM 703(?) built with vacuum tubes and

7090(?) built with transistors

- Pentium Processor in 0.8 mm, 0.6mm, 0.35 mm BiCMOS/CMOS

20

Forces on Computer Architecture

ComputerArchitecture

Technology Programming Languages

Operating systemsHistory

ApplicationsOrganizational

techniques

21

Instruction Set Architecture

° “... Consists of:• Organization of storage

• Data types

• Encoding and representations (instruction formats)

• Instruction (or Operation Code) Set

• Modes for addressing data Items and instructions

• Program visible exceptional conditions

° Specifies requirements for binary compatibility across implementations

22

MIPS I Instruction Set Architecture

° Instruction Categories

• Load/Store

• Computational

• Jump and Branch

• Floating Point

- coprocessor

• Memory Management

• Special

° Three instruction Formats

R0 - R31

PC

HI

LO

OP

OP

OP

rs rt rd sa funct

rs rt immediate

jump target

23

Execution Cycle

Instruction

Fetch

Instruction

Decode

Operand

Fetch

Execute

Result

Store

Next

Instruction

Obtain instruction from program storage

Determine required actions and instruction size

Locate and obtain operand data

Compute result value or status

Deposit results in storage for later use

Determine successor instruction

Conceptual Sequence: Programmer’s view of single instruction executionISAs generally adopt with limited, specified exceptions

24

Machine Organization

° Capabilities & performance of functional units (FUs)

• registers, ALU

° Ways in which these components are interconnected

• nature of information flows between components

° Choreography of FUs to realize the ISA

° Register Transfer Level Description

° Also called microarchitecture or design architecture

Logic Designer's ViewISA Level

FUs, control units, interconnect