ca arm architecture presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · what is the...

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ARM Architecture Thomas DeMeo Thomas Becker The

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Page 1: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM Architecture

Thomas DeMeoThomas Becker

The

Page 2: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Agenda

• What is ARM?

• ARM History

• ARM Design Objectives

• ARM Architectures

Page 3: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

What is the ARM Architecture?

• Advanced RISC Machines• ARM is a 32-bit RISC ISA• Most popular 32-bit ISA on the market• Found in nearly every kind of consumer

electronic:o 90% of all embedded 32-bit RISC processorso 98% of all cell phoneso Hard drives, routers, phones, tablets, handheld

video game consoles, calculators, and more

• Recently introduced 64-bit architecture and ISA, labelled 'AArch64' or 'A64'

Page 4: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

A Bit of History...

• A company named Acorn Computers had

released the BBC Micro in 1981

• The Micro used the 6502

• Became very popular in the British

educational system

• Soon dominated by the IBM PC

Page 5: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Acorn's next steps

• Acorn was focused on meeting the needs of the business community, and this meant they needed more power.

• After trying all of the 16 and 32-bit processors on the market they found none to be satisfactory for their purposes. The data bandwidth was not sufficiently greater than the current 8-bit 6502.

• They decided to go solo.

Page 6: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Acorn's next steps

• So Acorn decided to make their own.

• Inspired by the Berkeley RISC Project, which was the basis of the SPARC processor, Acorn figured that if some graduate students could build a 32-bit processor, so could they.

• In 1983, the Acorn RISC Machine project had been established.

Page 7: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Acorn's next steps

• The 32-bit world

• Reputable R&D department

Page 8: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

A Bit of History

ARM first reached silicon in 1985, and worked just as intended. However, the architecture didn't make it into the commercial domain until 1987.

The delay was caused by problems in design and production of an ARM-based system, and not in the chip itself. Acorn's financial woes at the time also contributed to this.

Page 9: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Advanced RISC Machine

• ARM was founded as a joint venture between Acorn Computers, Apple Computer, and VLSI Technology.

• The company was intended to further the development of the Acorn RISC Machine's RISC Chip

Apple Newton Project next to Apple iPhone

Page 10: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Advanced RISC Machine

• Early 1990's financially stable. Static processor version, ARM2aS.

• Interest in ARM design leads to the formation of ARM Holdings as we know today.

• ARM began licensing its designs to chip foundries, where they would receive a royalty

Page 11: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM Design Objectives

• Designed as a small scale processor

• Good all-around performance

• Fixed instruction length, load/store model

• BASIC led to quick prototyping, but was less flexible when it came to hardware design

Page 12: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM Design Objectives

• Short design time

• Easily customized designs

Page 13: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM Design Objectives

High Performance, Low Price, Low Power Consumption

• Designed for price-to-performance ratio, not for being the most powerful

o A6 cost approximately $1 per 1 MIPS

• Relatively Low Transistor Counto ARM2 had 30K transistorso ARM6 had 35K transistorso ARM7 had 74K transistorso ARM9 had 111K transistors

Page 14: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

The ARM Architecture

• Created by Sophie Wilson• General RISC design• Additional features

o conditional instruction executiono interrupt subsystemo powerful indexed addressing modeso 2-priority level interrupt subsystemo 32-bit Barrel Shifter

• 37 registerso 30 general purposeo Program Counter

Page 15: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM Architecture CPU Modes

• User

• System (ARMv4 and above)

• Monitor (security extensions only)

• Supervisor

• Abort

• Undefined

• IRQ - Interrupt Request

Page 16: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM Architecture Versions

• ARMv1• ARMv2• ARMv3• ARMv4• ARMv5• ARMv6• ARMv7• ARMv8

o adds 64-bit architectureo newer exception system

Page 17: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

The Thumb Instruction Set

• Improve code density

• 16-bit instructions

• Implicit instructions and limited functionality

• Useful with size limitations

• Thumb-2 (2003) added 32-bit instructions

Page 18: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM Numbering

• ARM Holdings adopted a new numbering scheme

• Single number represents the processor core macrocell, main component, ARM6

• Incremented from generation to generation• Two-digit number represents self-contained

chip, ARM60• Three-digit number integrates the processor

macrocell and other ARM macrocells and logic, ARM250

Page 19: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM7

• ARMv3, ARMv4, and ARMv5 architectures

• Introduced the Thumb instruction set

• 130 MIPS on 130 nm technology

• Still quite popular

Page 20: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Examples of ARM7 products

• Nintendo Game Boy Advance

• Nintendo DS

• LEGO Mindstorms NXT

• Apple iPod

• Roomba

• Sirius Satellite Radio receiver• Most vehicles

Page 21: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM9

• ARMv4 and later ARMv5 architecture

• First ARM processor to move from Von

Neumann architecture to Harvard

architecture

• Decreased heat and power consumption

compared to ARM7

• Pipeline was changed from 3 stages to 5

Page 22: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Examples of ARM9 products

• Nintendo DS

• PSP

• Nintendo Wii

• Nokia N-Gage

• Western Digital MyBook external hard

drives

• Canon EOS 5D Mark II

Page 23: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

ARM11

• ARMv6 architecture

• Decreased heat and power consumption

compared to ARM9

• SIMD instructions for increased media

support

• Physically addressed cache

• Redesigned pipeline allowing for faster clock

Page 24: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Examples of ARM11 products

• Nintendo 3DS

• iPhone

• iPod Touch

• Zune HD

• Samsung Galaxy

• Kindle 2

• Raspberry Pi

Page 25: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Current ARM Profiles

Cortex-A• "Application"

Cortex-R• "Real-Time"

Cortex-M• "Microcontroller"

Page 26: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Future

• Cortex A15 MPo Out-of-order speculative superscalar designo Supports up to 2 clusters with up to 4 cores per

clustero Dual Coreo Late 2012o 5X performance of current smartphoneso Addressing for up to 1TB of RAMo Tegra 4, 10X Tegra 2

• Quad core slated for 2013

Page 27: CA ARM Architecture Presentationmeseec.ce.rit.edu/551-projects/spring2012/2-1.pdf · What is the ARM Architecture? • Advanced RISC Machines • ARM is a 32-bit RISC ISA • Most

Questions?