c-port network processors in 3g infrastructure systems
TRANSCRIPT
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C-Port Network Processors in 3G Infrastructure Systems
Motorola Global Software GroupIndia
Y917
Slide 2
Outline
• Overview of 3G Systems & Applicability of C-port NP for 3G systems– UMTS– CDMA-2000
• C-PORT NP Solutions for 3G - Case Studies– RNC Solutions– PDSN Application
• Implementation Challenges• Q & A
Slide 3
3G System Overview –UMTS
•Iub interface (3G Technical Specs TS 25.426, 25.430, 25.431, 25.432, 25.434) –Node B & RNC
•Iur interface (3G Technical Specs TS 25.420, 25.421, 25.422, 25.424, 25.426) –RNC
•Iu-cs & Iu-ps interfaces and Core Network Inter-working (3G Technical Specs TS 25.410 to 25.415) –RNC & RAN Gateways
•Radio Network Inter-working (3G Technical Specs TS 25.425, 25.427, 25.435) –Node B & RNC
Internal IP
Networks
MSCu
PSTN
Network
ManagementPlatform
GGSN
Node B
RNC
Node B Node B
SGSN
ApplicationServers
AuC
VLR/HLR
Iu-psGn
Iu-cs
RNC
Iur
Iub IubIub
Slide 4
3G System Overview –CDMA2000
•A3/A7 (3GPP2 A.S0015-0 v2.0) –BSC
•A8/A9 (3GPP2 A.S0016-0 v2.0) –SDF & PCF
•A10/A11 (3GPP2 A.S0017-0 v2.0) –PCF & PDSN
•Interface between BSC & BTS
Internal IP
Networks
MSC
PSTN
NetworkManagementPlatform PDSN
BTS
BSC
BTS BTS
PCF
ApplicationServers
AAA(Authentication
Server)
Home Agent
A8/A9A10/A11
A1/A2/A5
BSCA3/A7
Slide 5
C-Port Network Processor Applicability in 3G Networks
• ATM Solutions•ATM Interfaces: N*T1(E1), T3/E3, OC-3c & OC-12c•ATM Switching & ATM Traffic Management•AAL5, AAL2 CPS AAL2 SSSAR & AAL2 Switching•Inverse Multiplexing over ATM (IMA)
•IP Solutions•IPv4, IPv6•IP Interfaces:
•ML/MC-PPP/PPP-MUX (T1/E1/T3/E3)•AAL5/ATM/IMA (T1/E1/T3/E3)•AAL5/ATM/SONET (OC-3c/OC-12c)•Ethernet (10/100 MB, GbE)•POS (OC-3c/OC-12c)
•IP Routing/Switching, MPLS, IP QoS –DiffServ•GTP-U/UDP (UMTS)•GRE Tunneling, User Plane PPP Termination, UDP/IP header compression, IP-In-IP Tunneling for Mobile IP support (CDMA2000)•RTP/UDP
• Inter-working Solutions•UTOPIA (Cell Bus) or GbE interface to other sub-systems like DSP and Radio Network Layer
•Radio/Core Network Inter-working & Iu Framing & User Plane Protocols (UMTS)
•AAL2-SSSAR to UDP/IP IWF (CDMA2000)
•Voice over AAL2/ATM to Voice over RTP/UDP/IP
•AAL5/ATM to GbE (GigaBit Ethernet)
•AAL5/ATM to POS (Packet over SONET)
Slide 6
C-Port Network Processor for 3G Infrastructure: Key Drivers
? Higher Bandwidth/Throughput requirements? E.g. Peak Data rate as high as 3.1 Mbps in case of 1xEV-DV
? Higher Scaling Requirements? Increased number of Voice/Data Calls/Sessions to to be supported.? Introduction of Concurrent Services I.e. support for Simultaneous Voice &
Data Calls.
? Migration from Circuit to Packet Switched Backhaul? Use of IP & ATM as a transport protocols? Necessity of value added features such as QOS, Security, Header
Compression etc. at wireline speed.
? Flexibility? Migration from one transport to another transport interface in future, without
requiring significant Hardware Changes.? Flexibility of migration to higher speed transport interfaces (such as Fiber
Optic etc.) in future, without requiring significant Hardware Changes.
Slide 7
C-Port NP Based RNC SolutionA Case Study
Slide 8
RNC - Functional BlocksRNC needs multi-board solution for scalability & performance and the major sub-systems include -
•Transport Network Interface•ATM based transport: OC-3c ATM, AAL2, AAL5•IP based transport: OC-3c ATM-AAL5, Fast/Gig Ethernet, IP, UDP, GTP-U•Iu/Iub/Iur Framing
•Transport Network Layer Control•AAL2 Signaling (ALCAP) & respective bearer stacks on Iub, Iur & Iu interfaces
•Radio Network Layer Control•NBAP, RNSAP, RANAP & respective bearer stacks for Iub, Iur & Iu interfaces
•Radio Interface•MAC, RLC, PDCP, RRC
•Interconnect to connect the sub-systems•PCI, Fabric with FPGA (Glue), Ethernet
Slide 9
RNC Solution with Motorola ProcessorsReference Architecture
OC-3cPHY PHY
UDP
AAL2 SSSAR (I.366.1)AAL5
C-Port NP (Transport Network Interface Protocol Stacks)
AAL2 CPS (I.363.2)ATM
100 MB / Gig Ethernet, OC-3c/OC-12c POS / ATM-AAL5
IP
SONET
IP Network Interface & Stacks
ATM Network Interface & Stacks
Radio Network Layer Interface
FP Iu UP GTP-U
Iub, Iur, Iu
PCI,Fabric/ FPGA(Glue),
EthernetInterconnect
MAC
RLC
RRC PDCPBMC
Radio Interface Protocol Stacks
Radio Network Layer Control Protocol Stacks
Iub Iur Iu-cs/Iu-ps Iu-bc
Transport Network Layer Control Protocol Stacks
Iub Iur/Iu-cs Iu-psNBAPSSCF-UNISSCOP
SABPTCP
RNSAPSCCPMTP3-BSSCF-NNISSCOP(M3UASCTP)
RANAPSCCPMTP3-BSSCF-NNISSCOP(M3UASCTP)
ALCAP(Q.2630.2)STC (Q.2150.1)SSCF-UNISSCOP
ALCAP(Q.2630.2)STC (Q.2150.1)MTP3-BSSCF-NNISSCOP(M3UASCTP)
GTP-CTCP
Host Processor(MPC 74xx/7xx)
Security Processor(MPC185)
Kasumi F8 (encryption/decryption)Kasumi F9 (L3 Message authentication)
Slide 10
RNC Emulator SolutionTest Solution (Protocol & Capacity testing) for 3G/UMTS Node B Iub User Plane (Iub-UP) interface
CDS“ENTITE”
Test Manager
ATM Network
RNC-Emulator
Sun Solaris
API’s, Test Cases& Specifications
Iub-UP & OAM Test ManagerEN
TIT
E
TC
P/U
DP
Net
wor
k In
terf
ace
(IP
& I0
/100
MB
ETH
)
10/1
00M
B ET
H
Devices Under Test
C5 Driver & APIs
IuB-UP controller OAM
10/100Mb EthernetNetwork Interface
(IP & 10/100MB Ethernet)
TCP/UDP
C5
MPC-75X&
VxWorks
Framing Protocol (FP)
IP/ETH100MB T
10/100Mb ETH OC-3C PIM
SONETATM
AAL2 SSSARAAL2 CPS
Air InterfaceOC-3 Ports
Node-B
Node-B
Slide 11
RNC Emulator Features3G/UMTS Iub protocol stacks & User Plane Framing Protocol emulation for functionality & performance testing of Node B.
? Interfaces per chip: 1 OC-3c (SONET), 2 100MB Ethernet (one for MCP-750, another for logger communication)
? ATM Layer functions: Conforms to I.361? AAL2 Layer functions:
? AAL2 CPS functions : Packing/multiplexing and Unpacking/de-multiplexing, and CU Timer (10 ms) as per ITU-T I.363.2
? AAL2 SSSAR: Segmentation/Re-assembly (max SDU size of 10K octets) & RAS Timer (20-100 ms with 1 ms increments) as per ITU-T I.366.1
? AAL2 VCs & channels (CIDs) : 512 VCs & 2K CIDs (up to 255 per VC)
? Instances Support: Up to 3 C-5 boards per CDS chassis, with one host MCP-750 board.
? Generic API Support: A set of API is available on the host to control the host and C-5 boards for RNC Emulator functionality.
? ENTITE: A Test Manager from Motorola on Solaris
? 3GPP Framing Protocol Support & Frame Emulation:• Iub Interface User Plane Protocols for
Common Channel Transport Data Streams (ETSI TS125.435) & DCH Data Streams (ETSI TS 125.427):? Header & Payload CRC check &
generation, and framing? Timing Adjustment &
Synchronization• Frames are built offline at CDS Host
(MCP-750), and transmitted to Node-B every TTI in DL direction over OC-3c.
• UL frames from Node-B are logged for post processing
• Call state machine for timing adjustment and synchronization.
• Extensive statistics gathering for call dynamics.
• Up to 720 3G calls, aggregating a total 2K AAL2-CID components and 8*E1 bandwidth over OC-3c, per C-5 chip.
Slide 12
RNC Emulator: C-5 Network Processor Software Architecture
ATM & SONET (CP0/1)
OC-3c PHY
AAL2 CPS Rx(CP4/5)
AAL2 CPS packets
C-5
TLU
SRAM (Table Memory)
IP/UDP Tables
ATM/AAL2 Tables
OC-3c
XP
Iub Frames
AAL2 Cells
Traffic Mgmt (CP2/3)
AAL2 CPS Tx(CP6/7)
AAL2 SSSAR Rx(CP8/9)
AAL2 SSSAR Tx(CP10/11)
Iub-FP DL(CP12)
Iub-FP UL(CP13)
ETH/IP/UDP(CP14/15)
ETH PHY
2 X 100MB Ethernet
DCH/CCHFrames
Iub-FP Tables
Slide 13
ATMHeader
ATMHeader
Application layer
Service Specific Sublayer
SSCS (Service Specific Convergence Sublayer -
I.366.2)
ATM layer
Common Part Sublayer (CPS) -I.363.2
AAL-2layer
STF
SAP
SAP
CID LI UUI HEC CID LI UUI HEC
User packet
STF
ATM Cell
CPS packet Fragment 1 CPS packet Fragment 2
CPS packet
ATM SDU
User packet
User packet User packet
CPS PDU CPS PDU
CPS packet
CPS packet
Header Header
ATM SDU
SSSAR (Service Specific Segmentation And Reassembly
sublayer - I.366.1)
1 to 65586 octets
User 1 User 2 User 3 User n
CID x CID zCID y
ATM/AAL2 Protocol Structure
Slide 14
ATM ProcessingEgress Port ATM QOS CBR/VBR/ UBR Class
Q
ATM SDU Q
ATMTx ATMRx
RxSDPAtmRxDrvTxSDP
Merge Space
Extract Space
Config Reg
ATM SDUs
ATM SDU Header
Context Switching
ATM SDU
ATM-Init
ATM SDU
Event Registers
Header
AtmAal2Cntl Q
PHYOC-3c Line
ATMTxDRV
Slide 15
AAL2 CPS Rx ProcessingAAL2 Rx Q
aal2RxHdlr aal2RxFwdr
aal2RxDrvTx RxSDPaal2RxDrvRxTxSDP
Merge Space
Extract Space
Config Reg
CPS Packets
CPS-PDU
Partial CPS PktCPS Pkt Hdr
CPS Pkt Payload
STF + Partial CPS Pkt + CPS-PDU payload
aal2RxInit
AAL2 Tx Q
CPS-PDU
Event Registers
Context Switching
Slide 16
AAL2 CPS Tx Processing
aal2TxHdlr aal2TxFwdr
aal2TxDrvTx RxSDPaal2TxDrvRxTxSDP
Merge Space
Extract Space
ConfigReg
ATM SDUs
Partial ATM SDU + CPS Pkt Hdr + STF
Partial ATM SDU + CPS Pkt Frag1 + STF + CPS Pkt Frag2 + … .
aal2TxInit
CU Time out Q
AAL2 Tx Q
ATM SDU(CPS-PDU)
CPS PktPayload
rt-VBR Class Q
XP CU Timer Q
CU Timer Start Event
Event Registers
Context Switching
Slide 17
C-Port NP Based PDSN SolutionA Case Study
Slide 18
PDSN Application
PDSN
PDSN Card X N
PCI
UDPOSPF
RIP
LCP
RADIUS
C-5 Driver
Host CPU
C5 Host APIs
MIP IKE
IPC
PP
AP
CH
AP
CC
P
Glue
To/From RAN To/From IP Core
C5
PPP
ETH/POS
IP ARP
Control Packet Relay Funcs
Host DriverTunneling/Detunneling
GRE
Control PacketsIP
IP/IPSEC
GbE/OC-12 PHY
GbE/OC-12 PHY
Ext Co-procControl Functions
Data Packets
FPCrypto/Compression
Processor
Fabric Interface:
UTOPIA, CSIX etc.
Co-proc Interface:
PL3, Streaming etc.
GRE/PPP Interface towards SDU and IP Interface towards the Core network
Slide 19
PDSN Application - FeaturesA C-Port NP based solution for the bearer plane functionality of PDSN
? GRE Tunneling (RFC 2784 & 2890 )? GRE Checksum support? GRE Key Support? No support for GRE Sequence Number required for packet reordering
? User Plane PPP-IP Termination ? Byte Synchronous HDLC Like Framing with 16/32 bit FCS support (RFC 1662)? Control Character (PPP Flag & Escape Sequence ) Transparency (Sec 4.2 RFC1662)? IP Encapsulation & De-capsulation (without supporting IP Fragmentation & Reassembly & IP
Header Options processing) (RFC 791)? No support for PPP Frame Reassembly
? R-P Interface? Half Rate Full Duplex GbE with GMII Interface to PHY (802.3)? IP Host Behavior
? Core Interface? Half Rate Full Duplex GbE with GMII Interface to PHY (802.3)? IP Router Behavior
? Scalability? support for 30K subscriber I.e. 30K parallel GRE Tunnels and their associated PPP Sessions
? Performance? 144 Kbps of throughput per user with 3K Active User I.e. 144 Kbps x 3K = ~450 Mbps of
Aggregate Throughput
Slide 20
PDSN Application: C-5 Network ProcessorReference Architecture
(Table Memory)
IP packets
C-5
GbE PHY
Cluster 1 (CP0-CP3)GbE/IP-H Rx & TX
GRE packets
TLU
BCM
Host Driver
Control PacketRelay function
TxSDP RxSDP
CPRCGRE RX & TXIP-in-IP Tunneling
ARP
XP
Control packets
IP packets
Cluster 4 (CP12-CP15)
PPP/IP-R RX & TX
PPPpackets
GbE PHY
Tunneled IPpackets
PPP Control packets
R-P/PPP Session ID
TNL HTK TablesIP SA (HA Addr) = 32 bit Key
Tunnel ID
R-P/PPP Session ID
MS-IP HTK TablesIP DA (MS Addr) = 32 bit Key
R-P/PPP Session Params
Session Data TableSession ID = 16 bit Key
GRE HTK TablesIP SA (PCF Addr) +
GRE Key = 64 bit Key
Cluster 2 (CP4-CP7)GbE/IP-R RX &TX
Slide 21
Implementation Challenges
Quick prototype and verification using simulator for projecting cycle time budgets
High speed interfaces like FP , GbE/FE etc. for exchanging the bearer & using PCI for control plane interfacing
Scripts for testing on simulator. Use CDS/C5 as load tester
•Cycle Time budget–Ingress/Egress port speed (e.g. OC3/12, GbE etc.)–Throughput requirements (in terms of PPS)
•External Interfacing–Supporting high throughput requirement.
•Testing–Non-availability of test tools
System modeling through initial prototypes. Effective usage of simulator for verifying the model & other results
•Functional Partitioning & Efficient/Optimal usage of NP resources–Usage of NP resources (I.e. CP’s, TLU, Bit/Byte processor etc.) – Memory constraints (code & data memory)
Slide 22
GSG-India: C-Port Solution Provider
MIEL: A New Smart Networks Alliance Member Providing Design Services for the C-Port Network Processor FamilyMIEL, Motorola India Electronics Pvt. Ltd., part of Motorola's Global Software Group (GSG) is based in India and is a premier provider of software solutions and services to Motorola customers worldwide. The company has extensive experience in developing application software for the C-Port family of network processors.
MIEL offers the following services: •Enhancement and customization of CST reference applications •Sub-system solutions development, including control plane stack software and its integration with applications running on the C-Port family of network processors •Development of automated test solutions (for example, MIEL is currently developing a C-Ware™ Development System (CDS)-based solution for testing wireless Node B devices)
Motorola Smart Developer News: May 2002
Slide 23
GSG-India Contacts
• Business Head: – Bhaskar Harita ([email protected])
• Operation Manager: – Jagannath Rao ([email protected])
• Technical Staff:– Manoj Wagle ([email protected])– Radhakrishna C ([email protected])
Slide 24
References
• www.3gpp.org - 3GPP standards• www.3gpp2.org - 3GPP2 standards• C-PORT NP documents
Slide 25
Q & A