bus-based computer systems

© 2008 Wayne WolfOverheads for Computers as

Components 2nd ed.

Bus-Based Computer Systems

• Designing with microprocessors.• Development and debugging.• System-level performance analysis.

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Components 2nd ed.

System architectures

• Architectures and components:• software;• hardware.

• Some software is very hardware-dependent.

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Components 2nd ed.

Hardware platform architecture

Contains several elements:• CPU;• bus;• memory;• I/O devices: networking, sensors,

actuators, etc.How big/fast much each one be?

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Components 2nd ed.

Software architecture

Functional description must be broken into pieces:

• division among people;• conceptual organization;• performance;• testability;• maintenance.

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Components 2nd ed.

Hardware and software architectures

Hardware and software are intimately related:

• software doesn’t run without hardware;

• how much hardware you need is determined by the software requirements:• speed;• memory.

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Components 2nd ed.

Evaluation boards

• Designed by CPU manufacturer or others.

• Includes CPU, memory, some I/O devices.

• May include prototyping section.• CPU manufacturer often gives out

evaluation board netlist---can be used as starting point for your custom board design.

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Components 2nd ed.

Adding logic to a board

• Programmable logic devices (PLDs) provide low/medium density logic.

• Field-programmable gate arrays (FPGAs) provide more logic and multi-level logic.

• Application-specific integrated circuits (ASICs) are manufactured for a single purpose.

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Components 2nd ed.

The PC as a platform

• Advantages:• cheap and easy to get;• rich and familiar software environment.

• Disadvantages:• requires a lot of hardware resources;• not well-adapted to real-time.

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Components 2nd ed.

Typical PC hardware platform

CPU

CPU bus

memory

DMAcontroller

timers

businterface

bus

inte

rfac

e

high-speed bus

low-speed bus

device

device

intrctrl

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Components 2nd ed.

Typical busses

• PCI: standard for high-speed interfacing• 33 or 66 MHz.• PCI Express.

• USB (Universal Serial Bus), Firewire (IEEE 1394): relatively low-cost serial interface with high speed.

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Components 2nd ed.

Software elements

• IBM PC uses BIOS (Basic I/O System) to implement low-level functions:• boot-up;• minimal device drivers.

• BIOS has become a generic term for the lowest-level system software.

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Components 2nd ed.

Example: StrongARM

• StrongARM system includes:• CPU chip (3.686 MHz clock)• system control module (32.768 kHz

clock).• Real-time clock;• operating system timer• general-purpose I/O;• interrupt controller;• power manager controller;• reset controller.

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Components 2nd ed.

Debugging embedded systems

• Challenges:• target system may be hard to observe;• target may be hard to control;• may be hard to generate realistic

inputs;• setup sequence may be complex.

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Components 2nd ed.

Host/target design

• Use a host system to prepare software for target system:

targetsystem

host systemserial line

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Components 2nd ed.

Host-based tools

• Cross compiler:• compiles code on host for target

system.

• Cross debugger:• displays target state, allows target

system to be controlled.

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Components 2nd ed.

Software debuggers

• A monitor program residing on the target provides basic debugger functions.

• Debugger should have a minimal footprint in memory.

• User program must be careful not to destroy debugger program, but , should be able to recover from some damage caused by user code.

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Components 2nd ed.

Breakpoints

• A breakpoint allows the user to stop execution, examine system state, and change state.

• Replace the breakpointed instruction with a subroutine call to the monitor program.

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Components 2nd ed.

ARM breakpoints

0x400 MUL r4,r6,r60x404 ADD r2,r2,r40x408 ADD r0,r0,#10x40c B loop

uninstrumented code

0x400 MUL r4,r6,r60x404 ADD r2,r2,r40x408 ADD r0,r0,#10x40c BL bkpoint

code with breakpoint

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Components 2nd ed.

Breakpoint handler actions

• Save registers.• Allow user to examine machine.• Before returning, restore system

state.• Safest way to execute the instruction is

to replace it and execute in place.• Put another breakpoint after the

replaced breakpoint to allow restoring the original breakpoint.

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Components 2nd ed.

In-circuit emulators

• A microprocessor in-circuit emulator is a specially-instrumented microprocessor.

• Allows you to stop execution, examine CPU state, modify registers.

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Components 2nd ed.

Logic analyzers

• A logic analyzer is an array of low-grade oscilloscopes:

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Components 2nd ed.

Logic analyzer architecture

UUT samplememory

microprocessor

controller

system clock

clockgen

state ortiming mode

vectoraddress

displaykeypad

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Boundary scan

• Simplifies testing of multiple chips on a board.• Registers on pins

can be configured as a scan chain.

• Used for debuggers, in-circuit emulators.


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Components 2nd ed.

How to exercise code

• Run on host system.• Run on target system.• Run in instruction-level simulator.• Run on cycle-accurate simulator.• Run in hardware/software co-

simulation environment.

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Components 2nd ed.

Debugging real-time code

• Bugs in drivers can cause non-deterministic behavior in the foreground problem.

• Bugs may be timing-dependent.

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System-level performance analysis

• Performance depends on all the elements of the system:• CPU.• Cache.• Bus.• Main memory.• I/O device.


Components 2nd ed.

memory CPU

cache

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Components 2nd ed.

Bandwidth as performance

• Bandwidth applies to several components:• Memory.• Bus.• CPU fetches.

• Different parts of the system run at different clock rates.

• Different components may have different widths (bus, memory).

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Components 2nd ed.

Bandwidth and data transfers

• Video frame: 320 x 240 x 3 = 230,400 bytes.• Transfer in 1/30 sec.

• Transfer 1 byte/sec, 0.23 sec per frame.• Too slow.

• Increase bandwidth:• Increase bus width.• Increase bus clock rate.

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Bus bandwidth

• T: # bus cycles.• P: time/bus cycle.• Total time for

transfer:• t = TP.

• D: data payload length.

• O1 + O2 = overhead O.


Components 2nd ed.

O1 D O2

W

Tbasic(N) = (D+O)N/W

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Bus burst transfer bandwidth

• T: # bus cycles.• P: time/bus cycle.• Total time for

transfer:• t = TP.

• D: data payload length.

• O1 + O2 = overhead O.


Components 2nd ed.

B O

W

Tburst(N) = (BD+O)N/(BW)

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…

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Components 2nd ed.

Memory aspect ratios

64 M16 M

8 M

1 4 8

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Components 2nd ed.

Memory access times

• Memory component access times comes from chip data sheet.• Page modes allow faster access for

successive transfers on same page.

• If data doesn’t fit naturally into physical words:• A = [(E/w)mod W]+1

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Bus performance bottlenecks

• Transfer 320 x 240 video frame @ 30 frames/sec = 612,000 bytes/sec.

• Is performance bottleneck bus or memory?


Components 2nd ed.

memory CPU

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Components 2nd ed.

Bus performance bottlenecks, cont’d.

• Bus: assume 1 MHz bus, D=1, O=3:• Tbasic = (1+3)612,000/2 = 1,224,000

cycles = 1.224 sec.

• Memory: try burst mode B=4, width w=0.5.• Tmem = (4*1+4)612,000/(4*0.5) =

2,448,000 cycles = 0.2448 sec.

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Performance spreadsheet


Components 2nd ed.

bus memoryclock period 1.00E-06 clock period 1.00E-08W 2 W 0.5D 1 D 1O 3 O 4

B 4N 612000 N 612000

T_basic 1224000 T_mem 2448000t 1.22E+00 t 2.45E-02

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Parallelism

• Speed things up by running several units at once.

• DMA provides parallelism if CPU doesn’t need the bus:• DMA + bus.• CPU.


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bus-based computer systems

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