burn-in effect on yield

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IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, VOL. 23, NO. 4, OCTOBER 2000 293 Burn-In Effect on Yield Taeho Kim, Way Kuo, Fellow, IEEE, and Wei-Ting Kary Chien, Member, IEEE Abstract—By removing infant mortalities, burn-in of semicon- ductor devices improves reliability. However, burn-in may affect the yield of semiconductor devices since defects grow during burn-in and some of them end up with yield loss. The amount of yield loss depends upon burn-in environments. Another burn-in effect is the yield gain. Since yield is a function of defect density, if some defects are detected and removed during burn-in, the yield of the post-burn-in process can be expected to increase. The amount of yield gain depends upon the number of defects removed during burn-in. In this paper, we present yield loss and gain expressions and relate them with the reliability projection of semiconductor devices in order to determine burn-in time. Index Terms—Burn-in, defect density, defect growth, defect re- duction, reliability, yield, yield gain, yield loss. I. INTRODUCTION B URN-IN is a method used to weed-out infant mortality by applying higher than usual levels of stress to speed up the deterioration of electronic devices. As the circuit complexity in- creases, burn-in becomes less effective in stressing all the ox- ides in a circuit for a significant length of time [1]. However, post-process burn-in is frequently used to control the oxide de- fect although it is costly and time consuming [2]. Hunter [3] presents the effects of burn-in on the maximum allowed electric field for a specific defect density. In Kuo et al. [4], methodolo- gies and applications of burn-in are thoroughly discussed. Even though burn-in is related to the removal of infant mor- talities, burn-in may affect the yield of semiconductor devices. It results from the fact that yield defects and reliability defects grow during burn-in and some of them end up with yield loss. The defect-related breakdown mechanism of the gate oxide de- scribes well the growth of defect under the given voltage and temperature. The amount of defect growth and yield loss de- pends upon burn-in environments, such as time, temperature, voltage, and test patterns. Another possibility of burn-in effect is the yield gain. Since yield is a function of defect density and some defects are de- tected and removed during burn-in, the yield in the processes after burn-in can be expected to increase. The amount of yield gain depends upon the reduction of defects during burn-in. Fig. 1 shows the diagram of defect reduction flow. The yield defects are detected by inspection or test and the reliability defects must Manuscript received May 1, 1999; revised November 10, 2000. This work was supported in part by the Texas Advanced Technology Program under Grant ATP-036327-138, the NSF Project DMI-9908207, and an IBM Headquarters Manufacturing Project. T. Kim is with the Planning and Coordination Office, Korea Telecom, Sungnam, Kyonggi-do 463-711, Korea (e-mail: [email protected]). W. Kuo is with Texas A&M University, College Station, TX 77843 USA (e-mail: [email protected]). W.-T. K. Chien is with Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, Taiwan 300, R.O.C. (e-mail: [email protected]). Publisher Item Identifier S 1521-334X(00)11629-5. Fig. 1. Diagram of defect reduction flow. be converted to yield defects by burn-in or other stresses prior to test. The defects remaining depend upon the test efficiency which includes burn-in and fault coverage. In this paper, we present yield loss and gain expressions and integrate them in order to determine the burn-in time which op- timizes yield effect. II. RELIABILITY DEFECT AND CRITICAL AREA A defect is assumed to be circular with diameter and various sizes of defects may occur on a chip. Defects that result in yield loss are called yield defects and defects that cause reliability problems under wearing conditions are called reliability defects. The yield critical area is an area where the center of a defect must fall to create a fault [5]. The reliability critical area is a time-dependent area which is related to reliability failure at a given time. Let and be an average yield critical area and a yield critical area for defect size , respectively. For a given defect size distribution, (1) It is known that for a single gate oxide with width and length [5] . When the probability density function of is given by [5] where is the defect size that is most likely to occur. The in (1) is expressed as (2) III. YIELD LOSS The defect growth determined by the defect-related break- down mechanism [1] during burn-in affects both yield and reli- ability critical areas because the computation of critical area is 1521–334X/00$10.00 © 2000 IEEE

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Page 1: Burn-in effect on yield

IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, VOL. 23, NO. 4, OCTOBER 2000 293

Burn-In Effect on YieldTaeho Kim, Way Kuo, Fellow, IEEE, and Wei-Ting Kary Chien, Member, IEEE

Abstract—By removing infant mortalities, burn-in of semicon-ductor devices improves reliability. However, burn-in may affectthe yield of semiconductor devices since defects grow duringburn-in and some of them end up with yield loss. The amount ofyield loss depends upon burn-in environments. Another burn-ineffect is the yield gain. Since yield is a function of defect density, ifsome defects are detected and removed during burn-in, the yield ofthe post-burn-in process can be expected to increase. The amountof yield gain depends upon the number of defects removed duringburn-in. In this paper, we present yield loss and gain expressionsand relate them with the reliability projection of semiconductordevices in order to determine burn-in time.

Index Terms—Burn-in, defect density, defect growth, defect re-duction, reliability, yield, yield gain, yield loss.

I. INTRODUCTION

BURN-IN is a method used to weed-out infant mortality byapplying higher than usual levels of stress to speed up the

deterioration of electronic devices. As the circuit complexity in-creases, burn-in becomes less effective in stressing all the ox-ides in a circuit for a significant length of time [1]. However,post-process burn-in is frequently used to control the oxide de-fect although it is costly and time consuming [2]. Hunter [3]presents the effects of burn-in on the maximum allowed electricfield for a specific defect density. In Kuoet al. [4], methodolo-gies and applications of burn-in are thoroughly discussed.

Even though burn-in is related to the removal of infant mor-talities, burn-in may affect the yield of semiconductor devices.It results from the fact that yield defects and reliability defectsgrow during burn-in and some of them end up with yield loss.The defect-related breakdown mechanism of the gate oxide de-scribes well the growth of defect under the given voltage andtemperature. The amount of defect growth and yield loss de-pends upon burn-in environments, such as time, temperature,voltage, and test patterns.

Another possibility of burn-in effect is the yield gain. Sinceyield is a function of defect density and some defects are de-tected and removed during burn-in, the yield in the processesafter burn-in can be expected to increase. The amount of yieldgain depends upon the reduction of defects during burn-in. Fig. 1shows the diagram of defect reduction flow. The yield defectsare detected by inspection or test and the reliability defects must

Manuscript received May 1, 1999; revised November 10, 2000. This workwas supported in part by the Texas Advanced Technology Program under GrantATP-036327-138, the NSF Project DMI-9908207, and an IBM HeadquartersManufacturing Project.

T. Kim is with the Planning and Coordination Office, Korea Telecom,Sungnam, Kyonggi-do 463-711, Korea (e-mail: [email protected]).

W. Kuo is with Texas A&M University, College Station, TX 77843 USA(e-mail: [email protected]).

W.-T. K. Chien is with Taiwan Semiconductor Manufacturing Company(TSMC), Hsinchu, Taiwan 300, R.O.C. (e-mail: [email protected]).

Publisher Item Identifier S 1521-334X(00)11629-5.

Fig. 1. Diagram of defect reduction flow.

be converted to yield defects by burn-in or other stresses priorto test. The defects remaining depend upon the test efficiencywhich includes burn-in and fault coverage.

In this paper, we present yield loss and gain expressions andintegrate them in order to determine the burn-in time which op-timizes yield effect.

II. RELIABILITY DEFECT AND CRITICAL AREA

A defect is assumed to be circular with diameterand varioussizes of defects may occur on a chip. Defects that result in yieldloss are called yield defects and defects that cause reliabilityproblems under wearing conditions are called reliability defects.The yield critical area is an area where the center of a defectmust fall to create a fault [5]. The reliability critical area is atime-dependent area which is related to reliability failure at agiven time.

Let and be an average yield critical area and a yieldcritical area for defect size, respectively. For a given defectsize distribution,

(1)

It is known that for a single gate oxide with width and length[5]

.

When the probability density function ofis given by [5]

where is the defect size that is most likely to occur. Thein (1) is expressed as

(2)

III. Y IELD LOSS

The defect growth determined by the defect-related break-down mechanism [1] during burn-in affects both yield and reli-ability critical areas because the computation of critical area is

1521–334X/00$10.00 © 2000 IEEE

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294 IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, VOL. 23, NO. 4, OCTOBER 2000

determined by the defect size and distribution. The change of theyield critical area gives us a new projected yield. However, thechange of the reliability critical area affects the yield-reliabilityrelation model [4], [6], [7] and eventually provides different re-liability prediction based on yield.

Let and be the defect growths in gate oxide duringburn-in and operation, respectively. The amounts ofand ,for a given time, are determined by the physical mechanismsof the gate oxide. One way to calculate and is usingthe gate oxide breakdown models [8], [9]. Let be theburn-in time, damage incurred during burn-in, and damage in-curred during operation, respectively. By modifying the expres-sion of burn-in damage in [2], we express the defect growthsduring burn-in and operation to be

(3)

(4)

where

and are the burn-in voltage and temperature, andandare the operation voltage and temperature, respectively. Tem-

perature-dependent expressions for and are alsofound in [2]. For C, secand MV/cm are used. Thus, by (3) and (4), thedefect growths for a given burn-in time and operating time

can be predicted, respectively. The gate oxide breaks downwhen . Table I shows burn-in damageforÅ under 12 burn-in conditions.

Kim and Kuo [7] present the average reliability critical area,, at time in a single gate oxide as

(5)

From (2) and (5), the ratio between and is given by

When the defect growth is introduced, the revised yield crit-ical area after burn-in, , is obtained by a function of

.

Therefore, the revised average yield critical area,, is

(6)

From (2), (3), and (6), we have

(7)

TABLE IBURN-IN DAMAGES UNDER 12 BURN-IN CONDITIONS (W = 100 Å,

T = 125 C)

Fig. 2. Y varies with� for a givenY .

This ratio will be used to obtain the yield loss due toburn-in.

The yield after burn-in, , will be different from the yieldbefore burn-in, , when the revised yield critical area of (6) isused. Let be the average defect density. By the Poisson yieldmodel and (7), the relationship betweenand is given by

(8)

From (7), (8) becomes

(9)

In fact, is always less than or equal to sinceand . Equation (9) implies that increases asincrease at a given . However, is a decreasing function of

, which is shown in Fig. 2.The yield loss during burn-in, , is thus given by

Since decreases in for a given , is an increasingfunction of . Therefore, the amount of yield loss is dependentupon burn-in time, temperature, voltage, and the yield beforeburn-in.

When burn-in time is fixed, the yield loss is dependent uponand it is possible to find a maximum yield loss, , by

differentiating with respect to . Since

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KIM et al.: BURN-IN EFFECT ON YIELD 295

Fig. 3. Y varies withY for a given�.

TABLE IIMAXIMUM VALUES OF YIELD LOSS FOR AGIVEN �

is a concave function of and the yield giving a max-imum yield loss for a given , is obtained by solving

. Thus

where

Fig. 3 shows that maximum yield losses occur when the level ofis between 0.4 and 0.5 depending upon. Yield losses for

both ends of yield level are relatively small. The low yield lossshown at a low yield level results from the low yield itself beforeburn-in. At a high yield level, yield loss decreases as yield goesup. This implies that burn-in provides effective means in newproducts which usually have the low yield level. For all yieldlevels, the yield loss increases as burn-in time increases.

Table II shows and for each related to Fig. 3.From Table I, is less than 0.1 for most burn-in conditions.Thus, due to burn-in may not be higher than 0.039.

The yield loss percentage, %, is defined as

% strictly decreases as increases and increases with.When is very small, even though is small, % isclose to 100%.

Example: Suppose a product whose is (cm). We use V and C. Four s are consid-ered: 12-h, 24-h, 48-h, and 96-h. Froms in Table I, the s for

TABLE IIIYIELDS AND YIELD LOSSES FORFOUR BURN-IN TIMES

each burn-in time are , and ,respectively. Hence, we have

12-h24-h48-h96-h

Table III summarizes and % for four s. In this ex-ample, it is shown that the largest and % in gate oxideduring burn-in are 0.000 13 and 0.0144%, respectively, when

96-hr and .

IV. Y IELD GAIN

It is reasonable to assume that defect density is a function of. Let and be the total number of random defects before

and after burn-in, respectively. Then, can be determined bythe expected number of failures detected during burn-in,

The corresponding average defect density,, for the total de-vice area, , is given by

In the yield-reliability relation model [7], reliability at timeis given by

Thus, the hazard rate is expressed as

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296 IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, VOL. 23, NO. 4, OCTOBER 2000

where

Under the assumption of minimal repair, we have

(10)

Since , (10) becomes

and

When approaches breakdown time,and are closeto 1 and , respectively. refers to the average number offailures caused by defects. If we have no burn-in, then is0.

Let be the yield considering the change of defect density

(11)

where the fault probability is the ratio of the critical area tothe total area [10]. In (11), the term

is called the yield gain factor, which determines the amount ofyield gain. Since and is a positive constant

and

are always satisfied. In order to have , must be avalue satisfying

(12)

Equation (12) gives a maximumdenoted as

(13)

Thus, while burn-in time gives a less than , we can have ayield gain by reducing defect density. Table IV showsvaluesfor given . Since and de-creases as increases. When is large, the probability of fail-ures caused by defects is relatively large and thus the possibilityof yield gain becomes small. Fig. 4 shows an example ofgiven and .

TABLE IVMAXIMUM VALUES FORGIVEN �s

Fig. 4. Y varies with�(� = 0:2; � = 0:592).

The yield gain, , is expressed as

(14)

and is a function of and . In Fig. 5, it can be seen that thereis a maximum yield gain for a specific yield. The yield gain ismaximized at which is found by solving

Similarly, the maximum yield gain, is obtained by in-serting into (14). In addition to this, we can find the yieldgain percentage, %, which is defined as

From Figs. 2 and 4, we can see that both yield loss and gainincrease as burn-in continues.

V. INTEGRATION OFYIELD LOSS ANDGAIN

Burn-in affects both and due to the removal of infantmortalities and the defect growth during burn-in. Since yieldloss and yield gain result from the defect growth and the defectreduction during burn-in respectively, they are expected to occursimultaneously during burn-in. From previous discussions, theeffective yield, , which is an integrated expression ofand

, is given by

after rearranging terms by (7) and (11). The net effective yield,, is defined as

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KIM et al.: BURN-IN EFFECT ON YIELD 297

Fig. 5. Y varies withY (� = 0:2).

Fig. 6. Values ofY vary with �(Y = 0:9).

Since both yield loss and yield gain are dependent uponand are also dependent upon. Fig. 6 shows this time-dependent for given 0.7, 0.5, 0.3, and 0.1. Among four

s, gives the smallest (0.358) obtained from (13).Fig. 7 shows net effective yields for individual value of. Fromthese two figures, it is obvious that is also dependent on.When , burn-in always leads to yield gain. That is,when the product is pre-matured or the process is unstable, thefault probability is usually high and burn-in is definitely effec-tive to increase yield as well as reliability. In order to obtain

, we have to find a minimum satisfying . Since, we have

which is equivalent to

and finally results in

Fig. 7. Values ofY vary with �(Y = 0:9).

For , we have and, therefore, . As shownin Figs. 6 and 7, yield gain is a dominant effect of burn-in forproducts with . For other values, yield gain dependsupon . When is small, we can expect high yield and burn-inmay result in yield loss instead of yield gain.

In many cases, burn-in time givesvalues less than 0.1. InTable I, 0.001 38 is obtained for the burn-in environmentsuch as V, C, -hr. When and

, 0.0001 is expected. Therefore, the burn-ineffect is much less than 1% for a device with smalland high

.Actually, many IC manufacturers reduce burn-in time to less

than 10 hours or even skip burn-in when yield is high (e.g.,98%) and burn-in escape is low (e.g., 100 PPM). The amountof burn-in escape is estimated by the early failure rate (EFR)test, which samples at least 10 000 final products from at leastthree lots and performs 1248-h burn-in under the conditionsmost similar to field uses. The EFR stress and test conditionsmay be different from those at normal productions.

VI. DETERMINATION OF BURN-IN TIME

From the yield-reliability relation model by Kim and Kuo [7],the reliability of gate oxide at time is given by

Similarly,

The mission reliability is given by

(15)

Fig. 8 shows the mission reliability for givens and Fig. 9 pro-vides the projected reliability whenis fixed at 0.05.

One way of determining is requiring to be higherthan the required reliability level which is denoted as .From (15)

(16)

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298 IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, VOL. 23, NO. 4, OCTOBER 2000

Fig. 8. Mission reliability for givenY s atu = 0:1.

Fig. 9. Mission reliability for givenY s with� = 0:05.

If the yield is sufficiently high, then might be higher than. In this case, it is not necessary to apply burn-in in order to

increase profit. Otherwise, a minimumcan be obtained underother constraints such as yield or cost.

For given , and , a minimum yield satisfying(16) is

(17)

Since and are determined by time and environment factors,(17) provides the minimum yield level to meet at timewith burn-in time . Table V includes some examples ofcalculated for 0.999 99. Thus, yield is a good indicatorto find if burn-in is beneficial.

VII. CONCLUSIONS

Two parameters affecting yield are critical area and defectdensity. If either of them changes, then yield will change ac-cordingly. In this paper, how to calculate the amount of yield

TABLE VMINIMUM YIELD LEVELS (Y ) TO MEETR = 0:99999

loss and the amount of yield gain is explained by extending theyield-reliability relation model.

Burn-in results in the changes of yield critical area anddefect density. Defect growth during burn-in increases theyield critical area and then decreases yield at the subsequentmanufacturing process. However, the reduced defect densitygives yield gain.

Two effects, yield loss and yield gain, always exist duringburn-in. The dominant effect is determined by burn-in time andyield level. At a low yield level, burn-in usually gives yield gain.When manufacturing processes are not matured, the reductionof defects greatly affect yield and burn-in is an effective tool toimprove yield as well as reliability. By combining burn-in effectwith yield-reliability relation model, it is possible to find theminimum yield level to meet reliability requirement for givenburn-in and operation times. Hence, yield can be used as a goodindicator to determine whether applying burn-in to a product iseffective or not.

REFERENCES

[1] J. C. King, W. Y. Chan, and C. Hu, “Efficient gate oxide defect screenfor VLSI reliability,” in Proc. IEDM Tech. Dig., 1994, pp. 597–600.

[2] R. Moazzami and C. Hu, “Projecting gate oxide reliability and opti-mizing reliability screens,”IEEE Trans. Electron Devices, vol. 37, pp.1643–1650, July 1990.

[3] W. R. Hunter, “A failure rate based methodology for determining themaximum operating gate electric field, comprehending defect densityand burn-in,” inProc. Int. Reliability Phys. Symp. (IRPS), 1996, pp.37–43.

[4] W. Kuo, W. T. K. Chien, and T. Kim,Reliability, Yield, and StressBurn-in. Norwell, MA: Kluwer, 1998.

[5] C. H. Stapper, “Modeling of defects in integrated circuit photolitho-graphic patterns,”IBM J. Res. Develop., vol. 28, pp. 461–475, 1984.

[6] T. Kim, W. Kuo, and W. T. K. Chien, “A relation model of yield and re-liability for gate oxide failures,” inProc. 1998 Annu. Reliability Main-tainability Symp., Anaheim, CA, Jan. 19–22, 1998, pp. 428–433.

[7] T. Kim and W. Kuo, “Modeling manufacturing yield and reliability,”IEEE Trans. Semiconduct. Manufact., vol. 12, pp. 485–492, Nov. 1999.

[8] R. Degraeveet al., “A new statistical model for fitting bimodal oxidebreakdown distributions at different field conditions,”Microelectron.Reliability, vol. 36, no. 11/12, pp. 1651–1654, 1996.

[9] R.-P. Vollertsen and W. W. Abadeer, “Comprehensive gate-oxide relia-bility evaluation for DRAM processes,”Microelectron. Reliab., vol. 36,no. 11/12, pp. 1631–1638, 1996.

[10] A. V. Ferris-Prabhu,Introduction to Semiconductor Device Yield Mod-eling. Boston, MA: Artech House, 1992.

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KIM et al.: BURN-IN EFFECT ON YIELD 299

Taeho Kim received the B.S. and M.S. degrees inindustrial engineering from Seoul National Univer-sity, Seoul, Korea, in 1983 and 1985, respectively,and the Ph.D. degree in industrial engineering fromTexas A&M University, College Station, in 1998.

He is Quality Management Director of KoreaTelecom. Since he joined Korea Telecom in 1986,he has been doing many projects related with servicequality and network performance. His fields ofinterest include semiconductor reliability and yield,burn-in, network performance and reliability, and

telecommunication service quality.Dr. Kim is a member of Phi Kappa Phi.

Way Kuo (F’92) is Weisenbaker Chair of Engineering and Executive AssociateDean of Engineering at Texas A&M University, College Station. Previously, hewas with Bell Laboratories, Iowa State University, Ames, and Ames Laboratory.In 1991, he was the Senior Fulbright Scholar in Reliability and Quality to Lisbonand Glasgow. He coauthored the textsOptimization of System Reliability(NewYork: Dekker, 1985);Software Measurement: A Visualization Toolkit for ProjectControl & Process Improvement(Englewood Cliffs, NJ: Prentice-Hall, 1998),andReliability, Yield, andStress Burn-in, (Norwell, MA: Kluwer, 1998).

Dr. Kuo is an elected member of the National Academy of Engineering andan Academician of the International Academy for Quality. He is Fellow of theInstitute of Industrial Engineering (IIE) and the American Society for Quality(ASQ).

Wei-Ting Kary Chien (M’92) received the Ph.D. de-gree in industrial engineering from Texas A&M Uni-versity, College Station, in 1994.

He is Section Manager, Process Reliability, RA-2,Taiwan Semiconductor Manufacturing Company,Hsinchu, Taiwan, R.O.C. After his graduation, heworked as a Research Associate for the Departmentsof Industrial Engineering and Computer Science,Texas A&M, on the projects on software reliabilityand on the semiconductor reliability sponsored byHP and by IBM, respectively. In 1995, he joined

Nanya Technology Corp., a DRAM manufacturer in Taiwan, as Section Man-ager of Reliability Engineering. Then, he worked for Intel on quality systemrelated tasks and was Deputy Director, QRA Division, Taiwan SemiconductorTechnology Corp. Currently, he is with TSMC in charge of wafer levelreliability tests and monitor, building-in reliability, and process qualification.He is the Associate Editor of theInternational Journal of Reliability andApplication.

Dr. Chien is a member of the Phi Tau Phi and is Associate Editor of the IEEETRANSACTIONS ONRELIABILITY .