bourns telecom overvoltage protectors · 2113907, 1981). production of these devices started in...

TISP® Types

Figure 1. SPD Circuit Application

SPD SPD

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IntroductionThis section covers the overvoltage protection func-tions and Bourns TISP® (Totally Integrated SurgeProtector) thyristor SPDs (Surge Protective Devices)in terms of evolution, function, silicon structure,electrical characteristics, electrical rating and devicevariants.

Basic Protection FunctionSPDs have a non-linear voltage-current characteristicwhich limits overvoltages by diverting the currentcaused by an overvoltage. Figure 1 shows how a two-terminal SPD is applied to limit the voltage betweentwo conductors and one conductor and ground.There are two basic types of SPD characteristics;clamping and switching.

OCTOBER 2000 - REVISED AUGUST 2001

Clamping SPDs have a continuous voltage-currentcharacteristic - Figure 2. In limiting an overvoltage,the downstream load will be exposed to a high voltagefor the time period that the overvoltage exceeds thesystem rated voltage level - see Figure 2 waveshape.Obviously it is important that normal system voltagesare not clamped.

Switching SPDs have a discontinuous voltage-currentcharacteristic, the discontinuity being caused by theswitching action between high voltage and low-voltageregions. The TISP® device has a switching characteris-tic as it is a thyristor device. Before the TISP® deviceswitches into a low voltage state, there is a smallclamping action, caused by the breakdown region - seeFigure 3. In limiting an overvoltage, the downstream

load will be exposed to a high voltage for the brieftime period that the TISP® device is in the breakdownregion before switching into a low-voltage state - seeFigure 3 waveshape. When the diverted current fallsbelow a critical value, the TISP® device switches offand allows normal system operation to resume.

Figure 3. Switching SPD Characteristic and Voltage Limiting Waveshape

+v

+i

SystemRated

Voltage

Current at Rated Voltage

SPD Voltage

SP

D C

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ent

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VoltageProtection Level

Over-voltage

ThyristorSPD

SystemRated

Voltage

BreakdownRegion

Figure 2. Clamping SPD Characteristic and Voltage Limiting Waveshape

SystemRated

Voltage

ClampingSPD

Over-voltage

VoltageProtection Level

+v

+i

SystemRated

Voltage

Current at Rated Voltage

SPD Voltage

SP

D C

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TISP® OriginationIn 1980, British Telecom announced the developmentof a new generation of telephone exchanges called“System X” which would employ the latest semicon-ductor devices. Lightning, a.c. power system faultsand switching produce voltages on the telephone line.The ICs which directly interfaced to the telephone

line would beexposed to suchvoltages and neededaccurate and fastovervoltage protec-tion to preventfailure. It had beenestablished that thebest type of SPD forthis application wasthyristor based.However, at that time,the thyristor SPDs

available would only protect in one voltage polarity. Protec-tion in both voltage polarities and both line conductorswould require four devices. System X designers asked severalthyristor manufacturers if the protection for one line couldbe integrated into one package.

Bourns’ Bedford semiconductor power device facilitymet this challenge. Being an established thyristor

manufacturer meantthat the basic thyris-tor structure alreadyexisted. However,how to integrate fourdevices, achieve a 30year life and accuratevoltage control re-quired the initiationof a major researchand developmentprogram. The needfor integration and

long life was solved by the adoption of a planar struc-ture, and accurate voltage control was achieved throughthe use of a buried ion-implanted layer (UK patent2113907, 1981). Production of these devices started in1982 and, today, both fixed voltage and gated prod-ucts are produced. The following clauses give moredetail on the make up of a fixed voltage TISP® device.


Basic Thyristor StructureFigure 4 shows the simplified structure of a unidirec-tional thyristor protector. The switching action occurswhen the top contact is negative with respect to thebottom contact. Also shown are the equivalent circuitelements created by the semiconductor layers. Typi-cally, the protector would be manufactured startingwith an n- wafer. Layers of p materialwould then be diffused intothe top and bottom.Next, n+ regionswould be diffusedinto the topsurface. Finally,the top andbottom wouldbe metallized toprovide contacts.

Transistor TR1is formed by then+pn- layers. Similarly,transistor TR2 is formed bythe pn-p layers. Avalanche diodeD1 is formed by the central n-p layers.Resistance R1 is the lateral resistance of the player. Resistor R2, together with resistor R1,shunt the base-emitter junction of transistorTR1 to define the value of switch-off current.Resistor R2 has a relatively low value of resistanceand is considered as a local base short to the emitter.In manufacture, the emitter diffusion is perforatedwith a series of dots to create these shorts. In Figure 4,some of the top metallization has been omitted toshow the p-type dots. The practical implementationof this structure requires technology decisions on howthe protection voltage is set and the surface termina-tion of the voltage blocking junctions.

Junction TerminationThe technology used for junction termination at thechip surface was decided by future needs and perfor-mance history. Three common ways of controllingjunction breakdown at the surface are shown in Figure5. Glassed Mesa technology terminates the highvoltage junction on the edge of a mesa created bygrooving the silicon wafer. The mesa is sealed with alayer of glass to prevent contamination and reduce the

surface field strength. Planar brings a lateraljunction up to the top surface. The

surface is sealed with silicondioxide in the

junction area.Additionalstability isprovided by achannel stopperdiffusion.

Although thedouble sided glassmesa gives thesmallest chip size,

the double mesagrooves weaken the wafer

and this limits the maximum wafer size that can be processed

without excessive breakage. Single glass mesa and planar

solve these problems at the expense of increased chipsize used to bring the lower junction up to the topsurface. The mesa groove still limits the maximumwafer size. Planar does not have any wafer size limita-tion. Both these technologies were established inproduction at Bedford.

Figure 4.Simplified Protector Structure


Planar waschosen as it hadbetter junctioncurrent characteristics.This is shown in Figure 6 whichis the result of a high temperaturereverse biased (HTRB) life test onhigh voltage glass mesa and planartransistors. An advantage of the planar structureapproach is that multiple protectors may be easilymade on a single chip. Each protector is formed in awraparound of p-type silicon, which serves to isolatethe protector sections from each other.

Figure 6. Junction Current Stability

100000100001000100101

100000

1000

100

10

1

10000

Fin

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ion

Cu

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t -

nA

Initial Junction Current - nA

Transistor Junctions, 1000 hours, 720 V at 150°C

PlanarGlass MesaNo Change Line

Voltage AccuracyProtectors have to be supplied to a specified voltagewindow; that is a maximum and minimum value ofbreakdown voltage. This window might be as little as

15%.In the previous

illustrations, the bulkvoltage breakdown would have

been controlled by the resistivity of thesilicon used for the wafer. The precise value of

resistivity will vary across a wafer,from wafer to wafer and from lot to

lot. Using starting wafer resistivity for determining thebreakdown voltage could create yield consistencyproblems on tight voltage windows.

An alternative approach is to use a high resistivity silicon wafer which would give a higher break-

down voltage than required, and diffusein a lightly doped layer which lowers thebreakdown voltage to the required value.In order to be successful, the doping ofthis additional layer needs to be highlyaccurate.

Ion-Implantation is needed to givesufficient precision in controlling thelevel of dopant. Lowering the silicons’breakdown voltage by diffusion allowsselective breakdown areas. A pad ofdopant can be implanted at the centroidof each emitter. Breakdown will occur atthis pad, which will be deep in the bulkof the silicon and well away from thechip surface. By defining the breakdown

region, the switch-on and current spreading perfor-mance should be more consistent.

Figure 5.Junction Termination Technologies


The use of a breakdown pad considerably reducesthe breakdown voltage sensitivity tosurface states. Chip surface voltagecontrol will still be required,but the chances of prematuresurface breakdown are nowconsiderably reduced. Figure 7shows a typical TISP® devicestructure which uses a buriedbreakdown pad and planarjunction termination. This structureshows a 1988 development of the originalion-implanted patent and is covered byUS patent number 4,967,256.

Simple Equivalent CircuitThe array of circuit elements shown in Figure 4 canbe simplified to a lumped equivalent circuit contain-ing a transistor pair, TR1 and TR2, an avalanchediode, D1, and a shunt resistor, RH. Figure 8 showsthese two circuits together with the graphical symbolfor the protection structure.

Protection CharacteristicsThe voltage-current characteristic of the protector canbe explained using the lumped equivalent circuit ofFigure 8. Figure 9 shows the protector voltage-currentcharacteristic together with the parts of the lumpedequivalent circuit that are carrying significant currentduring each of the various operating modes.

In the off-state condition, when the voltage is in-creased from zero in the positive polarity, most of thevoltage is supported by the (reversed biased) collect-

Figure 7.Typical TISP® Structure

R1R2

D1

TR1

TR2

Array of Circuit Elements in Silicon Structure

RH

D1

TR2

TR1

Lumped EquivalentCircuit

GraphicalSymbol

Figure 8. Protector Circuits and Symbol

base junction of transistor TR2. The current path isthrough transistor TR2, and resistor RH.

The current levels are very lowduring this condition as shownin Figure 6.

The breakdown region initiateswhen the applied voltage issufficient to cause the diode D1,

to avalanche. As the diode D1 isintegrated with transistor TR2, the

breakdown region is a classic transistorBVCEO shape. After the initial breakdown,the characteristic is re-entrant as the transistor

gain increases and then the characteristic shows apositive slope characteristic at higher current levels.The current path is through the emitter of transistorTR2, then through the parallel combination of thetransistor collector-base and diode D1, and exitsthrough resistor RH.

When the voltage developed across resistor RH, issufficient to cause the conduc-tion of transistor TR1, itscollector draws extra currentfrom the base of transistorTR2. The extra base currentcauses transistor TR2, to passmore base current into tran-sistor TR1. A regenerativetransistor pair is formed.The breakdown characteristicdevelops a negative slope and

the characteristic terminateswhen the transistors pass enough current to switchinto a low voltage on state.

In the low voltage state and at high current, thetransistors will pass most of the current. As thecurrent reduces, the current taken by resistor RH,shunting the base emitter of transistor TR1, becomessignificant. Switch off occurs when the current levelfalls to a point where the voltage developed across theresistor RH, the transistor TR1, base-emitter voltage,is less than the value needed to cause transistorconduction and the transistor pair switches off.


7

Figure 9. Protector Equivalent Circuits and VI characteristic

Switching Quadrant

Blocking Quadrant

RH

TR2

RH

D1

TR2

RH

D1

TR2

TR1

TR2

TR1

RH

TR2

TR1RH

D1

TR2

+v-v

-i

+i

Off State

Blocking

On

Sta

te

Bre

akdo

wn

Switch Off

Switch On

In the opposite voltage polarity, most of the voltage issupported by the reverse biased base-emitter oftransistor TR2. In this blocking condition, the currentpath is through transistor TR2, and resistor RH.

This protector has a switching characteristic in thepositive polarity and a blocking characteristic in thenegative polarity. For this reason it is called a unidirec-tional protector - the switching characteristic onlyoccurs in one polarity. It can be further qualified as areverse blocking unidirectional protector. Figure 10shows the characteristic and symbol for the reverseblocking unidirectional protector. Note that thereverse blocking capability is higher than the positivepolarity breakdown voltage.

A bidirectional protector can be made by integrating asimilar unidirectional protector in antiparallel - Figure11. When one unidirectional protector is in itsswitching polarity, the other will be blocking. Simi-larly, by integrating a diode in antiparallel, a forwardconducting unidirectional protector can be made -Figure 11. Although this protector passes highcurrents in both voltage polarities, it is still calledunidirectional as there is only one switching quadrant.The bottom pair of characteristics in Figure 11 shows

the blocking characteristics of the paralleled sectionsfor information only. The switching and diodeconduction characteristics will mask out the blockingcharacteristics on the actual protector characteristic.

Three protection structures are the building blocks forfixed voltage TISP® SPDs; the reverse blockingunidirectional, the forward conducting unidirectionaland the bidirectional.

Figure 10. Reverse Blocking Unidirectional Thyristor

+v-v

-i

+i


TISP® Electrical Requirementsand TermsFigure 12 shows the switching characteristic of Figure9 annotated with parameter letter symbols. In service,the TISP® device must meet requirements in threeareas:

Transparency - The normal system operation must notbe degradedProtection - Under the specified overstress conditions,the protected equipment performs as required withoutcreating hazardsDurability - Provide reliable long term transparencyand protection

TransparencyThe protector’s off-state current and the capacitancemust not affect the signals normally occurring on thetelephone wires. This covers the part of the character-istic from zero volts to the rated maximum repetitiveoff-state voltage, VDRM. Also, after an overvoltagethat causes the protector to switch, switch off mustoccur to restore normal operation. Switch off occursat the low current termination point of the on-stateregion called the holding current, IH.

Two off-state current conditions are normally speci-fied, one for standby and the other at the systemnormal maximum voltage level. In POTS (Plain Old

Figure 11.Formation of Bidirectional and Forward Conducting Unidirectional Protectors by Antiparallel Connection

+v-v

-i

+i

+v-v

-i

+v-v

-i

+i

Plus

Gives

Unidirectional

Diode

Forward Conducting

Unidirectional

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+i+i

+v-v

-i

+v-v

-i

+i

Plus

Gives

Unidirectional

Unidirectional

Bidirectional


9

Figure 12. Switching Characteristic Regions and Parameters

SwitchingCharacteristic

+v

+i

V(BO)

VD

ID

IH

IT

VT

ITSP

-iVDRM

IDRM

I(BO)

ITSM

Off-stateRegion

On-stateRegion

SwitchingRegion

BreakdownRegion

Telephone Service) lines, in standby, the line normallyhas a battery voltage applied. This battery voltage istypically about -50 V. At standby, it is important thatthe protector draws little current. To ensure this, a d.c.off-state voltage, VD, equal to the battery voltage, isapplied and the resulting off-state current, ID,measured. Increases in ambient temperature increaseID, so it is important to specify ID to be measured atthe highest expected ambient temperature. As thestandby is the normal line condition, durabilitytesting often uses this as the electrical bias on thedevice.

The second off-state test comprehends the maximumline voltage resulting from the system signal or testingor ringing conditions. Under the normal systemmaximum voltage condition, the protector should notclamp and distort the voltage. To ensure this, theprotector’s repetitive off-state voltage rating, VDRM,is set to be equal or greater than the maximum systemvoltage. For the rating verification test, the voltage isramped up across the device and the repetitive off-state current, IDRM, is measured when the voltagereaches VDRM. The low-current breakdown voltageregion is temperature dependent at a rate of about0.13 %/°C. Characteristic curves of this are oftenincluded in TISP® data sheets. This means that anyclipping will be most severe at the lowest ambienttemperature. Therefore, VDRM should be measuredat the lowest expected equipment ambient tempera-ture, or at 25 °C with an appropriate increase in theVDRM value.

Device junction capacitance decreases with increasingapplied voltage. Capacitance is measured with aspecified d.c. and the a.c. bias voltage levels, e.g. -5 Vand 1 V r.m.s. The a.c. voltage adds and subtracts tothe d.c. voltage and at any moment the net voltageapplied is the sum of the d.c. and instantaneous a.c.voltage values. The instantaneous capacitance valuewill be set by this voltage sum. Thus, as capacitancetesting normally uses 1 V r.m.s a.c., the capacitancevalue measured will be an average value resulting froman applied voltage that varies ±1.4 V on a mean (d.c.)value. When the d.c. voltage bias is much greater thanthe a.c. voltage bias, the variation in capacitancecaused by the a.c. is negligible. The capacitance is notfrequency sensitive, but both circuit and packageinductance can resonate with the capacitance and thisis a more important frequency consideration. Thecapacitance measurement conditions should reflectthe expected d.c. voltage bias, VD, and, if possible,the appropriate a.c. voltage signal level, Vd. TISP®

data sheets contain capacitance values for several d.c.voltage bias levels and often have graphs of capaci-tance versus voltage.

When the protector switches into the on-state, itdiverts the line d.c. feed current as well as the currentresulting from the overvoltage. After the overvoltagecurrent stops, the protector must switch off to restorenormal operation (transparency). This means that theprotector’s switch off current, called holding current,IH, must be higher than the line d.c. feed; otherwisethe protector would stay on. As the value of IHdecreases with increasing temperature, IH should bespecified to be equal to or higher than the line d.c.feed at the highest expected ambient temperature.Most TISP® data sheets contain a graph of IH versustemperature. The holding current value is determinedby switching the protector on to a specified on-statecurrent level, IT, then ramping down the current untilthe protector switches off. The current level whereswitch off occurs is the device IH.

ProtectionThere are three areas concerned with the protectionfunction; protection voltage, rated current capabilityand safety performance.


The protector must limit the voltage to a level that thefollowing circuits can withstand (Figure 3) under botha.c. and impulse conditions. In the breakdown region,the peak voltage developed is called the breakovervoltage, V(BO), and the current at this point is I(BO),the breakover current.

AC conditions can range from a few cycles of highcurrent, terminated by the operation of the overcur-rent protection, to 900 s or more of low level current.To cover the a.c. condition, the TISP® V(BO) isnormally measured with a voltage ramp of 250 V/msand 750 V/ms and a source resistance of 300 Ω.Under a.c. conditions, the values of V(BO) and I(BO)are major factors in the breakdown region power loss.So, for a.c. conditions, both V(BO) and I(BO) aremeasured.

Under impulse conditions, V(BO) will stronglydepend on the impulse di/dt in the breakdown region.(Note: this is the dual of Gas Discharge Tubes, GDTs,whose peak limiting voltage depends on dv/dt.) Tocover the impulse condition, the TISP® V(BO) isnormally measured at 20 A/µs. The unclampedvoltage rise is 1000 V/µs from a source resistance of50 Ω. Other impulse voltage alternatives are: V(BO) fora specific impulse wave shape (e.g. 2/10), the limitingvoltage-time envelope for a specific impulse wave shape(TISPPBL3) or a graph of V(BO) versus di/dt.

As with V(BO), the current ratings need to be speci-fied for a.c. and impulse conditions. AC ratings suchas peak non-repetitive on-state current, ITSM, forgiven times, are usually given as spot values in the

Table 1.

data sheet rating table. TISP® data sheets will oftenshow a graph of ITSM versus time, as well. As thecurrent through the protector is quasi-sinusoidal, thecurrent is expressed as a peak value rather than anr.m.s. value. Overcurrent protector operating time isexpressed for d.c. or r.m.s current values. The overcur-rent and overvoltage protectors are coordinated if, at agiven current level, the overcurrent protector operatesbefore the overvoltage protector reaches its time limit.To make this comparison, the respective currentvalues must be converted to a common format, eitherpeak or r.m.s.

To cover international and national standards andrecommendations, the peak impulse non-repetitiveon-state current, ITSP, rating must be given for a widerange of waveshape designations. Common impulsewaveshape designations are shown in Table 1 below.

Impulse current ratings vary with temperature.Designers should check that the ITSP rating is ade-quate for the expected temperature range. Dependingon the TISP® Series, the ITSP temperature range canbe -40 °C to +85 °C or 0 °C to +70 °C, or expressedas a graph of ITSP versus temperature.

Sometimes there will be a series resistance before theTISP® device which will reduce the impulse currentlevels. The reduction in impulse level may allow the

use of a lowercurrent ratedprotector.

The on-statevoltage, VT, ata specified on-state current,IT, is oftenquoted forhistoricalthyristorreasons. In

practice, a VT value is not particularly useful as it isonly a given current power loss, which is alreadycomprehended in the ITSM and ITSP ratings.

Safety standards often specify tests that will causeprotector failure to monitor the resultant fault mode and

StandardPeak Voltage Setting

VVoltage Waveform Peak Short Circuit Current

ACurrent Waveform

G(February 1999)

R-1089-CORE 2500 2/10 2 x 500 2/10

1000 10/1000 2 x 100 10/1000

FCC Part 68(March 1998)

1500 10/160 200 10/160

800 10/560 100 10/560

10001500

9/720 †25

37.55/320 †

ITU-T covering:K.20 (02/2000)K.45 (02/2000)K.21 (10/2000)

1000150040006000

10/700

2537.5100150

5/310

† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K.21 10/700 impulse generator


11

Test Description Conditions Duration LTPD % Standard Method

High Temperature Reverse Bias 150 °C, 80 % RV 1000 h 3 MIL STD 750 1048

Biased Humidity 85 °C, 85 % RH, -50 V 1000 h 3 JEDEC STD 22 A101

Temperature Cycle -85 °C To +150 °C 200 cycles 3 MIL STD 883 1010

Solder heat 260 °C 10 s 10 MIL STD 750 2031

Solvent Resistance 3 Solvents 20 MIL STD 883 2015

Solderability 245 °C, After 8 h Steam Age 5 s 7 MIL STD 883 2003

Figure 13. Diode Characteristic and Parameters

Diode ForwardConduction

Characteristic

+v

+i

IF

VF

IFSP

-i

IFSM

(ITSP)

(ITSM)

-v

check that there are no safety hazards. This type ofrequirement is covered in the TISP4350L3BJ data sheet.

DurabilityOperated with their rated a.c. and impulse values,TISP® devices have an extremely long operating life,e.g. 105 impulses. Environmental and assemblyreliability are covered by the TISP® qualificationprocedures. All TISP® devices are qualified in accor-dance with the standards listed in Table 2 prior toproduction release. Accelerated stress tests are chosento ensure new products will meet the reliabilityrequirements of the telecom industry. Each quarter,samples representative of the function and technologyof the TISP® range are monitored to ensure thatreliability remains satisfactory over the production lifeof the product.

Additional TISP® ElectricalRequirements and Terms

Conducting unidirectional protectors will have adiode characteristic in one voltage polarity - Figure13. The diode forward voltage, VF, at a specifiedforward current, IF, is the limiting voltage for theprotected circuit. To cover a.c. conditions, the VFshould be given at a series of IF values or as a graph.Under impulse conditions, the diode conduction maybe delayed, leading to a short term increase in con-duction voltage called forward recovery voltage,VFRM. Like impulse V(BO), VFRM is a function ofimpulse initial di/dt and can be given for a specificimpulse wave shape (i.e. 2/10) or a graph of VFRMversus di/dt.

Although the diode has its own rating letter symbols,the thyristor ones are often substituted; ITSM forpeak non-repetitive forward current, IFSM and ITSPfor peak impulse non-repetitive forward current, IFSP.

Fixed Voltage TISP® Function RangeTable 3 lists the current range of fixed voltage devices.

Two terminaldevices are basicbuilding blocks.These are thebidirectionalTISP4xxx and theunidirectionalconducting

TISP5xxx Series (unidirectional blocking devices arealso made for specific customers needs). A singledevice can be used to limit the voltage between wiresor between several points if placed on the d.c. outputof a diode bridge. Two devices can be used on a 2-wiretelecom line to limit the conductor voltage to protec-tive ground by connecting each device between a wireand ground. There are three protection points in-volved here; the two wires and ground. This protectorarrangement gives two modes of protection, whichwill be where the protector is directly connectedbetween each wire and ground. The voltage betweenthe wires will be limited by operation of the twoprotectors in series and this will be higher than the

limited voltages to ground. Connecting a thirdprotector between the wires gives direct inter-wirevoltage limiting and 3 modes of protection. Modes ofprotection are classified by the protector being directlyconnected between those terminals. Indirect routes,via other terminals, do not count.

Table 2.


Fixed Voltage TISP® ConfigurationsProtection

PointsProtection

ModesIntegratedProtectionElements

ClassBidirectional Unidirectional

Symmetrical Asymmetrical Conducting Blocking

2 1 1 TISP4xxxSeries

TISP5xxxSeries Custom

3 2 2 TISP3xxxSeries Custom TISP1xxx

Series

3 3 3 TISP7xxxSeries

Protection Mode Terminal PairVI Characteristic +v-v

-i

+i

+v-v

-i

+i

+v-v

-i

+i

+v-v

-i

+i

The original design of the TISP® device allowed theintegration of multiple protective elements. Thecurrent product range integrates the 3-point protec-tion function into a single silicon chip. The TISP3xxxand TISP1xxx Series have 2 mode protection. As astandard, the TISP3xxx has a symmetrical protectioncharacteristic in both voltage polarities. Specialvariants can be made where the protection characteris-tic is asymmetrical.

The TISP7xxx Series is a 3-point protector with 3mode protection. As a standard, the TISP7xxx has thesame protection voltage between any terminal pair;that is each wire to ground and wire to wire. Specialvariants can be made where the wire to wire protec-tion voltage is lower than the wire to ground voltage.

Graphical symbols used in this table represent theprotective characteristic measured at the deviceterminals. For ease of integration or to meet certainperformance requirements, the integrated protectionelements might not be of the form shown in thegraphical symbol. This is similar to the graphicalsymbol of a triangle used to represent an operational

Table 3.

amplifier which actually consists of many transistorsand other components. The final row of the table is agraphical reminder of the VI characteristic of thevarious protection classes.

Gated TISP® Protection FunctionThese TISP® devices have a gate electrode, G, whichcontrols the TISP® switching threshold. When thevoltage between the gate and its adjacent electrodereaches a threshold value, TISP® current conduction isinitiated. Further voltage increase causes the TISP®

device to switch.

There are two main applications for gated TISP®

devices: protection voltage level setting by using anexternal voltage reference, and current triggering bythe overstress current. Normally, TISP® devices workas overvoltage protectors by diverting current. Inthe current triggered mode, the gated TISP® devicestill diverts current, but the current diverted waspreviously taken by the protected load.

Gated TISP® StructureGates are formed by making connections to theintermediate silicon layers of a fixed voltage TISP®


device. Gates are named by the type of silicon layer theyconnect to: N-gate or P-gate. Figure 14 is the fixedvoltage structure of Figure 7 with gates added. Thep layer, adjacent to the cathode n+ layer,has a P-gate electrode connection.The thyristor can be switchedon by a positive voltageapplied to the P-gate-cathode electrode pair.

The n- layer, adjacent tothe anode p layer, has anadditional n+ diffusion forthe N-gate electrode contact.The thyristor can beswitched on by a negativevoltage applied to the N-gate-anode electrode pair.

Section (a) of Figure 15 reproduces thelumped equivalent circuit and graphicsymbol of Figure 8. The gates of Figure14 connect to the bases of the NPN, TR1,and PNP, TR2, transistors in the lumped equivalentcircuit. The P-gate connection to the base of the NPNtransistor creates a P-gate SCR (Silicon ControlledRectifier) or simply an SCR, as this is the most com-mon form of SCR ((b) of Figure 15). The N-gateconnection to the base of the PNP transistor createsan N-gate SCR ((c) of Figure 15). In the N-gate SCRlumped equivalent circuit, shunt resistor RH, whichsets the thyristor holding current, has been movedfrom the NPN transistor base-emitter to the PNP

transistor base-emitter. If RH had been left across the NPN transistor base-emitter, it would have shunted the reverse blocking characteristic.

Current TriggeredOperationIn the normal circuit-currenttriggered mode, the voltagemeasurement reference terminalis the non-adjacent electrode tothe gate: anode for the P-gateand cathode for the N-gate.The ground connected referenceterminal passes the divertedcurrent to ground. The gated

devices of Figure 15 are unidirectional and will only switch in the appropriate voltage polarity. P-gate SCRs only switch in the negative voltage polarity and N-gate SCRs switch in the positive voltage polarity. This P-gate and N-gate SCR pair is called a complementary pair astheir terminal current and voltage polarities areopposites.

Figure 16 shows the appropriate bias conditions forthe complimentary SCR types. The P-gate SCR isoperated with the anode grounded, the cathode con-nected to the incoming wire and the gate connectedto the protected load. At a negative voltage, -v, acurrent -i is drawn from the protected load. As thecurrent flows though the parallel combination of the

Figure 14.Gated Protector Cross Section

RH

D1

TR2

TR1

(a) (b) (c)

RH

D1

TR2

TR1

Anode

P-Gate

Cathode

Anode

Cathode

N-Gate

N-GateSCR

(P-Gate)SCR

N-Gate LumpedEquivalent Circuit

P-Gate LumpedEquivalent Circuit

Lumped EquivalentCircuit

GraphicalSymbol

RH

D1TR2

TR1

Figure 15.Fixed Voltage, P-gate and N-gate SCR Circuits and Symbols


SCR gate-cathode resistance and the resistor RGK, avoltage, VGK, is developed that is positive withrespect to the SCR cathode. To switch the SCR intothe on state, the value of VGK must reach the gatetriggering voltage, VGT, which is about 700 mV. Thecircuit current, iS, to cause switching depends on theSCR triggering current, IGT, and the value of RGK.If IGT was 25 mA and the required circuit currentto trigger was 200 mA, the value of RGK becomes700/(200 - 25) = 4 Ω. Thus, when the incoming nega-tive overvoltage draws 200 mA from the protectedload, the SCR will switch on, diverting the currentcaused by the overvoltage from the protected load toground.

The operation of the N-gate SCR in the positivepolarity is the same as the P-gate SCR in the negativepolarity. The complimentary description requirespolarity reversal of the voltages and currents, plus theexchange of anode and cathode references.

A complimentary SCR pair is required to protect asingle wire against positive and negative voltages,Figure 17. Referencing the composite protectorelectrodes is a problem as the P-gate SCR anode joinsto the N-gate cathode and the P-gate SCR cathodejoins to the N-gate anode. To solve this problem theelectrodes are named MT1 and MT2. Electrode MT1(Main Terminal 1) is the electrode connection that isadjacent to the gate and electrode MT2 is the Figure 17. Bidirectional Current-Triggered Protection

Ground

ProtectedLoad

±v

G

RGMT1±i

MT1vGMT1

MT2

non-adjacent electrode connection to the gate. Inaddition to complimentary SCRs, this bidirectionalfunction is given by a device called a TRIAC (Triodefor Ac Control), which is used in 50 Hz/60 Hzapplications.

In the current-triggered mode, the SCRs providecurrent limiting to the protected load. By incorporat-ing a defined voltage breakdown region in the SCRstructures, the SCRs will limit the maximum voltageto the load as well, by operating as fixed voltageprotectors. When operating in the fixed voltagemode, the current from the protected load is notneeded to cause switching.

Voltage Reference (Tracking) OperationAs in the current-triggered mode, the voltage measure-ment reference terminal is the non-adjacent electrodeto the gate. For voltage tracking operation, the gate isconnected to an external voltage reference whichcontrols the working and protection voltage. Asimplified circuit is shown in Figure 18.

In Figure 18, the P-gate SCR is operated with theanode grounded, the cathode connected to theincoming wire and the gate connected to a powersupply which biases the gate at voltage -VG. For theSCR to trigger and switch on, the negative voltage, -v,on the wire must be equal or greater than the sum ofthe gate bias, VG, and the gate-cathode voltage forSCR triggering. The triggering voltage, VGT, is about0.7 V, so the protection voltage is (-VG -0.7). If VGvaries, the negative protection voltage will track thechanges with an offset of -0.7 V. Similarly, the

Figure 16. Current-Triggered SCR Bias Conditions

(P-Gate)SCR

N-GateSCR

Anode

Cathode

P-Gate

- +

RGK

-i vGK

AnodeN-Gate

Cathode

-+

RGA

+ivGA

Ground

ProtectedLoad

ProtectedLoad

-v

+v


Figure 18. Simplified Voltage Tracking Protection Circuit

(P-Gate)SCR

N-GateSCR

Anode

Cathode

P-Gate

-

+vGK

AnodeN-Gate

Cathode

-

+-iG vGA

Ground

ProtectedLoad

ProtectedLoad

-v

+v

PS

PS

-

+

-

+

-vG

+vG

+iG

protection voltage of the N-gate SCR will track thepositive gate bias, +VG, with an offset of 0.7 V. Thesevoltage tracking protectors are sometimes calledprogrammable protectors.

In practice, the gate bias voltage comes from thesupply powering the SLIC (Subscriber Line InterfaceCircuit) used to drive the telephone line. This form oftracking protection ensures that the SLIC overvolt-ages are limited close to the power supply voltage. Afixed voltage protector cannot give the protectionvoltage precision of a tracking protector.

The simplified circuit of Figure 18 has two funda-mental problems. One is that SCR input resistance,which can be in the region of 30 Ω, will create anexcessive leakage current between the gate powersupply and the wire. The second problem is when theSCR switches on, it will also try to pull the gatepower supply voltage to ground as well as the wirevoltage. Both these problems can be prevented byinserting a series gate diode block reverse gate currentas shown in Figure 19.

Figure 19. Use of Gate Diodes to Block Reverse Current

(P-Gate)SCR

N-GateSCR

Anode

Cathode

P-Gate

-

+vGK

AnodeN-Gate

Cathode

-

+-iG vGA

Ground

ProtectedLoad

ProtectedLoad

-v

+v

PS

PS

-

+

-

+

-vG

+vG

+iG

Gate BlockingDiode

Gate BlockingDiode

would be a switching mode. Switching mode powersupplies that rectify and smooth pulses can only supplycurrent in one direction. Unlike a battery, these switch-ing mode power supplies cannot accept reverse current,i.e. they cannot be charged like a battery.

The problem this causes is shown in Figure 20. ACinduction testing at low levels of VAC gives a cathodecurrents, IK, too low to cause switching of the SCR,Th1. The peak negative voltage is clamped just belowthe gate supply voltage of -50 V. A proportion of thecathode current appears as gate current, IG. The reasonfor the gate current dipping in the middle of thenegative a.c. cycle is SCR regeneration, which reducesthe gate current value needed to support the cathodecurrent. As the gate current does not fall to zero, theSCR never regenerates sufficiently to switch on. Thegate current peaks at 80 mA and averages out to 21mA. Unless the SLIC is drawing at least 21 mA viadiode D2, the net current of the negative voltagepower supply will be positive, i.e. a proportion of thegate current will be charging the power supply. Oncethe voltage starts to lower, most switching modepower supply loops will stop producing chargingpulses. This reverse biases the rectifier diode D1,leaving the gate current to charge the voltage lowerand lower. This situation often results in the SLICfailing due to overvoltage.

The SLIC illustrated does not need to producepositive voltages. The overvoltage protection in the

An IC based protection thyristor incorporating thisblocking diode was proposed in 1986. By 1989,several parts were commercially available. This stillleft one problem, which was caused by the nature ofthe power supply. Typically, the power supply used


Figure 20. AC Induction TestingTime - ms

0 5 10 15 20

I K -

Cat

hode

Cu

rren

t - m

A

-300

-200

-100

0

100

200

300

-100

I G -

Ga

te C

urr

ent -

mA

-80

-60-40

-20

020

40

6080

100

Vol

tage

- V

-60-50-40-30-20-10

010

IK

VG VK

IK

IG = zero

IG = +80 mA

Time - ms0 5 10 15 20

RAC

SLIC

C1

C2

D3

VBat

VG

Switching ModePower Supply

D1Tx

D2

ACInduction

Test

D4 Th1

VK

IK IG

VAC

positive polarityis given by diodeD4, whichclips the voltagejust aboveground. Gatecurrent duringdiode conductionis zero.

Some solutionsto this problemare shown inFigure 21. Figure21 is a simplifiedform of theFigure 20 circuit.Two SCR variantsare shown: one asin Figure 20 and the other with a transistor TR1replacing the gate diode D3. The graph shows theaverage current produced by the two variants. TheSCR average current peaks just before the SCR startsto switch. Higher levels of a.c. test voltage, VAC,reduce the voltage clamping time of the SCR and theaverage gate current. Breakdown diode D5 is addedto divert current when the gate current starts tocharge the power supply. This diode is often sacrificial,

overheating and going short circuit under adversepower induction conditions.

The transistor buffered SCR shows an unexpectedcharacteristic - the average gate current is negative, soalways correctly loading the power supply. The gain ofthe transistor will reduce the average gate currentduring cathode current flow, but this will still be apositive value even though it is lower than the

unbuffered SCR gatecurrent. Figure 22provides the answer;there is negativecurrent flow during thediode D4 conduction.By careful integration,some of the diodecurrent diverts to thetransistor base causinga negative gate currentflow during diodeconduction. The peakpositive gate current is1.6 mA and the peaknegative gate current isa larger -7 mA.

Figure 21. Switching Mode Charging Currents

VAC - Open-circuit RMS AC Voltage to Cathode - V0 100 200 300 400 500

I G(A

V) -

Ave

rag

e G

ate

Cur

rent

- m

A

-10

-5

0

5

10

15

20

25

Protector Clamping

SCR

Protector Starting to Switch

Transistor-Buffered

SCR

VG

VG Switching Mode Power Supply

C1

D1

D5 (Added for VG Limiting)

TxIG(AV) Charges V G

IG(AV) Loads VG

RAC = 600 ΩΩΩΩ

G

Transistor Buffered SCR

D3

D4 Th1TR1

D4 Th1SCR


Figure 22. Transistor Buffered SCR Currents

I K -

Cat

hod

e C

urre

nt -

mA

-300

-200

-100

0

100

200

300

I G -

Gat

e C

urre

nt -

mA

-100

-80

-60-40

-20

020

4060

80100

IK

IK

IGTransistor Buffered

= -7 mA

IG

Transistor Buffered = +1.6 mA

Time - ms0 5 10 15 20

Protectors like the TISP61089B are designed on thisprinciple.

Transistor Buffered Thyristor StructureFigure 23 shows how the NPN transistor is integratedwith the P-gate SCR. The NPN transistor is formedfrom the starting silicon n- material and diffusion ofp+ and an n- conversion. Low resistance contact areasfor the collector and emitter electrodes are given byfurther n+ diffusion. A metal strap connects thetransistor emitter to the SCR P-gate. This type ofstructure is used in the TISP8200M devices and acomplimentary version for the TISP8201Mdevices (PNP transistor and an N-gateSCR).

Gated TISP® FunctionRangeGated devices can be made in thesame classes as fixed voltagedevices: conducting unidirectional,blocking unidirectional, symmetri-cal bidirectional and asymmetricalbidirectional. Likewise, theprotection modes can be single ormultiple in a single package. The extradimensions gated devices bring are P-gate,N-gate or both, plus buffered or unbuffered.Adding these gate options to the fixed voltage classesand modes of Table 3 would make a complex table.Table 4 on the following page is a subset showing thecatalog parts currently offered by Bourns.

Figure 23. Transistor Buffered Thyristor Structure

The current product range integratesseveral 3-point protection functionsinto a single silicon chip. TheTISP6xxxx Series, TISPPBL3,TISP8200M and TISP8201M have 2mode protection. All are transistorbuffered to reduce triggering current. TheTISP6xxxx Series and TISPPBL3 areconducting unidirectional protectorsintended for protecting negative batteryvoltage SLICs. The TISP8200M andTISP8201M are used as a pair toprotect ringing SLICs which have plusand minus battery supplies.

The TISP6NTP2x series are 5-point protectors with 4modes of protection. These devices integrate 4conducting unidirectional protectors in a singlepackage.


Table 4.

TISP® PackagingWhen the TISP® device was first introduced in 1982,it used the standard TO-220AB power device pack-age. This package, together with the smaller SOT82,was intended to be secured to a heatsink to allow highdissipation. Generally, the dissipation of a TISP®

device does not require the use of a heatsink. This ledto the introduction of various TISP® products insmaller, lower height through-hole mounting pack-ages in the 1987 to 1998 period. Recognizing the

trend to surface mount technology, in 1993 TISP®

devices were introduced in 8-pin small outlinepackages, D008, and followed in 1997 by the 2-pinDO-214, SMB package. This path of migrating frompower device packaging to smaller size through-holepackage and the introduction of surface mounttechnology is shown in Figure 24.

Gated TISP® ConfigurationsProtection Class - Unidirectional

Po

ints

Mo

des

Inte

gra

ted

Ele

men

ts Conducting BlockingBuffered P-gate Buffered P-gate Buffered N-gate

3 22TISP61xxx

SeriesTISPPBL3

TISP8200M

5 44 TISP6NTP2xSeries

Protection Mode Terminal

Pair VI Characteristic

-i

+i

+v-v

-i

+i

+v-v

-i

+i

+v-v

TISP8201M


Figure 24. Package Introductions

Applications InformationTISP® data sheets are comprehensive and containapplications information relevant to that device. The

following table lists some of the topics found inTISP® series data sheets.

1980 1985 1990 1995 2000

TO-92

P008(PDIP)

SL003(SIP)

DO-92(MOD. TO-92)

TO-220 SOT82

Through-HolePower Packages

Through-HoleIsolated Packages

D008(SOIC)

SMB(DO-214AA)Surface-Mount

Packages

Table 5.

Area Topic TISP ® Data Sheet Area Topic TISP ® Data SheetCircuits BOD replacement ’3700F3 Systems ADSL ’4360H3BJ

Diode bridge multi-point protection ’5xxxH3BJ HDSL ’40xxL1BJ, ’40xxH1BJ

LCAS (Line Card Access Switch) ’4125/’219H3BJ Home phone networking ’40xxL1BJ, ’40xxH1BJ

Low capacitance 3-point protection ’5xxxH3BJ ISDN - d.c. feed ’5xxxH3BJ, ’6NTP2B

SLICs - Ericsson ’PBL3 ISDN-S/U ’40xxL1BJ, ’40xxH1BJ

SLICs - Ringing, negative supply ’61089B LAN and MAN ’3700F3

SLICs - Ringing, positive/negative supply ’8200M, ’8201M Pair Gain ’40xxL1BJ, ’40xxH1BJ

SLICs - Negative supply ’5xxxH3BJ xDSL ’6NTP2A

System insulation protection ’3700F3, ’4700F3 Equipment ADSL MODEMs ’4360H3BJ

Transformer winding protection ’40xxL1BJ, ’40xxH1BJ POTS intra-building, ’6NTP2A

Standards FCC Part 68 ’4xxxL3BJ, ’4360H3BJ - Cable MODEMs,

GR-1089-CORE ’61089B, ’6NTP2A - Router,

IEC 61000-4-5 ’6NTP2A - Set top boxes, WLL

IEEE Std 802.3 ’3700F3 Impulse Generators

GR-1089-CORE ’61089B

ITU-T K.20, K.21 ’6NTP2A IEC 61000-4-5 generator ’7xxxF3

UL 1950/60950, CSA 22.2 No.950 ’4xxxL3BJ, ’3700F3 ITU-T generators


bourns telecom overvoltage protectors · 2113907, 1981). production of these devices started in...

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