boost current multilevel inverter and its application

1116 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 4, JULY 2006

Boost Current Multilevel Inverter and Its Applicationon Single-Phase Grid-Connected

Photovoltaic SystemsPedro Gomes Barbosa, Member, IEEE, Henrique Antonio Carvalho Braga, Senior Member, IEEE,

Márcio do Carmo Barbosa Rodrigues, Student Member, IEEE, and Estevão Coelho Teixeira, Member, IEEE

Abstract—This work presents a novel current multilevel (CML)inverter topology, named boost CML inverter, and its applicationon energy processing of single-phase grid-connected photovoltaic(PV) systems. The structure allows a high power factor operationof a PV system, injecting a quasi-sinusoidal current into the grid,with virtually no displacement in relation to the line voltage at thepoint of common coupling among the PV system and the loads.The major appeals of using the CML technique are the balancedcurrent sharing among semiconductor switches and the decreaseof the current slope in the circuit devices, with a consequent re-duction of conducted and radiated electromagnetic interference(EMI). The CML technique also allows adapting or minimizingcurrent waveforms harmonic content. System description, math-ematical approach, and design guidelines are presented, providingan overview of the new topology. In order to validate the proposedconcepts, experimental measurements, made in a small-scale labo-ratory prototype, are also presented. The obtained results evidencethe feasibility of the application of this new topology on single-phase grid-connected PV systems.

Index Terms—Current multilevel (CML) inverter topology, elec-tromagnetic interference (EMI), photovoltaic (PV) systems.

I. INTRODUCTION

DUE TO the growing energy consumption around theworld and the eminent exhaustion of fossil-fuel reserves,

a great interest on alternative energy sources can be noticednowadays. The threat of electrical energy rationing, blackouts,and overtaxes, in addition to the great environmental awareness,increases the requirement of research on alternative renewableenergy systems. Among the clean and green power sources, thephotovoltaic (PV) solar energy comes up as being a very inter-esting alternative to supplement the generation of electricity.Due to the persistent cost reduction of PV modules—accordingto some studies, a PV module will cost around US$ 1.00/Wp by2007 [1]—this kind of solar energy exploitation, once attractivein the past only in remote regions or rural zones, started tobecome an economically-interesting alternative even in urbanapplications, such as small-rated single-phase residential gen-eration units connected to the utility grid.

Manuscript received October 5, 2004; revised July 29, 2005. This work wassupported by CAPES, FAPEMIG, FINEP, and CNPQ/CTEnerg under Grant552371/01-7. Recommended by Associate Editor K. Ngo.

P. G. Barbosa and H. A. C. Braga are with the Electrical Engineering De-partment, Federal University of Juiz de Fora, Juiz deFora 36001–970, Brazil(e-mail: [email protected]).

M. C. B. Rodrigues is with CEFET-MG, Leopoldina 36700-00, Brazil.E. C. Texeira is with COPPE-UFRJ, Rio de Janeiro 21941-972, Brazil.Digital Object Identifier 10.1109/TPEL.2006.876784

There are grid-connected PV systems ranging from 100 Wto several megawatts [2]. Most residential photovoltaic arraysrange from 1–5 kW, depending on the available area, sincethey are usually located on the roof of houses and buildings.All the power generated by this kind of system is injected intothe point of common coupling (PCC) among the loads and thegrid, supplying or helping to supply the local power demand. Ifthe generated power is greater than the demanded by the localloads, the generation excess will be injected into the utility grid.During periods when the PV generation is insufficient—e.g., atnight—the local loads are entirely fed by the utility. In thesePV systems, a bidirectional power meter is required in order toregister the power drawn by and generated on the building.

As the PV cells generate dc power, a power conditioningsystem is also required, in order to suit the frequency and voltagelevel to the utility grid and allow the parallel connection. In ad-dition, a PV system must present some features related to thesafety, efficiency, and power quality. There are some interna-tional standards, such as IEEE Std. 929–2000 and UL 1741,that cover the connection of PV systems to the utility grid [3],[4]. An optional, but very interesting, feature of a PV system isthe ability to track the maximum-power point (MPP) of the PVarray. Several configurations of single-phase PV power condi-tioning systems, employing various static converter topologies,can be found in technical literature [5]–[7].

This paper introduces the application of the current-multi-level (CML) technique [8] on PV systems, in addition to theproposition of a novel CML single-phase inverter topology.CML converters have the advantage of reducing the currentrating needs for the semiconductor devices, since the maincurrent is shared by a number of paralleled cells. This benefitis worthier for high power applications, although low powerCML systems could be employed using small-rated (and oftencheaper, as well as easily available) devices. Additionally,with intermediary levels (or steps) in the current waveform,a decrease of current slope in the circuit devicesis achieved, with a consequent reduction of conducted andradiated electromagnetic interference (EMI). The CML tech-nique has been applied to dc-to-dc converters, rectifiers andcurrent-source inverters [9]–[11]. A single-phase CML cur-rent-source inverter has been proposed some years ago, and isshown in Fig. 1 [10]. This topology employs two CML cells [8]and can synthesize an output current waveform with up to fivelevels—employing line-frequency switching [Fig. 2(a)]—or upto three levels—employing sinusoidal pulsewidth modulation(PWM) switching [Fig. 2(b)].

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BARBOSA et al.: BOOST CURRENT MULTILEVEL INVERTER 1117

Fig. 1. CML current–source inverter.

Fig. 2. CML current-source inverter output current waveform employing:(a) line-frequency switching and (b) sinusoidal PWM switching.

A new CML inverter topology, named “Boost CML Inverter”[12], whose electrical circuit is shown in Fig. 3, is presented inthis work. It has some advantages, when compared with the pre-viously referenced current-source CML inverter (Fig. 1), whichemploys eight self-commutated switches. Two balance induc-tors ( and ) are required there, in order to achieve inter-mediary current levels and the balanced current sharing amongthe semiconductor devices. On the other hand, the topologyproposed here needs only two self-commutated switches, sincethyristors (spontaneous blocking) could be used to implementthe switches and . Moreover, only one bal-ance inductor is necessary. Up to five-level can be synthesized inthe output current waveform with this topology, employing ei-ther low frequency or sinusoidal PWM switching. For the low-

Fig. 3. Boost CML Inverter.

Fig. 4. Application of the two-cell Boost CML Inverter on a PV system.

frequency switching case, there is a considerable reduction ofthe switching strategy and logic complexities [12].

II. TWO-CELL BOOST CML INVERTER

APPLIED TO PV SYSTEMS

The application of the Boost CML Inverter to a PV systemis shown in Fig. 4. This structure comprises a two-cell CMLdc-to-dc Boost converter [9], cascaded by a current-source in-verter. The modulation of the output current is performed bythe dc-to-dc converter. The switches of the current-source in-verter, operating in the line frequency, , are responsible onlyto set the direction the modulated current is injected into thegrid. Each switch of the inverter bridge has been represented asa series connection of an idealized switch and a diode, since itmust be an unidirectional current device. The current source, inthe input of the dc-to-dc converter, is composed by the PV arrayconnected to an inductive filter, the input inductor . Addition-ally, a capacitor ( ) is inserted between the PV array and theinput inductor, thus reducing the voltage and current ripple in thePV array. It is important to consider that the proposed topologycan also work without this capacitor. However, its utilizationprovides an optimization of the PV energy conversion system.A diode is placed between the input capacitor and the PV arrayin order to avoid a reverse energy flow. It is a setup found onvarious PV systems topologies [7].

The gate signals of switches and (dc-to-dc converterswitches) are generated by comparing a rectified sinusoidalwaveform (low frequency, ) with two 180 out of phasetriangular carriers (with frequency ). This strategy is able toperform the PWM [12]–[15], as depicted in Fig. 5. An invertedlogic on the gate signals can be noticed, since the current isinjected into the grid when either or are blocked. Theinverter bridge gate signals are also shown in this figure. Withthis switching strategy, the output current, before filtering,presents up to five levels and the harmonics appear as sidebands


Fig. 5. Theoretical representation of the sinusoidal PWM gating strategy (threeupper traces) including inverter bridge pulses (two bottom traces).

Fig. 6. Typical representation of the five-level sinusoidal PWM waveform andits harmonic spectrum.

around even multiples of the switching frequency. Fig. 6 showsthis waveform and its harmonic spectrum for an idealizedcase, where is the fundamental frequency of the outputcurrent, equals to the line frequency. The switching harmonicscan be practically eliminated by means of a simple and lightsecond-order LC filter. Thus, it is possible to suit the system tointernational standards, such as the IEEE Std. 929-200, whichrecommends, for the general case, that the total harmonicdistortion (THD) of the current injected by a PV system intothe utility grid shall be inferior to 5 % at rated inverter output.

Fig. 7. Cell 1 current modulation.

Additionally, the proposed switching strategy allows a bal-anced current sharing between the switches of the dc-to-dc con-verter, preserving an inherit characteristic of CML converters.

A. Mathematical Analysis

The main goal of the proposed topology is to process the PVpower and inject a sinusoidal current into the utility grid. Such alow-distorted current is obtained by filtering the five-level cur-rent waveform depicted in Fig. 6. Hence, a mathematical de-scription of the five-level waveform is of huge interest.

To accomplish the mathematical task, as mentioned in theprevious paragraph, one must first consider the circuit shownin Fig. 4. It can be observed, according to Kirchhoff’s cur-rents law, that the boost CML dc-to-dc converter output current,

—which is the inversion stage input current—is the sum ofthe diodes currents, and . In other words, the currentis composed by the sum of the current synthesized by each CMLcell of the dc-to-dc converter. The same can be stated for the in-verter output current, before filtering, . Thus, the analysis ofthis current will be done superimposing the contribution of eachCML cell [8] of the proposed topology.

Initially, consider the contribution of the CML cell that con-tains and . Here, it will be named “cell 1.” Under ordinarycircuit operation, the switching frequency, , is much greaterthan the line frequency, . Hence, it is possible to assume thatthe reference signal is constant during a switching time period,as shown in Fig. 7, where —the current waveform synthe-sized by cell 1—is also shown. The electrical angles are de-fined assuming that one switching period is equal to 2 rad, i.e.,

2 , with 2 .The idealized mathematical expression of the current synthe-

sized by cell 1 can be obtained by its Fourier series expansion,which, assuming ideal elements and no ripple in the inductorscurrents, leads to

(1)

where is the average current in the input inductor, is theorder of the th harmonic, and (see Fig. 7).


In practice, the reference (modulation) signal is not constant,as was supposed. It varies according to

(2)

Since , the amplitude modulation ratio, referredas in (1), can be replaced, without considerable errors, by

[12], [14]. In this case, is defined by (3),according to the upper plot of Fig. 5

(3)

Thus, (1) will be written as

(4)

which is valid to 0 1.The inverter output current, before filtering, , regarding

the switching strategy adopted to switches and, shown in Fig. 5, can be written, as function of the dc-to-dc

CML converter output current, , by

(5)

Still regarding only the contribution of cell 1, and combining(4) and (5), the inverter output current could be expressed as

(6)

which proves that the proposed switching strategy implementsa sinusoidal PWM for the boost CML inverter.

Since the triangular carrier employed in the generation of thegate pulse of the switch is 180 (i.e., rad) out of phase ofthe triangular carrier associated to , the contribution of cell 2(the CML cell that contains and ) could be written as

(7)

The effective inverter output current is given by the sum ofthe contribution of each CML cell. Adding (6) and (7), the oddswitching harmonics ( 1,3,5, ) are canceled, resulting in

(8)

Expression (8), which is also valid to 0 1, shows thatamplitude of the fundamental-frequency component of the in-verter output current varies linearly with . It is also possible

to verify that the switching harmonics appear as sidebands, cen-tered around 2 4 6 , and so on [12], [14]. By this way,although boost devices are switched at , the output currentlower harmonic is related to 2 . By analogy, this result can beextended to CML cells, employing triangular carriers offrequency with phase lag of 2 among them. In this case, theswitching harmonics will also appear as sidebands, but centeredaround (with 1,2,3, ). With a simple second-orderfilter it is possible to practically eliminate the switching har-monics, what justifies the use of this kind of modulation in theproposed topology.

From (8) it is possible to derive the active power injectedinto the grid. Let us assume that a filter with unitary gain atline frequency, which leads a phase shift in the fundamentalfrequency current, is connected in the output of the inverter.Moreover, consider that the line voltage can be expressed by

2 , where is the rms line voltage. There-fore, the active power effectively delivered to the utility grid,

, would be

(9)

Other important relationships can be obtained from the anal-ysis of the circuit operation, in a similar way to the approachdescribed above. A detailed derivation of them can be found in[12], and the most important design relationships are presentedhere.

The peak voltage across equals the peak of the line voltage,and the average value of the current through this switch is givenby (10). Due to the symmetric operation of the two switches,these considerations also apply to switch

(10)

The maximum reverse voltage across diodes and isalso the peak of the line voltage and their average current canbe calculated by

(11)

Regarding the switches and diodes of the inverter bridge, themaximum blocking voltage and average current can be assumedas the same defined for diodes and .

The input and balance inductors are defined by (12) and (13),respectively

(12)

(13)

where and are the acceptable current ripple (in%) in the input and balance inductors, respectively.

From (13), it is possible to observe that the inductance of thebalance inductor is dependent of the switching frequency. So,the inductance value can be reduced as the switching frequencyincreases, with a consequent inductor physical volume reducing.


Fig. 8. Simulation results: (a) five-level waveform, (b) mains voltage (25% scaled) and current injected into the grid, and (c) and (d) currents through activeswitches.

On the other hand, as stated by (12), the input inductor induc-tance value does not depend on the switching frequency. It isonly related to the line frequency. However, at higher currents,both inductance values could be considerably reduced.

B. Medium-Power Simulation Results

In order to check the main theoretical suppositions regardingthe new structure, as well as the sinusoidal PWM strategy em-ployed here, it would be interesting to verify the system be-havior and performance by means of digital simulation. Pspicetool is used to provide simulation results considering a 3600-WpPV array, which is inside the input power range of the mostresidential PV systems [2]. This arrangement is composed bythe model of thirty BP SX-120 PV modules, which has thesePspice modeling described in [12]. It has been considered aninsolation condition of 1000 W/m and the modules tempera-ture of 25 C. Regarding this kind of photovoltaic module phys-ical dimensions, in a real situation, this array would fill around30 m of a house roof. The input and balance inductors havebeen designed by (12) and (13) and were chosen as 60 mH and9.3 mH, respectively. Output filter elements were selected as

15 F 800 H and 2.2 . The other simu-lation parameters were: 127 V, 60 Hz, 3 kHz,

1000 F and 0.9. Diodes and active switcheswere modeled by means of conventional PSpice models.

Fig. 8 shows the most important simulation results. A practi-cally sinusoidal current, with a very small phase displacementin relation to the line voltage, is injected into the grid, as shownin Fig. 8(b). The total harmonic distortion of this current was4.79 %, with a phase displacement of 5.7 in respect to the linevoltage, resulting in a high power factor operation of the system(0.9939 in this case). Moreover, the simulation results complywith IEEE Std. 929-2000, regarding current harmonic distor-tion. Fig. 8(c) and (d) also show that the input current (which isclose to 40 A) is well distributed among semiconductor devices,which is an expected feature of the current multilevel concept.

It can be observed that the current synthesized at inverteroutput (before filtering) agrees with the theory: it is a five-levelwaveform—Fig. 8(a)—and its harmonic spectrum presents the

Fig. 9. Harmonic spectrum of the five-level current waveform.

switching harmonics around 6 kHz, i.e., twice the switching fre-quency—as depicted in Fig. 9.

These results provide strong evidences about the practicalfeasibility of the proposed system. Further proofs come fromexperimental results obtained by means of a small-scale systemprototype, which is described in Section II-C.

C. Small-Scale Prototype

A 360-Wp prototype concerning the two-cell boost CML in-verter has been developed in laboratory. Specification of themain components of the system is shown in Table I. It is im-portant to comment that the input and balance inductors, MOS-FETs and diodes are oversized due to the laboratory componentsavailability. The dc-to-dc converter switching frequency, , hasbeen chosen as 3 kHz in order to achieve low switching losses,while the switches of the inverter bridge are commutated at linefrequency, i.e., 60 Hz.

It is interesting to observe that, for higher power levels, theLC output filter should be redesigned in order to reduce theinductor physical volume and resistive losses. A filter like the


Fig. 10. Modulation and gating circuitry.

TABLE IPOWER CONDITIONER COMPONENTS

one employed in the simulation case study of Section II-B couldbe employed.

A complete schematic diagram regarding the modulation andgating circuitry is shown in Fig. 10. Switches and weredriven by means of IR2104 IC using its inverting output (LO),what is referenced to the logic circuit ground. On the otherhand, the inverter bridge switches ( and )were driven by means of a magnetic-coupled driver. The com-mutation of these switches occurs at line voltage zero-crossing,when the current synthesized by the dc-to-dc converter is null.So, it is not necessary to avoid a simultaneous blocking of theswitches of a same inverter leg, as required for conventionalcurrent-source inverters. This feature considerably simplifiesthe pulse logic. As can be noticed, the system operates inopen-loop, since no control strategy has been adopted at thistime. However, the laboratory prototype is still useful to providepractical concerns about the new converter and the employedPWM strategy. A closed-loop control system, e.g., to track thepoint of maximum power of the PV source, will be object offuture publications. A picture of the laboratory prototype ispresented in Fig. 11.

The most important waveforms measured in the prototype areshown in Figs. 12–16. These measurements have been acquiredin a variable insolation day, what can imply in a slight diver-gence among some waveforms, since they have not been stored

Fig. 11. Laboratory prototype picture (input and balance inductors are over-sized due to previous lab availability).

with rigorous simultaneity. However, it does not result in incon-sistence, and neither does it invalidate the main conclusions.

A balanced current distribution between CML boost activeswitches can be observed in Fig. 12. The current equilibriumregarding main inductive elements can be also evidenced bymeans of Fig. 13 (measurements have shown that experimentalinductor currents do not differ more than 3% from theoreticalones). As can be noticed from the upper trace of Fig. 13, thecurrent ripple of input inductor is higher than the balance in-ductor one. Due to a natural characteristic of the CML cell, thisripple is transferred to switch and diode (see Fig. 12).

Fig. 16 highlights the low displacement between the synthe-sized current—effectively injected into the grid—and the linevoltage. Actually, a lag of 3.9 has been registered between thefundamental output current and line voltage. A current THDequal to 4.62% around the rated inverter output has also beenachieved. It implies a high power factor operation (PF 0.9966).Moreover, the proposed system has been able to meet IEEE Std.929-2000 requirements, regarding current harmonic distortion.

An evaluation of output current THD, for different outputpower levels, is shown in Fig. 17. It is possible to observe a THD


Fig. 12. CML boost dc-to-dc converter switches and diodes currents (1 A/div;2 ms/div).

lower than 10% around one third of the nominal inverter rating,i.e., 120 W. A THD lower than 5% can be attained at nominalpower.

Fig. 18 depicts the measured efficiency of the structure forseveral points of operation. As shown, at maximum outputpower, the efficiency reached a mark close to 93.2%, whatagrees with theoretical calculations and is not so far fromconventional photovoltaic power processing systems. As statedbefore, negligible switching losses occur for this system, dueto the low switching frequency employed. It is important tonotice that more efficient transformerless PV converters—withefficiencies above 96%—have been reported in recent literature[16].

In the present case, the main causes of system losses are re-lated to parasitic elements of inductors, line-filter damping re-sistor and semiconductor conduction losses. In order to achieve

Fig. 13. Input and balance inductors currents (1 A/div; 5 ms/div).

Fig. 14. Five-level current waveform (inverter output current, before filtering):2 A/div; 5 ms/div.

a higher system efficiency, those sources of losses could be min-imized by means of filter and inductors design optimizationand better semiconductor devices selection. However, at higherpower levels, it is not expected a system efficiency greater than90%, since losses of inductors increase significantly. Ahigher efficiency (and even compact solution) is theoreticallypossible and could be achieved by using high temperature su-perconducting (HTS) coils [17]. Of course, economic issuesmay arise, since HTS inductors need additional cryo-refriger-ator systems.

III. CONCLUSION

This paper presented the application of the current multileveltechnique to grid-connected PV systems, which was made by


Fig. 15. Five-level waveform—zoomed view: 2 A/div; 2 ms/div.

Fig. 16. Line voltage (50 V/div; 5 ms/div) and current injected into the grid(2 A/div; 5 ms/div).

means of a novel CML single-phase inverter topology. Somemathematical expressions for this topology have been presentedin order to provide design guidelines for the circuit components.Experimental waveforms and measured parameters, obtainedfrom a small-scale lab prototype, have been used to validate theproposed theoretical concepts and the feasibility of the applica-tion of the CML technique on grid-connected PV systems.

The proposed system presented a good performance con-cerning efficiency and power quality. The latter is evidencedby the compliance with IEEE Std. 929-2000, regarding currentharmonic distortion. In addition to these features, a naturalshort-circuit protection and a balanced current sharing amongthe switches of the dc-to-dc converter has been also achieved,which is an inherit characteristic of a CML converter.

The results presented here constitute a very important step inthe study of the CML converter and its applications, because it

Fig. 17. Evaluation of output current THD.

Fig. 18. Measured system efficiency.

provides evidence of the robustness and reliability of the pro-posed system. The authors believe that such advantages may beof interest to PV system designers, although a reduced efficiencyin very high power levels has been predicted. This drawback ismainly related to the present technological limitations regardingpractical high-power inductors, which could be solved in thenear future by means of economic lossless inductors.

Future works include the development of a DSP-based max-imum power point tracking (MPPT) system and the applicationof the CML boost inverter to reactive power compensation andother energy source setups, such as fuel cell systems.

REFERENCES

[1] P. Fairley, “BP solar ditches thin-film photovoltaics,” IEEE Spectrum,vol. 40, no. 1, pp. 18–19, Jan. 2003.

[2] B. Kroposki and R. de Blasio, “Technologies for the new millenium:Photovoltaics as a distributed resource,” in Proc. IEEE Power Eng. Soc.Summer Meeting, 2000, pp. 1798–1801.

[3] Recommended Practices for Utility Interface of Photovoltaic Systems,IEEE Std. 929-2000, 2000.

[4] Static Inverters and Charge Controllers for Use in Photovoltaic PowerSystems, Std. UL Subject 1741, 2005.

[5] M. Calais, J. Myrzik, T. Spooner, and V. G. Agelides, “Inverters forsingle-phase grid connected photovoltaic systems—An overview,” inProc. IEEE 33rd Power Electron. Spec. Conf. (PESC’02), 2002, vol. 4,pp. 1995–2000.


[6] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “power inverter topologiesfor photovoltaic modules—A review,” in Proc. 37th IEEE Ind. Appl.Soc. Conf. (IAS’02), 2002, pp. 782–788.

[7] M. C. B. Rodrigues, E. C. Teixeira, and H. A. C. Braga, “Uma visãotopológica sobre sistemas fotovoltaicos monofásicos conectados á redede energia elétrica,” in Proc. 5th Latin-Amer. Congress: Eletr. Gen.Transm. (5th CLAGTEE), Nov. 2003, [CD ROM].

[8] H. A. C. Braga and I. Barbi, “A new technique for parallel connectionof commutation cells—Analysis, design and experimentation,” in Proc.IEEE PESC’95, 1995, pp. 81–86.

[9] H. A. C. Braga and I. Barbi, “Current multilevel DC-DC converters,”in Proc. III Brazilian Power Electron. Conf. (COBEP’95), São Paulo,Brazil, 1995, pp. 417–422.

[10] H. A. C. Braga, F. M. Antunes, and I. Barbi, “Application of a gener-alized current multilevel cell to current-source inverters,” IEEE Trans.Ind. Electron., vol. 46, no. 1, pp. 31–38, Feb. 1999.

[11] E. C. Teixeira and H. A. C. Braga, “A high power factor single-phaserectifier based on a current multilevel buck converter,” in Proc. 6thBrazilian Power Electron. Conf. (COBEP’01), Florianópolis, Brazil,Nov. 2001, pp. 180–185.

[12] M. C. B. Rodrigues, “Inversor Boost Multinível em Corrente e suaAplicação no Processamento de Energia em Sistemas FotovoltaicosMonofásicos Conectados à Rede Elétrica,” M.E.E. thesis, FederalUniv. Juiz de Fora (UFJF), Juiz de Fora, MG, Brazil, 2004.

[13] P. G. Barbosa, “Compensador Série Síncrono Estático Baseado emConversores VSI Multipulso,” D.Sc. dissertation, Federal Univ. Rio deJaneiro (COPPE-UFRJ), Rio de Janeiro, Brazil, 2000.

[14] N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics:Converters, Applications, and Design, 2nd ed. New York: Wiley,1995.

[15] R. Redl and L. Balogh, “Power-factor correction with interleavedboost converters in continuous-inductor-current mode,” in Proc. IEEEAPEC’93, 1993, pp. 168–174.

[16] K. Ogura, T. Nishida, E. Hiraki, M. Nakaoka, and S. Nagai,“Time-sharing boost chopper cascaded dual mode single-phasesinewave inverter for solar photovoltaic power generation system,”in Proc. 35th IEEE Power Electron. Spec. Conf. (PESC’04), Aachen,Germany, 2004, pp. 4763–4767.

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Pedro Gomes Barbosa (S’94–M’00) was born inJuiz de Fora, Brazil, in 1962. He received the B.S.degree in electrical engineering from the FederalUniversity of Juiz de Fora (UFJF), Juiz de Fora,Brazil, in 1986, and the M.Sc. and the D.Sc. degreesin electrical engineering from Coordenacao deProgramas de Pos-Graduacao (COPPE), FederalUniversity of Rio de Janeiro, Rio de Janeiro, Brazil,in 1994 and 2000, respectively.

From 1987 to 1992, he was a Commissioning En-gineer with the Brazilian Navy. Since 1999, he has

been teaching power electronics and electric machine and drives at the FederalUFJF. His main research interests are multilevel and multipulse converters, re-

newable energy sources, active power filters, and static power compensators forFACTS applications.

Henrique Antonio Carvalho Braga (S’83–M’88–SM’01) was born in Aimores, Brazil, in 1959. He re-ceived the B.S. degree in electrical engineering fromthe Universidade Federal de Juiz de Fora (UFJF), Juizde Fora, Brazil, in 1982, the M.Sc. degree in elec-trical engineering from Coordenacao de Programasde Pos-Graduacao (COPPE), Federal University ofRio de Janeiro, Rio de Janeiro, Brazil, in 1988, andthe Dr.Eng. degree from the Universidade Federal deSanta Catarina, Florianopolis, Brazil, in 1996.

Since 1985, he has been teaching basic electronicsand power electronics at UFJF in undergraduate and graduate levels (Mastersprogram was installed in 1999). He has also served as the head of the ElectricalCircuits Department, Electrical Engineering Undergraduate Program Coordi-nator, and Electrical Engineering Master Program Coordinator, UFJF. He hasbeen a Reviewer of technical papers for several conferences and scientific jour-nals, and has authored or coauthored of more than 50 publications, during thepast 10 years. From 2005–2006, he will be on leave for a post-doctoral stage atUniversidad de Oviedo, Gijon, Spain. His research interests are mainly relatedto the power electronics field, including multilevel converters, Pspice modelingof power electronics circuits and devices, active power filters, high power factorrectifiers, photovoltaic conversion systems, energy-efficient lighting.

Márcio do Carmo Barbosa Rodrigues (S’98) wasborn in Cataguases, Brazil, in 1978. He received theB.S. and M.S. degrees in electrical engineering fromthe Federal University of Juiz de Fora (UFJF), Juizde Fora, Brazil, in 2002 and 2004, respectively.

In 2005, he joined the Department of ElectricalEngineering, UFJF, where he taught analog anddigital electronics for undergraduate courses. Heis now with CEFET-MG, Leopoldina, Brazil. Hismain research interests includes renewable energysystems, power converter control, active power

filters, and power quality.

Estêvão Coelho Teixeira (S’01–M’03) was born inSão Paulo, Brazil, in 1974. He received the B.S. andM.S. degrees in electrical engineering from the Fed-eral University of Juiz de Fora (UFJF), Juiz de Fora,Brazil, in 1998 and 2002, respectively, and is cur-rently pursuing the Ph.D. degree in electrical engi-neering at Coordenacao de Programas de Pos-Gradu-acao (COPPE), Federal University of Rio de Janeiro,Rio de Janeiro, Brazil.

From 2003 to 2004, he lectured on digital andanalog electronics at UFJF. He is now with is

with COPPE-UFRJ, Rio de Janeiro, Brazil. His research interests are powerconverters, microprocessors, and field programmable gate arrays.

boost current multilevel inverter and its application

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