boost converter

Boost Converter 1

Senior Design Project

The Boost Converter

By

Matthew Johnston

Jessica Morales

Daniel Uriu

Boost Converter 2

I. Abstract

For the senior design project, we decided to focus on a project that mainly dealt with

power, and decided to build a boost converter. The main idea of the boost converter is to input a

low voltage and output a high voltage. Specific parameters were given to us in order to be able

choose what components are needed to make the boost converter work properly. In addition, we

designed and built our own inductor according to the given parameters, and designed the circuit

on a PC Board.

First, the schematic was given in order to research and better understand the function of

every component. As a group, we learned the main concept of the board. After we thoroughly

comprehended the circuit, we start to assign values to the resistors, capacitors, and the inductor.

We then ran a simulation of the circuit in PSpice to ensure that we have chosen the correct values

for each component, noting the current of the inductor, input voltage of the pulse switch, and the

output voltage. After acquiring the results needed, we continued to design the circuit board on a

PCB. To design the PCB, the program ExpressPCB, was utilized. Our first design attempt was

not our best result, reason being that we did not have much knowledge on designing such boards.

We moved some components and changed some wiring to improve its performance, before

sending it in to be processed. While it was being made we further expanded our knowledge on

the circuit and how to build an inductor.

After receiving the board we began to assemble the circuit. After some debugging of the

board, tests were performed to acquire enough data to make some valuable statements about our

circuit board.

Testing began by adding an input voltage of 20V. We first ran tests in the Continuous

Boost Converter 3

Conduction Mode (CCM) with 20V. CCM is obtained by having the output current being larger

than the current ripple of the inductor. After acquiring sufficient data and waveforms, we

realized that our circuit was giving us the desired results. While in CCM, we also ran tests with

an input voltage of 40. The efficiency for our circuit was calculated giving us 96%, proving that

our circuit was performing to the specifications. Next, we ran tests in the Discontinuous

Conduction Mode (DCM). This is done by having a much larger load resistance such that the

output current is less than the current ripple of the inductor. We conducted the same tests as in

CCM to be able to compare the both modes. We were able to obtain our high output voltage of

70 in both modes by adjusting our load resistance and potentiometer.

II. Introduction

For our project we are to make a boost converter, also known as a step-up converter. We

are to design our own circuit layout on ExpressPCB and design our own inductor. Our boost

converter is to have an input voltage of 20V to 40V and an output of 70V. We are to increase or

decrease the load resistance in order to achieve a continuous conduction mode at a 20 Watt

output. The switching frequency of the switch should be 200 kHz and the output voltage ripple

should be less than 0.2%. The major components that we are to use for the circuit are the

IRF510 for the MOSFET, the MUR415 for the diode, and an output capacitor of 100 uF. For the

PWM controller we are to use the very famous SG3524 and the IR4427 for the MOSFET driver.

Together with all our components and our own made circuit board we were able to achieve our

goal of an output of 70V.

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III. Circuit Analysis

i. Continuous Conduction Mode

The boost converter, when operating in continuous conduction mode never allows the

current through the inductor to fall to zero. The converter operates in two different states within

the continuous mode because of the switch. The inductor current fluctuates during switching

having a maximum and minimum value, but will never reach zero. When operating in continuous

mode the two positions of the switch affect the way the circuit is analyzed as shown below.

In this section, let us call the on state having the switch in position 1 and the off state being

position 2.

When the switch is at position 1, the circuit consists of only the source voltage and the

inductor. The switch creates a ground short circuit not allowing any other part of the circuit to be

altered by the voltage source, creating a second circuit with the capacitor and load resistor in

parallel. The inductor voltage and capacitor current are then defined by:

gL Vv =

RviC −=

When the switch is in position 2, the circuit changes, breaking the short circuit that was

created in the last state. This allows the source voltage to travel through the inductor L, the

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diode, the capacitor C, and the load resistance R. The inductor voltage and capacitor current

equations are then:

vVv gL −=

Rvii LC −=

These equations from the on and off state of the converter are extremely valuable to the analysis

of the circuit since they lay the foundation of all other analysis that will be performed. When

using the small ripple approximation, in which only the DC component of the signal is used, an

average value is used to do the analysis. With the previous equations for inductor voltage and

capacitor current, the out put voltage v = V and iL = I. Using the equations from position 1 and 2,

one can sketch the waveforms of what the inductor voltage and capacitor current will look like.

The switch positions are defined over the time period DTS and D’TS, with D being the duty cycle

and Ts being the switching period.

By the waveforms, it can be inferred that the output voltage is higher than the input, hence the

name boost converter. Therefore the volt seconds over one switching period is defined as being

the integral of the inductor voltage with respect to time over the interval of zero to Ts. This

equates to:

Boost Converter 6

SgSg

Ts

L TDVVDTVdttv ')()()(0

−+=∫

If applying volt second balance, setting the equation equal to zero will allow solving for the

output voltage with respect to the duty cycle D.

DV

V g

−=

1

This same procedure can be applied to the capacitor current by taking the integral, setting the

answer equal to zero and collecting terms, solving for the inductor current I.

SS

Ts

C TDRVIDT

RVdtti ')()()(

0

−+−

=∫

RDV

I)1( −

=

Next we shall look at the inductor current ripple, or delta iL. Since the waveform of the inductor

voltage has already been done, and the current is defined as

Ltv

dtdi LL )(

=

Using the above result for vL while the switch is in position 1 makes

LV

Ltv

dtdi gLL ==

)( .

Similarly, when the switch is in position 2, the same steps can be applied resulting in

LVV

Ltv

dtdi gLL −

==)(

Meaning that delta is LiΔ

Sg

L DTL

Vi

2=Δ

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These two solutions for the change in the inductor current can be drawn graphically as a triangle

wave. This is plausible since the current is the integral of the voltage, which was a square wave.

The inductor current change waveform is shown below.

The same said above can be said for the change in capacitor voltage, dvC. The steps are defined

below.

Cti

dtdv cC )(

=

Position 1: RCV

Cti

dtdv CC −

==)(

Position 2: RCV

CI

Cti

dtdv CC −==

)(

SC DTRC

Vv

2=Δ

ii. Discontinuous Conduction Mode

The boost converter also operates in a second mode called the discontinuous conduction

mode. This happens when there is a large enough switching ripple for either the capacitor voltage

or the inductor current to cause the polarity of the switch current or the switch voltage to change.

In the discontinuous conduction mode, the converter properties change as do the conditions for

Boost Converter 8

operation. These conditions can be found by the finding the ripple for the inductor current or

capacitor voltage and the dc components that cause the switch position to change polarity.

Based on the conditions of operation of the boost converter in continuous conduction

mode, we found that the inductor current is greater than the current ripple. This then means that

the inductor current in the discontinuous mode is less than the current ripple.

LiI Δ< For DCM

Now we will define the parameter K as a dimensionless parameter that measures the tendency

for a converter to operate in the discontinuous conduction mode. A large value of K leads to a

converter operating in the continuous conduction mode while a small value of K would be the

discontinuous conduction mode. The boundary between the two modes is defined as Kcrit.

SRTLK 2

= and 2'DDKcrit =

Analysis can now be done to find the conversion ratio of V/Vg. There are three intervals in which

the circuit operates when in discontinuous conduction mode. There is the subinterval where

0 <t <D1TS when the switch is turned off and the diode is off creating this circuit.

The analysis on this circuit leaves you with

gL Vtv =)(

RtvtiC)()( −=

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Then there is the second subinterval where D1TS < t < (D1+D2)TS and the diode is conducting

with the switch turned off. This leaves you with the circuit shown below.

The analysis leaves you with

)()( tvVtv gL −=

RtvtitiC)()()( −=

During the third subinterval where (D1+D2)TS <t> TS the diode and switch are both in the off

state. This leaves you with the circuit shown below.

The network analysis leaves you with these equations.

0)( =tvL

RtvtiC)()( −=

These equations from the three different subintervals leave you with this waveform for the

voltage.

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Using volt second balance to find the average value of the inductor voltage and setting it equal to

zero you obtain

0)0()( 321 =+−+ DVVDVD gg

Solving for the output voltage V leaves

gVD

DDV

2

21 +=

This leaves you with two unknowns, V and D2. This requires us to use another equation to

eliminate the duty cycle to obtain output voltage V. To do this we must also use the capacitor

charge balance shown below. To solve for the charge balance, set the diode current equal to the

current through the capacitor plus the current through the resistor. In steady state, the dc

component of the capacitor current is zero. This is shown below.

Rtvtiti CD)()()( +=

RVtiD =)(

From this information, we have found that the inductor current peaks during the first subinterval,

D1Ts.

Sg

pk TDL

Vi 1=

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Then in the second interval, the diode begins to conduct and the inductor current drops to zero

and will remain there for the third subinterval. This leads us to the equation of the dc diode

current iD(t).

221 Dii pkD >=<

And with some basic substitution of the last few equations leaves the dc load current.

LTDDV

RV Sg

221=

Now we have the second equation to find the two unknowns described earlier, V and D2. Solving

for the two unknowns leaves a quadratic equation, which when solving we only use the positive

solution since it is known that a positive output voltage should be given.

2

4112

1

KD

VV

g

++= where K=2L/RTs

iii. Pulse Width Modulator

The purpose of the pulse width modulator (PWM) is to produce a square pulse wave and to be

able to control the pulse width. The way it accomplishes this is by taking in a reference voltage

and comparing it to a saw tooth waveform. When the saw tooth is higher than the reference

voltage the PWM outputs a square wave in the on position. When the reference voltage is higher

than the saw tooth then the PWM outputs a square wave in the off position. Since the saw tooth

waveform continually varies this allows the PWM to output a continuous switching square pulse

wave. As the reference voltage from the main circuit raises then the pulse width shortens. This

translates into shorter MOSFET on times, which meaning that the inductor has a shorter period

Boost Converter 12

to store current and a longer time to discharge. This also means that the capacitors retain more

of their energy as they discharge when the MOSFET is on. This allows the output voltage to

remain higher. As the output voltage grows the two resistors (unit 8 and 9, Figure 1) act as a

voltage divider and supply a feedback reference voltage to the PWM. Figure 1 shows the main

circuit and the reference voltage being supplied to the PWM.

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Figure A main circuit

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Figure B internal PWM

Figure B shows the internal layout of the PWM. The error amplifier takes in both the feedback

voltage from the main circuit and the reference voltage from the variable resistor. When the

feedback voltage from the main circuit is higher than the reference voltage then the error

operator outputs a voltage of 0V. When the reference voltage from the variable resistor is

higher, the error amplifier outputs the reference voltage. The output of the error amplifier is then

sent to the comparator where it is compared with the saw tooth waveform. The comparator then

outputs a square pulse wave that is fed to two nor gates that are controlled by the oscillator. This

signal is then sent to the driver where it amplifies the signal and sends it to the gate terminal of

the MOSFET.

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iv. PSPICE Simulation

According to our calculations and to our design we are to input a voltage from 20V to 40V and

be able to obtain an output of about 70V. We wanted to make sure that our chosen values for our

components were correct and made sure of it by running a simulation on Pspice. We made the

value of our inductor to be 200 uH, the load resistance to be 250 ohms, and the input to be 30V.

This is what our schematic on PSpice looked like after giving values to every component. We

added an extra resistor after the inductor, with a value of 1 mOhm, to regulate how much current

was flowing through the inductor. After setting our values and set our simulation parameters we

ran it.

Boost Converter 16

This is a waveform of our output voltage, which is close to 70V. This proves that our theoretical

calculations are correct and if our circuit is correct our output voltage will be very close to 70V.

Boost Converter 17

IV. Design

i. Stress Analysis

Specs: Vgmin Vgmax Vo Power fs dvo diL

20V 40V 70V 20W 200kHz .1% Vo 10% IL

.07V .05A IL(max)= (P/Vgmin)= 1A Io= (P/Vo)= .2857A Duty Ratio: 1/1-D=Vo/Vg Dmin= 1-Vgmax/Vo Dmax= 1-Vgmin/Vo 0.4286 0.714 SWITCH:

Vsmax = Vo +dvo= Ismax= IL(max) + diL= Isrms = IL(max) * sqrt(Dmax) =

70.07V 1.05A .8452 A DIODE:

Vdmax = -(Vo + dVo)= Idmax = IL(max) + diL= Idrms= P/ sqrt(VoVgmin)=

-70.07V 1.05A .5345A INDUCTOR: ILmax= IL(max) + diL= L >= [Vg(Vo-Vg)]/ [2*diL*Vo*fs] |worst = 1.05A Vo/ [8*diL*fs]= .875mH diL= Vo/ [8*L*fs] VLmax= max(Vgmax, Vo- Vgmin)= (40V, 50V) 50V CAPACITOR:

Vcmax= Vo + dvo= dvc= dvo= P*Dmax/[2*Vo*C*fs]=

70.07V .07V Icmax= max(Io, IL(max) - Io)= (.2857, .7143) icrms= Io*sqrt(Vo/Vgmin -1)= 0.7143 .4518A

C>= (Io*D*Ts)/(2*dvo) |worst = 7.289 uF

(P*Dmax)/ (2*Vo*dvo*fs)

Boost Converter 18

ii. Conduction Loss

Conduction loss is a power loss that occurs when current is fed through resistive elements. The

sources of the highest conduction loss for our boost converter are the inductor, diode, and

MOSFET.

The inductor has conduction loss as it is not an ideal inductor. The wiring that we used to make

the inductor as a resistance, which attributes to the inductor conduction loss. This can be

modeled as a resistor in series with an ideal inductor of inductance L. This can be seen in figure

C.

Figure C)

Rl

1 2L

To calculate the conduction loss of the inductor both stages of the circuit must be taken into

account. When the MOSFET is on the diode is in reverse bias and acts as a cut wire. This

means the voltage across the inductor is equal to the following equation.

Equation 1 Lgl IRVv −=

In this stage, the current through the capacitor can also be easily calculated, as it is just the

negative of the current flowing through the load resistance. This is shown by the following

equation.

Boost Converter 19

Equation 2 RViC −=

When the MOSFET is in the off position the current is redirected through the diode as the

MOSFET now acts as a cut wire. This means that the voltage across the inductor changes to the

following equation.

Equation 3 VIRVv LgL −−=

In this stage, the current through the capacitor will also change and is given by the following

equation.

Equation 4 RVIiC −=

Now solving for the average value of the inductor by using equation 5 and setting it to zero we

are left with equation 6.

Equation 5 ∫ −−+−=>=<Ts

LggLL VIRVDIRVDdtvT

v0

)(')(1

Equation 6 VDIRV Lg '0 −−=

Boost Converter 20

Next, we solve the average value of the current through the capacitor by using equation 7. When

we set this to zero we are left with equation 8.

Equation 7 ⎟⎠⎞

⎜⎝⎛ −+⎟

⎠⎞

⎜⎝⎛−>=<

RVID

RVDiC '

Equation 8 RVID −= '0

Equation 9 ⎟⎠⎞

⎜⎝⎛ +

=

RDRDV

VLg

2'1

1'

1

By combining equations 6 and 8, we are able to solve for the actual gain of the circuit when

taking the inductor conduction loss into account. Equation 9 shows the gain of the system in

terms of the duty ratio, load, and inductor resistance.

The conduction loss due to the diode can be found through the following equation.

Equation 10 ∫ −⋅⋅⋅=T

ffdLpkgfd dtDVtIT

P0

. )1()sin(1 ω

The conduction loss due to the MOSFET can be found through the following equation.

Equation 11 ( )∫ ⋅⋅⋅=T

onLpkgmosfet DdtRtIT

P0

2. )sin(1 ω

iii. Switching Loss

Boost Converter 21

Within the boost converter, there is a fast switching device called a MOSFET. MOSFET

is an acronym that stands for metal oxide semiconductor field effect transistor. A pulse at the

gate terminal of the transistor drives a MOSFET working as a switch. This then determines

whether or not the drain and source terminals to connect. In the boost converter, it is the switch

that is crucial to the output voltage being at the desired value. However, there is power that is

lost in the switching. The turn on and turn off transitions require very minuscule amounts of time

usually in the micro or nanoseconds. Even though the switching times are short, an average

power loss results.

During the switching transient, there are periods where the diode is on and the switch is

off, and periods where the switch is on and the diode is off. Therefore, by circuit analysis, during

the switching transient, these equations are defined.

DSL iii +=

DSO VVV −=

Therefore, by definition, power is defined as the product of the voltage and the current, which

can be used to solve for the power losses across the MOSFET. A waveform of the power is

shown below.

Boost Converter 22

The energy lost is the area under the triangle waveform. When the waveform rises, it will be

defined as the power when the switch is on. The energy lost in the off state, Woff, and the energy

lost during the on state, Won, is the area under the curve. These equations are defined as such.

)(21

12 ttIVW LOoff −=

rorLOon QVtIVW +=

Now that the energy loss during a full switching period is known as (Woff + Won), then the

resulting power loss can be found.

∫=

sTransitionSwitching

AS

SW dttpT

P )(1 Where pA is the instantaneous power.

Therefore it can be concluded that

SonoffSW fWWP )( +=

However, during the switching times, reactive elements such as the capacitor and the inductor

can add to the energy lost. For instance, when the switch turns on, the capacitors in parallel with

the switch are shorted and lose the energy stored in them. This is the opposite for the inductor as

when the switch turns off and when in series with the switch, the stored energy is lost. The stored

energy is defined for the capacitor and inductor below.

∑= 2

21

iiC VCW

∑= 2

21

iiC VCW

For the switching power loss including the parasitic losses by the inductor and the capacitor

results in

SLConoffSW fWWWWP )( +++=

Boost Converter 23

iv. Inductor Design

Within the boost converter is a very crucial piece called an inductor, which opposes

change in current. An inductor is made typically by wound copper wire or coiling some other

conductive material around a core, which is usually air or a permeable material. An inductor

follows the basic rule shown below.

dtdiLtv =)(

Where v is the voltage over the inductor, L is the value of the inductor in Henrys, and di/dt is the

change in current over time in the inductor.

In the boost converter we are to create, we will need a 200 uH inductor to supply the right

current to the circuit. To do this we will use the air gap method in designing this specific

inductor. We used the core Magnetics OP-42213 as the mount and core for the inductor. As seen

from the data sheets attached at the end of this document we find that the core area product is

0.639 cm2. To do this area gap method, we must know the DC current, the relative ripple, and the

current density J. Some terms for a typical inductor are Ac, the cross sectional area of the core,

lc, the mean length of the core, and W, the window area inside the core.

Using some electromagnetic theory involving flux, current density, magnetic field

intensity, electric field and magnetic flux density, you are able to derive the following equations.

LINBAC ==λ ,

which simplifies to

NBLIAc = ,

fully utilizing the flux capability. Now, utilizing the window area we are left with

Boost Converter 24

JNIkW = .

Using the area product equation

AcWAp =

We are able to substitute our previous results leaving the equation

BJkLIAp

2

= where k=0.7

Now since we know that the input voltage will be between 20 V and 40 V, and the input and

output power being 20 W as described in our manual, we know that the current I will be between

0.5 A and 1 A, as defined by power equaling the product of the voltage and current. The first step

called core selection, and since we know a 200 μH inductor is needed we use the equation above

to find the area product. After we find the area product, we then figure out the amount of turns

that will be required to make the inductor. This is done with the equation shown below.

AclL

No

g

μ)(

=

Now we will check that the area of the wire we are calculating for is greater than or equal to the

calculations we want. the wire size we are using in the inductor that will be used in the circuit.

The area of the wire should be greater than the current divided by the current density.

JIAw >

Since the wire size is smaller than the one we are using, then it will perform the way it is

supposed to. Another constraint on the inductor wire is that the radius of the wire must be

smaller than the skin depth due to skin effect.

So fr

πμρδ =<

Boost Converter 25

Now we must check whether it will fit within the window area of the inductor mold. This is done

by multiplying the number of turns by the area of the wire.

Wn ANW *>

Lastly, the loss must be calculated. This can be calculated using the following formula.

2)( IAtNPPW

cu =

Where N is the number of turns, t is the mean length per turn data, p is the density of the wire,

and I is the current.

Taking the parameters assigned to us, we found that we would need a 200 uH inductor

that required 22 turns of wire.

V. Layout

We were to design our own circuit layout in ExpressPCB. We did not have any experience in

designing circuit layouts so we had to learn to find certain components and make libraries for

components that were not yet made in ExpressPCB. After learning how to make the components

and to wire them together we started to look up the components and the data sheets. We used the

data sheets to make sure we had the right parameters for the components.

After we finished our first attempt of our layout, we sent it into our mentor to make sure

we were on the right track. After our mentor looked over it, we noticed that we had a couple

mistakes that we had to fix. A couple of our mistakes were due to overlapped wiring and the

placement of components. We then fixed some of the mistakes and designed our second layout.

In addition, we fixed the diameter of the wiring to support a large amount of current running

from and to each component. The placement of the components was fixed where it would help

Boost Converter 26

reduce the noise between the components. After fixing the mistakes, we looked over our layout

one more time and sent it in to ExpressPCB to be manufactured. ExpressPCB had many

purchasing options; however, we only needed one circuit board and had to choose the option of

ordering two circuit boards for $100.

While we were waiting for our circuit boards to be delivered, the rest of the components

were purchased from Professor Smedley for $20. After receiving the components and board, we

began soldering and assembling the circuit. During this process, we found that there were still

some errors in our circuit. When designing our layout we did not take into account how big the

inductor would be for the reason that we were to make our own inductor. We also did not

consider how large the heat sink would be for the MOSFET. Another design mistake that we

made was that the terminals for the main diode, the MUR415, were larger than expected and did

not fit in the contact holes on the board. We had to modify our board by drilling holes and

making new connections where needed. One of the variable resistors that we used to make the

potentiometer was the wrong one. We used a longer variable resistor and the component given

to much shorter and the terminals did not match to the contact holes.

We soldered all the necessary pieces into their selected region and made the couple

adjustments that needed to be made. However, since we had some pieces that would not fit on

the board and had to buy a small board with contact holes from Radio Shack for $1.50. Making

sure all the connections and wires were correct decreased the amount of noise we had in our

design.

Boost Converter 27

First Design Attempt

Final Design

Boost Converter 28

DATA

Figure_1)

Figure 1 is the saw tooth waveform that is supplied to the Pulse Width Modulator by pin 7 that

passes through the timing capacitor. The frequency is 168.6 kHz which is a little below the

desired 200 kHz. The waveform has a peak-to-peak value of 3.19V and ranges from a low of

0.715V to maximum of 3.905V. This signal is then compared with the reference voltage that

consists of the feedback voltage from the main circuit going into pin 1 and the constant voltage

being fed into pin 2.

Boost Converter 29

Figure_2)

Figure 2 is the result of the PWM signal passing through the driver. This can be seen as the

maximum voltage is around the Vcc voltage of 12V. This square pulse wave is fed to the gate of

the MOSFET which controls its switching. Since the wave goes from 0V to 11.6V this switches

the MOSFET on and off.

Boost Converter 30

Vin = 20V

Figure_3)

Figure 3 is the output voltage waveform. This waveform was taken over a load resistance of 245

Ohm. The output voltage around 68V which is a little off from our desired value of 70V. We

were unable to reach the desired voltage because as we were adjusting the variable resister the

current would get too high and cause the Vin voltage supply to go into overload as it has a safety

limit of 1A. The highest voltage that we could attain without the voltage supply being at the

brink of overload was 68V. As it is, for an output voltage of 68V the current was 1.019A. Aside

from the noise, the current ripple is indeed to a minimum, which is consistent with the design

specifications.

Boost Converter 31

Figure_4)

Figure 4 is the waveform of the voltage across the drain to source of the MOSFET. The upper

region of the waveform was outside of the range of the oscilloscope and therefore was unable to

be recorded.

Boost Converter 32

Figure_5)

Figure 5 represents the current flowing through the inductor. This waveform was taken by

placing a 1Ohm resister in series with the inductor and taking the voltage across it. The two

different stages of the current through the inductor can be seen by this waveform. When the

slope is positive the current in the inductor is building as the MOSFET is in the on position.

When the slope is negative the inductor is discharging as it is transferring its stored up current to

the load terminal of the circuit as the MOSFET is in the off position. This graph is for when the

circuit is in continuous conduction mode as the current is well above ground. The average

current is 1.0148A. The graphs for discontinuous mode will be presented later.

Boost Converter 33

Figure_6)

Figure 6 is one of the efficiency tests. To do the different test for efficiency we set the voltage at

its desired value and kept it constant. We then calculated the needed load resistance for our

constant output voltage and desired output power. For this graph there was an input voltage of

20V, load resistance of 937Ohm, and an output voltage of 68.43V. This resulted in a 5W output

power with a 94.25% efficiency rate.

Boost Converter 34

Figure_7)




20V, load resistance of 468Ohm, and an output voltage of 68.43V. This resulted in a 10W

output power with a 93.21% efficiency rate.

Boost Converter 35

Figure_8)





output power with a 93.55% efficiency rate.

Boost Converter 36

Figure_9)





output power with a 92.33% efficiency rate. The reason why we found such a bad efficiency rate

was because when we did the calculations to find the necessary load resistance we found a load

resistance of 225Ohm. However, when we tried to implement this the circuit could not take it, as

there was too much current needed to output that voltage. So to keep the output voltage constant

we decided to raise the load resistance. Therefore, our final calculated power is not quite the

desired 20 Watts which results in the smaller value for efficiency.

Boost Converter 37

Figure_10

Power vs Efficiency20V Input

0.92

0.925

0.93

0.935

0.94

0.945

0 5 10 15 20 25

Power (W)

Effic

ienc

y

Figure 10 is the efficiency versus power graph for an input of 20 Volts. Again, the reason for the efficiency being so low for an output of 20W is because we could not run the circuit at the reduced load resistance. The efficiency at 5W is higher than normal due to a calculation error on our part.

Boost Converter 38

Vin = 40V

Figure_11)

Figure 11 is the voltage waveform for load resistance of 245Ohm and input voltage of 40V. It is

similar to that of the output waveform for input voltage of 20V. The main difference between

the two is duty cycle. Since there was not a need for such a high current level in the circuit the

duty was able to be drastically smaller. From the graph it can seen that the duty cycle is less than

half the total period length.

Boost Converter 39

Figure_12)

Figure 12 is the waveform of the voltage across the MOSFET from drain to source with an input

voltage of 40V. Again, the extremes of the graph are outside of the range of the oscilloscope.

Boost Converter 40

Figure_13)

Figure 13 is the voltage waveform across a 1Ohm resistor that is placed in series with the

inductor with an input voltage of 40V. This represents the current that is flowing through the

inductor during the different stages. Again we see the current increasing when the MOSFET is

on and decreasing when the MOSFET is off. The main difference between this graph and the

one for the input voltage of 20V is again that the duty ratio is a lot shorter. This results in slopes

that are more equal in magnitude. This also shows how the inductor does not need to store as

much current as there is a greater voltage across it. This graph also shows that the average value

for the current is half of the amount for an input of 20V.

Boost Converter 41

Figure_14)

Figure 14 is one of the efficiency tests. To do the different tests for efficiency we set the voltage

at its desired value and kept it constant. We then calculated the needed load resistance for our

constant output voltage and desired output power. For this graph, there was an input voltage of

40V, load resistance of 983Ohm, and an output voltage of 70.03V. This resulted in a 5W output

power and an efficiency of 93.23%.

Boost Converter 42

Figure_15)





output power and an efficiency of 93.93%.

Boost Converter 43

Figure_16)





output power and an efficiency of 95.13%

Boost Converter 44

Figure_17)





output power and an efficiency of 95.93%.

Boost Converter 45

Figure_18)

Power vs Efficiency40V Input

0.93

0.935

0.94

0.945

0.95

0.955

0.96

0.965

0 5 10 15 20 25

Power (W)

Effic

ienc

y

Figure 18 is the efficiency versus output power graph for an input of 40V. This graph is closer to

the ideal graph where there is a linear correlation between power and efficiency. The input of

40V made it easier to get ideal readings as there was not as much current flowing through the

circuit, which means that there was less loss across the various components such as the

MOSFET.

Boost Converter 46

Discontinuous Mode

Figure_19)

Figure 19 shows the circuit in discontinuous mode. Discontinuous mode is characterized by

different conditions. One condition is that the current is less than then current ripple. Another

condition is that K<Kcritical. We calculated the value of K and did confirm that it was less than

Kcritical. K had a value of 0.0373 while Kcritical was 0.114. The graph shows that the circuit is

indeed in discontinuous mode as the current falls below ground. This means that the inductor is

allowed to fully discharge. We attained this by increasing the load resistance until the current

fell below ground. For this graph the load was 2kOhm.

Boost Converter 47

Improvement

Our project had several minor flaws that can easily be corrected in another attempt. First,

we would design the board with more caution taking the data sheets and utilizing them more

efficiently. This would have eliminated a few of the problems with the design on the board. Also,

since we now know the MOSFET requires a large heat sync to allow a high current rating, we

would make additional room on the board, or design the board such that the terminals would line

up on the opposite side of the board, since both sides of the board can be used.

VI. Budget

As we were designing the layout on ExpressPCB we researched some companies that we

could use to send in our layout to be manufactured. We saw that ExpressPCB manufactured

boards as well and sent in our layout design to them. They had many purchase options, but

because we only needed one board, we choose the option of getting two boards for about $100.

We also had to purchase our components, which we received from our mentor, Professor

Smedley, for $20. After we started to put the circuit together we noticed that some of the

components such as the inductor and the MOSFET with the heat sink would not fit in the board

so we purchased one from Radio Shack for $1.50. The total cost of the whole project was about

$121.50, but the cost for just one board was $71.50.

VII. Non Technical Issues

i. Economics

We researched some of the low cost boost converters that are out in the market. The

average price for these low cost boost converters is about $1.50 each for a bulk of 1000 pieces.

The reason why our converter was a lot more expensive is because we had to build our circuit

Boost Converter 48

from scratch, including our inductor. The cost to make our board would have been less if we

ordered in bulk, but because we only needed one it was more expensive. Another reason why

our board cost more is the higher input and output voltage requirements. The low cost boost

converters are only made to have an input ranging from 1V to about maximum 20V with a low

output voltage. Our circuit was made to have an input ranging from 20V to 40V with a high

output voltage of 70V.

ii. Social/Political Issues

When we first decided to work on this project we did not see the significance of a boost

converter. It was not until we started working on it and researching on its functions that we

learned that a boost converter is very important to many electronic devices. The way a boost

converter is able to step up the voltage is very important to high output voltage devices. Many

electrical devices such as space-constrained electronics, USB, LCD screens, and camera

applications use boost converters.

An article by Thomas Net Industrial NewsRoom announces the release of a high power

boost converter by AnalogicTech. This low cost boost converter is able to supply "up to 4.5W of

power, this new converter is the first to take a single-cell Lithium-ion battery voltage and boost it

to a 5V/900 mA output in a total solution less than 1 mm in height" (ThomasNet). This boost

converter also has an efficiency of about 90%. These types of converters are important to small

electrical devices. Boost converters are also used in LCD displays that are in digital cameras and

cell phones. The boost converter can regulate how much current goes through the LED’s which

make up the picture on the screen. ThomasNet Industrial Newsroom announced the upcoming of

converters in the applications of cameras. “Up to 5 parallel LEDs can be driven at up to 25 mA

Boost Converter 49

each for LCD backlighting, while 2 LEDs can be driven at up to 200 mA each for camera flash”

(ThomasNet). Boost converters can be used for more than one application in one device.

Applications like these in electronic components are what make boost converters very

important to the future of our technology. Boost converters are important to space-constrained

electronics and to the future of all digital devices. This project helped us understand the

significance of the boost converter and we are glad to have been able to had hands-on experience

with it.

VIII. Our Team

As soon as Professor Smedley agreed to be our mentor, we communicated through

meetings and email. During fall quarter, she gave us the project that we would work on and

explained what she required from us as a group. As soon as we had specifications of our project,

we started to analyze every single component to understand the function of each one. We did

our own research and Professor Smedley answered any questions that we had. We kept meetings

every week to make sure we were on the right path. We believe these weekly meetings helped us

stay on track with our work and Professor Smedley was great answering any questions that we

had and helping us get our project done.

All three of us knew each other from previous classes and decided to be a group. We all

discussed what we each wanted to do for our senior project and we all agreed we wanted to do

something that specialized in power. After looking at every project we decided we wanted

Professor Smedley's project. From the first assignment, we made sure the workload was

distributed fairly. We also made sure we all understood every function of the circuit and the

main components. We believe we did great as a team and had fun working on the project.

Boost Converter 50

IX. Conclusion

With the analysis completed and the board fully designed and built, we found that our

group successfully created a boost converter. A low input voltage was applied and a high

voltage was output according to the specifications that were given to us. As a group, we designed

a functioning PCB with only minor errors. Considering that we had no prior design experience,

the board’s minor errors were typical and could easily be corrected on another design. According

to Professor Smedley, she is proud of our work and understands that designing a board requires

practice and in many cases, more than one attempt. The boost converter ran with an efficiency of

over 90% in all data tests. With this knowledge of power electronics and design, we feel that, as

a group, we are better prepared for the future as engineers.

Boost Converter 51

Works Cited

"AnalogicTech Announces High Power DC/DC Boost Converter for Space-Constrained

Applications." ThomasNet Industrial Newsroom. 28 Feb. 2007. 10 Mar. 2007

<http://news.thomasnet.com/fullstory/510866/612>.

"Boost-Converter." Interactive Power Electronics Seminar. 16 Jan. 2006. 27 Feb. 2007

<http://www.ipes.ethz.ch/ipes/dcdc/e_Boost.html>.

"DC/DC Converter Drives LCD Backlighting and Camera Flash." ThomasNet Industrial

Newsroom. 16 June 2006. 10 Mar. 2007

<http://news.thomasnet.com/fullstory/485214/612>.

Erickson, Robert W., and Dragan Maksimovic. Fundamentals of Power Electronics. 2nd ed. New

York: Springer Science+Business Media, 2001.

Li, Dong, and Xinbo Ruan. "A High Efficient Boost Converter with Power Factor Correction."

Power Electronics Specialists Conference 2.20-2 (2004): 1653-1657.

Mohan, Ned, Tore M. Undeland, and William P. Robbins. Power Electronics. 3rd ed. Hoboken:

John Wiley & Sons, Inc., 2003.

MAGNETICS • BUTLER, PA 6.13

22mm x 13mmDIMENSIONS

inches mm inches mm

A .851 ± .015 21.6 ± .38 2D .362 min. 9.2 min.

B .264 ± .004 6.7 ± .10 E .705 min. 17.9 min.

2B .528 ± .008 13.4 ± .20 F .370 max. 9.40 max.

C .590 nom. 15 nom. G .118 min. 2.99 min.

D .181 min. 4.59 min. H .179 ± .004 4.55 ± .10

MAGNETIC DATAMAGNETIC PATHLENGTH (cm) 3.12 CORE WEIGHT

(grams per set) 13

EFFECTIVEAREA (cm2)

.639 Wa Ac ‡ (cm4) .187

VOLUME (cm3) 2.00 ‡ Product of window area& core area, 1sec. Standard bobbin.

Note: Minimum core area .509 cm2

AL VALUES FOR UNGAPPED CORES

CORE NO. AL (mH/1000T) CORE NO. AL (mH/1000T)

A-42213-UG 1800 ± 25% P-42213-UG 3300 min.

D-42213-UG 3600 ± 25% F-42213-UG 4900 ± 25%

G-42213-UG 4600 ± 25% J-42213-UG 6825 min.K-42213-UG 2120 min.

R-42213-UG 3030 min

W-42213-UG 11,200 min. (B = 5G)19,500 Ref. nom.*

(B = 217G)

*@1kHz, 100 Turns, 0.5 mA

GAPPED CORE DATA TEMPERATURE COEFFICIENTS

CORE NO.AL(A)

µeTypical

Gap (in.)CORE NO.

TCe(B)

CORE NO.TCe(B)

**-42213-A063 63 25.1 .072 A-42213-A063 25 - 75 G-42213-A160 -45 to + 45**-42213-A100 100 39.8 .035 A-42213-A100 40 - 119 G-42213-A250 -70 to + 70**-42213-A160 160 63.5 .021 A-42213-A160 63 – 191 G-42213-A315 -88 to + 88**-42213-A250 250 99.5 .014 A-42213-A250 100 - 298 G-42213-A400 -111 to + 111**-42213-A315 315 125 .009 D-42213-A160 57 - 134 G-42213-A630 -175 to + 175**-42213-A400 400 159 .006 D-42213-A250 90 - 209**-42213-A630 630 250.7 .004 D-42213-A315 112 - 262

D-42213- A400 143 - 334D-42213-A630 226 - 526

**Add material code to part no.TCe values are based on - 30°C to + 70°C for D material

and from +20°C to + 70°C for A and G materials.Any practical gap is available.See pages 1.6 and 1.7.

FOR PREFERRED PARTS, SEEINSIDE BACK COVER

Material: screw: Polypropylene base: Polyoxymethylene

22mm x 13mmTUNING ASSEMBLY DIMENSIONS

(All dimensions are in inches - nominal)

For theseAL values:

PARTNUMBER

TYPENO. COLOR A B C D E

MAXIMUM TUNINGRANGE

1 BlackBlack .471 .169 .160 .146 .206

AL TC-G2213-C2 TC-F2213-B1100, 160,250, 315

TC-G2213-C2TB-P2213

CoreBase

100 24% -160 21% -250, 315,

400TC-F2213-B1TB-P2213

CoreBase

2 RedBlack

.396 .169 .160 .160 .190250 14% 25%

Flangeless base is also available. See page 8.10. 315 11% 20%

400 - 15%

STANDARD BOBBINS

DIMENSIONS IN INCHES NominalWinding AreaPer Section

≠ This bobbin available in a flame-retardantPART

NUMBERA

MAX.B

MAX.C

MIN.D

MAX.E

NOM. in2 cm2

AverageLength of

Turnft

version, Material Crastin S660FR, PBT ≠ B2213-01 .702 .359 .373 .421 .320 .0453 .292unreinforced, UL 94 V-0 rated. B2213-02 .702 .359 .373 .421 .151 .0214 .138Part no. B2213-01FR. B2213-03 .702 .359 .373 .421 .095 .0135 .087

.145

PRINTED CIRCUIT BOBBINS

PART NUMBER DIMENSIONS IN INCHES NominalWindingArea PerSectionBasic

BobbinSize-

PinLengt

hSec-tions

AMAX.

BMAX.

CMAX.

DNOM.

EMAX.

FMAX.

GNOM.

*X1

NOM.

*X2

NOM

(1)Y1

NOM.

(1)Y2

NOM. in2 cm2

Average

Lengthof Turn

ft

PC-B2213- * 1 .307 .043 .28

PC-B2213- * 2 .145 .02 .13

PC-B2213- * 3

..421 .354

.091

1.071 .402 .990 .187 .281 .023 .117

.013 .08

.144

If short pin (X1) is desired, part no. is -11, -12, or -13. (1) Y-Pin length available under board for soldering,If long pin (X2) is desired, part no. is -21, -22, or -23. using spring clip mounting (on 1/16" board).

6.14 MAGNETICS • BUTLER, PA

Bobbin Material: Glass-filled nylon(UL 94 V-0 rated - 1 & 2 sections)(UL 94 HB - 3 sections)Pin Material: Tin coated brass

See page 5.7 for bobbin assembly

NOTE:When ordering, insert suffix of pin length desired, (*1 or *2)into part no.

Material: Delrin(UL 94 HB rated)

.701

MOUNTING CLAMPS 22mm x 13mm

Figure 1 Figure 2 (Printed circuit board type)

Material: Spring Steel, .014 inches thick

Mounting Brackets are made to allow for tuning adjusters. If theseadjusters are not used, a polypropylene washer must be inserted totake up extra space.The part number and dimensions of the washer are:

Part Number Diameter Thickness

W-2213-24 .840 ± .008” .025”

(All dimensions in inches)PART A B C D F

NUMBER FIGURE NOM. NOM. NOM. ± .020 NOM.

C2213-14 (1) 1 .585 .876 .820 1.100 1.300

P-C2213-14 2 .585 .876 .820 .846 .141

(1) Mounting Holes (Figure 1) = #4-40 Machine Screw Impressions.

6.15MAGNETICS • BUTLER, PA

Section 1. What are Ferrites?

Ferrites are dense, homogeneous ceramic structures made by mix-

ing iron oxide (Fe2O3) with oxides or carbonates of one or more

metals such as manganese, zinc, nickel, or magnesium. They are

pressed, then fired in a kiln at 2000°F, and machined as needed

to meet various operational requirements.

MAGNETICS ® Ferrites

Ferrites described in this catalog are the manganese-zinc type used

for communications (frequencies from 1KHz to 1000 KHz) and

for power applications such as in switching power supplies.

Advantages of Ferrites

Ferrites have a paramount advantage over other types of magnetic

materials: high electrical resistivity and resultant low eddy cur-

rent losses over a wide frequency range. Additional characteristics

such as high permeability and time/temperature stability have

expanded ferrite uses into quality filter circuits, high frequency

transformers, wide band transformers, adjustable inductors, delay

lines, and other high frequency electronic circuitry. As the high

frequency performance of other circuit components continues to

be improved, ferrites are routinely designed into magnetic circuits

for both low level and power applications. Another factor in choos-

ing ferrites is the higher cost of magnetic metals. For the most

favorable combination of low cost, high Q, high stability, and

lowest volume, ferrites are the best core material choice for fre-

quencies from 10 KHz to 50 MHz. Ferrites offer an unmatched

flexibility in magnetic and mechanical parameters.

Summary of Ferrite Advantages1. LOW COST

2. LARGE SELECTION OF MATERIALS

3. SHAPE VERSATILITY

4. ECONOMICAL ASSEMBLY

5. TEMPERATURE AND TIME STABILITY

6. HIGH RESISTIVITY

7. WIDE FREQUENCY RANGE (10 KHz to 50 MHz)

8. HIGH Q/SMALL PACKAGE

TYPICAL MECHANICAL AND THERMAL PROPERTIES OF FERRITE MATERIALSMechanical Data

Bulk DensityTensile Strength

Compressive Strength

Youngs Modulus

Hardness (Knoop)Resistivity

Thermal Data

Coef. of Linear ExpansionSpecific Heat (25°)

Thermal Conductivity (25-85°C)

4.855.07.0 x 10³4563 x 10³12.4 x 10³1 .8x107

650 Typical10²-10³

10.5 x 10- 6 °C - 1

1100 J.kg - 1 °C- 1

.26 cal.g - 1. °C- 1

3500-4300 µW.mm- 1. °C - 1

35-43 mW.cm - 1.°C- 1

.0083-.010 cal.s-¹.cm - 1 .°C - 1

Units

gm/cm³kgf.mm - 2

Ibs.in - 2

kgf.mm- 2

lbs.in - 2

kgf.mm - 2

Ibs.in- 2

ohm-cm

Units

Above properties are averages measured on a range of commercially availableMnZn ferrite materials.

1.1MAGNETIC • BUTLER, PA

Section 2. MaterialsMaterial Characteristics (1)

INDUCTORS AND LOWLEVEL APPLICATIONS

EMI/RFI FILTERS ANDBROADBAND TRANSFORMERS

MATERIALS A D G J W H

Initial Permeability µi — 750 ± 20% 2000 ± 20% 2300 ± 20% 5000 ± 20% 10000 ± 30% 15000 ± 30%

Maximum Usable Frequency(50% roll-off) f MHz <9 <4 <4 <1 <.25 <.15

tan δRelative Loss Factorµiac

10-6 <12 (.5MHz)<20 (1MHz)

<6 (.1MHz) <6 (.1MHz) <20(100kHz)

<7 (10kHz) <15 (10kHz)

*Curie Temperature Tc °C >260 >145 >180 >140 >125 >120

* Relative Temp. Factor- 30°C to +20°C+ 20°C to +70°C

/°C 10-6/°C2.0 to 4.0 (Typ.)

1.0 to 3.0.9 to 2.19 to 2.1 -. 7 to +.7

*Flux Density@ 1194 A/m (15 Oe)

Bm GmT

4600460

3800380

4600460

4300430

4300430

4200420

* Remanence Br GmT

2300230

1000100

1300130

1000100

80080

80080

* Coercivity Hc OeA/m

0.756

0.2520

0.1512

0.18

0.043

0.043

Disaccommodation Factor DF 10-6 <15 <2.0 <3.5 <3 <3 <2.5

* Resistivity ρ Ω-m 4 3 8 1 .15 .1

* Density δ g/cm3 4.5 4.7 4.7 4.8 4.8 4.9

*Power Loss (PL),

Sine Wave, in mW/cm²(typical)

25kHz200mT

(2000G)

@25°C@60°C@100°C@120°C

100kHz100mT(1000G)

@25°C@60°C@100°C@120°C

500kHz50mT(500G)

@25 °C@80°C

@100 °C@120 °C

225275

375

700kHz50mT(500G)

@25°C@60°C@100°C@120°C

Available in:

Pot Cores X X X X X

RS Cores X X X X

DS Cores X X

RM Cores X X X X X

EP Cores X X

E, U Cores X X

EC, ETD Cores

PQ Cores

Toroids X X X X X X

Blocks X

NOTE (1). These characteristics are typical for a 42206size (0.870" O.D.) toroid. Specific core data will usuallydiffer from these numbers due to the influence ofgeometry and size. Characteristics with * are typical.


Material Characteristics (cont.) (1)

Br G 900m T 90

INDUCTORS ANDPOWER TRANSFORMERS

X

X

X

X

X

X

X

X

X

MATERIALS K R P F

Initial Permeability µj — 1500 ± 25% 2300 ± 25% 2500 ± 25% 3000 ± 20%

Maximum Usable Frequency(50% roll-off)

Relative Loss Factor

f MHz < 2 <1 .5 <1 .2 <1 .3

tan δ10-6µiac

Tc

/°C

<8(100kHz)

> 2 3 0 > 2 3 0 > 2 5 0° C >230* Curie Temperature

* Relative Temp. Factor–30°C to +20°C+20°C to +70°C

10- 6/°C

Bm G 4600mT 460

* Flux Density@ 1194 A/m (15 Oe)

* Remanence

5000 5000 4900

500 500 490

1100 1100 1200

110 110 120

0.18 0.18 0.214 14 16

* Coercivity Hc Oe 0.2A/m 16

Disaccommodation Factor 10 -6DF

p*Resisitivity Ω-m 20 6 5 2

δ 4.7 4.8 4.8 4.8*Density

*Power Loss (PL),Sine Wave, in mW/cm³(typical)

g/cm³

@25°C@60°C@100°C@120°C

25kHz

200mT

(2000G)

130 120 90

85 90 160

70 95 240

85 130

100kHz100mT

(1000G)

@25°C 100

@60°C 90@100°C 110

@120°C 130

125

90125

165

100180225

500kHz

50mT

(500G)

@25°C 100

@60°C 100

@100°C 120@120°C 140

300

250275

350

700kHz

50mT

(500G)

@25°C 180

@60°C 200@100°C 220@120°C 290

Available In:Pot Cores X X

X X

X X

X X

X X

X X

X X

X X

X X

X

RS Cores

DS Cores

X

X

X

X

X

X

X

X

X

X

RM Cores

EP Cores

E, U Cores

EC, ETD Cores

PQ Cores

Toroids

Blocks

MAGNETICS • BUTLER, PA 2.2

140

100

7090

375

300250

300

Graph 1 — Relative Loss Factor vs. Frequency Graph 2 — Initial Permeability (µi) vs. Temperature

Temperature °C

Frequency (kHz)

Graph 3A — Frequency Response Curves Graph 3B — Frequency Response Curves

Frequency (kHz)Frequency (kHz)

Graph 3C — Frequency Response Curves

Frequency (kHz)


Saturation Flux Density - gausses 5000 ( at 15 oersted, 25° C) (500 mT)

Coercive Force - oersted . . . . . . . . 0.18 (14A/m)

Curie Temperature 230°C. . . . . . . . . . . . .

P Materialµ i

2500 ± 25%Note: The core loss curves are developed from empirical data. For bestresults and highest accuracy, use them. The formula on page 2.11 yields afair approximation and can be useful in computer programs.

CORE LOSS vs FLUX DENSITYPERMEABILITY vs. TEMPERATURE

TEMPERATURE (°C)

CORE LOSS vs. TEMPERATURE

TEMPERATURE (°C)

PERMEABILITY vs. FLUX DENSITYFLUX DENSITY GAUSS

FLUX DENSITY vs. TEMPERATURE

FLUX DENSITY GAUSS

See page 2.12 for B-H DataTEMPERATURE (°C)

2.6MAGNETIC • BUTLER, PA

CORE LOSS INFORMATION

Included on Pages 2.4-2.10 are material characteristics for the various Magnetics power and inductormaterials. For computer programming purposes, the core loss curves can be represented by theequation below. The factors indicated in the chart are split into discrete frequency ranges, so that theequation offers a close approximation to the core loss curves on the above pages.

CORE LOSS EQUATION: PL=af cBd

PL is in mW/cm3

B is in kGf is in kHz

FACTORS APPLIED TO THE ABOVE FORMULA

a c d

K Material f<500 kHz 0.0530 1.60 3.15

f>1 MHz 1.77*10-9 4.13 2.98

R Material f<100 kHz 0.074 1.43 2.85

100 kHz<f<500 kHz 0.036 1.64 2.68

f>500 kHz 0.014 1.84 2.28

P Material f<100 kHz 0.158 1.36 2.86

100kHz<f<500 kHz 0.0434 1.63 2.62

f>500 kHz 7.36*10-7 3.47 2.54

F Material f<10 kHz 0.790 1.06 2.85

10 kHz<f<100 kHz 0.0717 1.72 2.66

100 kHz<f<500 kHz 0.0573 1.66 2.68

f>500 kHz 0.0126 1.88 2.29

J Material f<20 kHz 0.245 1.39 2.50

f>20 kHz 0.00458 2.42 2.50

W Material f<20 kHz 0.300 1.26 2.60

f>20 kHz 0.00382 2.32 2.62

H Material f<20 kHz 0.148 1.50 2.25

f>20 kHz 0.135 1.62 2.15


500 kHz<f<1 MHz 0.00113 2.19 3.10

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

Scott Schmidt

B vs. H Curves (dc)

H-oersted H-oersted

H-oersted

H-oersted

H-oersted

CONVERSION TABLE

Multiplynumber ofOerstedsOerstedsGaussesGaussesTeslas

by to obtain

79.5 A/m.795 A/cm

.1 milli Teslas10 - 4 Teslas10 4 Gausses


Low Level Applications – Pot Cores Section 5.

The information contained in this section is primarily concerned dimensions, accessories, and other important design criteria. Stan-with the design of linear inductors for high frequency LC tuned cir- dard Q curves are available on special request, if needed.cuits using Ferrite Pot Cores. Magnetics has arranged the data in The data presented in this section are compiled mainly for select-this section for ease in (1) determining the optimum core for these ing cores for high Q resonant LC circuits. However, much of thisLC circuits and (2) ordering the items necessary for any particular information can also be used to design pot cores into many otherPot Core assembly. applications, including high frequency transformers, chokes, and

Featured are magnetic data, temperature characteristics, core other magnetic circuit elements.

Pot Core AssemblyA ferrite pot core assembly includes the following items:

(1) two matched pot core halves(2) bobbin on which the coils are wound(3) tuning assembly(4) a clamp for holding the core halves together


The pot core shape provides a convenient means of adjustingthe ferrite structure to meet the specific requirements of the induc-tor. Both high circuit Q and good temperature stability of induc-tance can be obtained with these cores. The self-shielded pot coreisolates the winding from stray magnetic fields or effects from othersurrounding circuit elements.

The effective permeability (µe) is adjusted by grinding a smallair gap in the center post of the pot core. For transformers and someinductors, no ground air gap is introduced, and the effective perme-ability is maximized. The effective permeability of the pot core willalways be less than the material initial permeability (µi ) becauseof the small air gap at the mating surfaces of the pot core halves.For other inductors where stability of inductance, Q, and tempera-ture coefficient must be closely specified, a controlled air gap iscarefully ground into the center post of one or both of the pot

core halves. When fitted together, the total air gap then will deter-mine the effective permeability and control the magnetic charac-teristics of the pot core. Finer adjustment of the effectivepermeability (gapped pot core inductance) can be accomplishedby moving a ferrite cylinder or rod into the air gap through a holin the center post.

Magnetics ferrites are available in various initial permeabilities(µi) which for filter applications cover frequency ranges into the mega-hertz region. Magnetics produces a wide variety of pot core sizeswhich include fourteen (14) international standard sizes*. Theserange from 5 x 6 mm to 45 x 29 mm, these dimensions representingOD and height of a pair. Each pot core half is tested and matchedwith another half to produce a core with an inductance tolerance of± 3% for most centerpost ground parts.

Advantages ofPot Core Assemblies1. SELF-SHIELDING

Because the wound coil is enclosed within the ferrite core, self-shielding prevents stray magnetic fields from entering or leav-ing the structure.

2. COMPACTNESSSelf-shielding permits more compact arrangement of circuit com-ponents, especially on printed circuit boards.

3. MECHANICAL CONVENIENCEFerrite pot cores are easy to assemble, mount, and wire to thecircuit.

4. LOW COSTAs compared to other core materials, ferrites are easier to makein unusual configurations (such as pot cores), resulting in a lowercost component. In addition, winding a pot core is usually quickand inexpensive because coils can be pre-wound on bobbins.When other costs of assembly, mounting, wiring, and adjust-ment are added, the total cost is often less than with other corematerials or shapes.

5. ADJUSTABILITYFinal adjustment is accomplished by moving a threaded corein and out of the centerpost, and adjustment in the field is rela-tively easy as compared to any other type of construction.

6. IMPROVED TEMPERATURE STABILITY AND QAir gaps inserted between the mating surfaces of the center-posts provide good temperature stability and high Q.

7.

8.

WIDE CORE SELECTIONMany combinations of materials, physical sizes, and inductancesoffer the design engineer a large number of choices in coreselection.

LOW LOSSES AND LOW DISTORTIONSince ferrites have high resistivities, eddy current losses areextremely low over the applicable frequency range and can beneglected. Hysteresis losses can be kept low with proper selec-tion of material, core size, and excitation level.

Special Advantages ofMagneticsPot Core Assemblies1.

2.

3.

UNIQUE ONE PIECE CLAMPProvides simple assembly of the two core halves. Easy bend-ing action allows insertion of the core assembly into the clamp,and spring tension holds the assembly rigidly and permanentlyin place. Rivet, screw, or circuit board tab mounting is available.

Provides a close match to corresponding capacitors.

CHOICE OF LINEAR OR FLAT TEMPERATURE CHARAC-TERISTICS

CONSISTENCY AND UNIFORMITYModern equipment with closely controlled manufacturingprocesses produce ferrite pot cores that are magnetically uni-form, not only within one lot but from lot to lot.

* lEC Publication No. 133 (1961).


5.9

Table 5 — Magnet WireWire Tables

Wire Size Wire Area (Max.)* Heavy Turns** Resistance Current Capacity (ma)

AWG Circular Mils cm2 10-3 per in2 per cm2 Ohms/1000' @ 750 Cir. Mil/amp @ 500 Cir. Mil/amp

10 11,470 58.13 89 13.8 .9987 13,840 20,768

11 9,158 46.42 112 17.4 1.261 10,968 16,452

12 7,310 37.05 140 21.7 1.588 8,705 13,058

13 5,852 29.66 176 27.3 2.001 6,912 10,368

14 4,679 23.72 220 34.1 2.524 5,479 8,220

15 3,758 19.05 260 40.3 3.181 4,347 6,520

16 3,003 15.22 330 51.2 4.020 3,441 5,160

17 2,421 12.27 410 63.6 5.054 2,736 4,100

18 1,936 9.812 510 79.1 6.386 2,165 3,250

19 1,560 7.907 635 98.4 8.046 1,719 2,580

20 1,246 6.315 800 124 10.13 1,365 2,050

21 1,005 5.094 1,000 155 12.77 1,083 1,630

22 807 4.090 1,200 186 16.20 853 1,280

23 650 3.294 1,500 232 20.30 681 1,020

24 524 2.656 1,900 294 25.67 539 808

25 424 2.149 2,400 372 32.37 427 641

26 342 1.733 3,000 465 41.0 338 506

27 272 1.379 3,600 558 51.4 259 403

28 219 1.110 4,700 728 65.3 212 318

29 180 0.9123 5,600 868 81.2 171 255

30 144 0.7298 7,000 1,085 104 133 200

31 117 0.5930 8,500 1,317 131 106 158

32 96.0 0.4866 10,500 1,628 162 85 128

33 77.4 0.3923 13,000 2,015 206 67 101

34 60.8 0.3082 16,000 2,480 261 53 79

35 49.0 0.2484 20,000 3,100 331 42 63

36 39.7 0.2012 25,000 3,876 415 33 50

37 32.5 0.1647 32,000 4,961 512 27 41

38 26.0 0.1318 37,000 5,736 648 21 32

39 20.2 0.1024 50,000 7,752 847 16 25

40 16.0 0.0811 65,000 10,077 1,080 13 19

41 13.0 0.0659 80,000 12,403 1,320 11 16

42 10.2 0.0517 100,000 15,504 1,660 8.5 13

43 8.40 0.0426 125,000 19,380 2,140 6.5 10

44 7.30 0.037 150,000 23,256 2,590 5.5 8

45 5.30 0.0269 185.000 28,682 3,348 4.1 6.2

Table 6 — Litz Wire

Turns*** Turns***LitzWire Size per in2 per cm2

LitzWire Size per in2 per cm2

5/44 28,000 4,341 72/44 1,500 232

6/44 25,000 3,876 80/44 1,400 217

7/44 22,000 3,410 90/44 1,200 186

12/44 13,000 2,016 100/44 1,100 170

20/44 7,400 1,147 120/44 900 140

30/44 4,000 620 150/44 700 108

40/44 3,000 465 180/44 500 77

50/44 2,300 356 360/44 250 38

60/44 1,900 294

*Areas are for maximum wire area plusmaximum insulation buildup.

**Based on a typical machinelayer wound coil.

***Based on a typicallayer wound coil.

MAGNETICS • BUTLER, PA

Data Sheet No. PD60177 Rev. E

Block Diagram

Packages

Product Summary

IO+/- 1.5A / 1.5A

VOUT 6V - 20V

ton/off (typ.) 85 & 65 ns

DUAL LOW SIDE DRIVERFeatures• Gate drive supply range from 6 to 20V• CMOS Schmitt-triggered inputs• Matched propagation delay for both channels• Outputs out of phase with inputs (IR4426)• Outputs in phase with inputs (IR4427)• OutputA out of phase with inputA and OutputB in phase with inputB (IR4428)• Also available LEAD-FREE

Descriptions The IR4426/IR4427/IR4428 (S) is a low voltage,high speed power MOSFET and IGBT driver. Pro-prietary latch immune CMOS technologies en-able ruggedized monolithic construction. Logicinputs are compatible with standard CMOS orLSTTL outputs. The output drivers feature a highpulse current buffer stage designed for mini-mum driver cross-conduction. Propagationdelays between two channels are matched.

8

7

6

5 4

3

2

1NC

OUTA

Vs

INA

GND

INB OUTB

NC

IR442x

TO

LOAD

8 Lead PDIP

8 Lead SOIC

www.irf.com 1

IR4426/IR4427/IR4428(S) & (PbF)

2

IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATION

www.irf.com

Symbol Definition Min. Max. UnitsVS Fixed supply voltage -0.3 25

VO Output voltage -0.3 VS + 0.3

VIN Logic input voltage -0.3 VS + 0.3

PD Package power dissipation @ TA ≤ +25°C (8 Lead PDIP) — 1.0

(8 lead SOIC) — 0.625

RthJA Thermal resistance, junction to ambient (8 lead PDIP) — 125

(8 lead SOIC) — 200

TJ Junction temperature — 150

TS Storage temperature -55 150

TL Lead temperature (soldering, 10 seconds) — 300

Absolute Maximum RatingsAbsolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to GND. The thermal resistance and power dissipation ratings are measuredunder board mounted and still air conditions.

V

°C

Symbol Definition Min. Max. UnitsVS Fixed supply voltage 6 20

VO Output voltage 0 VS

VIN Logic input voltage 0 VS

TA Ambient temperature -40 125

Recommended Operating ConditionsThe input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within therecommended conditions. All voltage parameters are absolute voltages referenced to GND.

°C

V

W

°C/W

Symbol Definition Min. Typ. Max. Units Test ConditionsVIH Logic “0” input voltage (OUTA=LO, OUTB=LO) 2.7 — —

(IR4426)

Logic “1” input voltage (OUTA=HI, OUTB=HI)

(IR4427)

Logic “0” input voltage (OUTA=LO), Logic “1”

input voltage (OUTB=HI) (IR4428)

DC Electrical CharacteristicsVBIAS (VS) = 15V, TA = 25°C unless otherwise specified. The VIN, and IIN parameters are referenced to GND and areapplicable to input leads: INA and INB. The VO and IO parameters are referenced to GND and are applicable to theoutput leads: OUTA and OUTB.

V

www.irf.com 3


Symbol Definition Min. Typ. Max. Units Test ConditionsVIL Logic “1” input voltage (OUTA=HI, OUTB=HI) — — 0.8

(IR4426)

Logic “0” input voltage (OUTA=LO, OUTB=LO)

(IR4427)

Logic “I” input voltage (OUTA=HI), Logic “0”

input voltage (OUTB=LO) (IR4428)

VOH High level output voltage, VBIAS-VO — — 1.2

VOL Low level output voltage, VO — — 0.1

IIN+ Logic “1” input bias current (OUT=HI) — 5 15 VIN = 0V (IR4426)

VIN = VS (IR4427)

VINA = 0V (IR4428)

VINB = VS (IR4428)

IIN- Logic “0” input bias current (OUT=LO) — -10 -30 VIN = VS (IR4426)

VIN = 0V (IR4427)

VINA = VS (IR4428)

VINB = 0V (IR4428)

IQS Quiescent Vs supply current — 100 200 VIN = 0V or VS

IO+ Output high short circuit pulsed current 1.5 2.3 — VO = 0V, VIN = 0

(IR4426)

VO = 0V, VIN = VS

(IR4427)

VO = 0V, VINA = 0

(IR4428)

VO = 0V, VINB = VS

(IR4428)

PW ≤ 10 µs

IO- Output low short circuit pulsed current 1.5 3.3 — VO = 15V, VIN = VS

(IR4426)

VO = 15V, VIN = 0

(IR4427)

VO = 15V, VINA = VS

(IR4428)

VO = 15V, VINB = 0

(IR4428)

PW ≤ 10 µs

DC Electrical Characteristics cont.VBIAS (VS) = 15V, TA = 25°C unless otherwise specified. The VIN, and IIN parameters are referenced to GND and areapplicable to input leads: INA and INB. The VO and IO parameters are referenced to GND and are applicable to theoutput leads: OUTA and OUTB.

A

µA

V

4


www.irf.com

Functional Block Diagram IR4426

Symbol Definition Min. Typ. Max. Units Test Conditions Propagation delay characteristics

td1 Turn-on propagation delay — 85 160

td2 Turn-off propagation delay — 65 150

tr Turn-on rise time — 15 35

tf Turn-off fall time — 10 25

AC Electrical CharacteristicsVBIAS (VS) = 15V, CL = 1000pF, TA = 25oC unless otherwise specified.

ns figure 4

PREDRV DRV

PREDRV DRV

GND

OUTB

OUTA

Vs

INB

INA

Vs5V

5V

www.irf.com 5



PREDRV DRV

PREDRV DRV

GND

OUTB

OUTA

Vs

INB

INA

Vs

6


www.irf.com

Lead DefinitionsSymbol DescriptionVS Supply voltage

GND Ground

INA Logic input for gate driver output (OUTA), out of phase (IR4426, IR4428), in phase (IR4427)

INB Logic input for gate driver output (OUTB), out of phase (IR4426), in phase (IR4427, IR4428)

OUTA Gate drive output A

OUTB Gate drive output B


PREDRV DRV

PREDRV DRV

GND

OUTB

OUTA

Vs

INB

INA

Vs

5V

www.irf.com 7


INA

GND

INB

OUTA

VS

OUTB

IR4426 IR4427 IR4428Part Number

Lead Assignments

INA

GND

INB

INA

GND

INB

INA

GND

INB

OUTA

VS

OUTB

OUTA

VS

OUTB

OUTA

VS

OUTB

8 Lead PDIP 8 Lead PDIP 8 Lead PDIP

INA

GND

INB

OUTA

VS

OUTB

IR4426S IR4427S IR4428SPart Number

Lead Assignments

INA

GND

INB

INA

GND

INB

INA

GND

INB

OUTA

VS

OUTB

OUTA

VS

OUTB

OUTA

VS

OUTB

8 Lead SOIC 8 Lead SOIC 8 Lead SOIC

8


www.irf.com

INA (IR4426, IR4428)INB (IR4426)

INA (IR4427)INB (IR4427, IR4428)

OUTAOUTB

Figure 3. Timing Diagram

INA (IR4426, IR4428)INB (IR4426)

INA (IR4427)INB (IR4427, IR4428)

OUTAOUTB

tftd2td1tr

Figure 4. Switching Time Waveforms

www.irf.com 9


5

7

3

6 4.7UF

VS = 15V

INA

INB

2

4

0.1UF

OUTA

CL = 1000PF

OUTB

CL = 1000PF

IR4428

INA

INB

OUTA

OUTB

5

7

3

6 4.7UF 0.1UF

CL = 1000PF

CL = 1000PF

VS = 15V

2

4

IR4426

Figure 5. Switching Time Test Circuits

5

7

3

6 4.7UF

VS = 15V

2

4

INA

INB

OUTA

CL = 1000PF

OUTB

CL = 1000PF

0.1UF

IR4427

10


www.irf.com

8 Lead PDIP 01-3003 01

Caseoutline

Tape & Reel

www.irf.com 11


Case Outline - 8 Lead SOIC

(MS-012AA) 01-0021 09

12


www.irf.com

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105This product has been qualified per industrial level

Data and specifications subject to change without notice. 4/13/2004

LEADFREE PART MARKING INFORMATION

Lead Free ReleasedNon-Lead FreeReleased

Part number

Date code

IRxxxxxx

YWW?

?XXXXPin 1Identifier

IR logo

Lot Code(Prod mode - 4 digit SPN code)

Assembly site codePer SCOP 200-002

P? MARKING CODE

Basic Part (Non-Lead Free)8-Lead PDIP IR4426 order IR44268-Lead SOIC IR4426S order IR4426S8-Lead PDIP IR4427 order IR44278-Lead SOIC IR4427S order IR4427S8-Lead PDIP IR4428 order IR44288-Lead SOIC IR4428S order IR4428S

Leadfree Part8-Lead PDIP IR4426 order IR4426PbF8-Lead SOIC IR4426S order IR4426SPbF8-Lead PDIP IR4427 order IR4427PbF8-Lead SOIC IR4427S order IR4427SPbF8-Lead PDIP IR4428 order IR4428PbF8-Lead SOIC IR4428S order IR4428SPbF

ORDER INFORMATION

Semiconductor Components Industries, LLC, 2004

December, 2004 − Rev. 91 Publication Order Number:

MUR420/D

MUR405, MUR410, MUR415,MUR420, MUR440, MUR460

MUR420 and MUR460 are Preferred Devices

SWITCHMODEPower Rectifiers

This series is designed for use in switching power supplies, invertersand as free wheeling diodes, these state−of−the−art devices have thefollowing features:

Features

• Ultrafast 25 ns, 50 ns and 75 ns Recovery Times

• 175°C Operating Junction Temperature

• Low Forward Voltage

• Low Leakage Current

• High Temperature Glass Passivated Junction

• Reverse Voltage to 600 V

• Shipped in plastic bags, 5,000 per bag

• Available in Tape and Reel, 1500 per reel, by adding a “RL’’ suffix tothe part number

• These devices are manufactured with a Pb−Free external leadfinish only*

Mechanical Characteristics

• Case: Epoxy, Molded

• Weight: 1.1 gram (approximately)

• Finish: All External Surfaces Corrosion Resistant andTerminal Leads are Readily Solderable

• Lead and Mounting Surface Temperature for Soldering Purposes:220°C Max. for 10 Seconds, 1/16″ from case

• Polarity: Cathode indicated by Polarity Band

*For additional information on our Pb−Free strategy and soldering details, pleasedownload the ON Semiconductor Soldering and Mounting TechniquesReference Manual, SOLDERRM/D.

AXIAL LEADCASE 267STYLE 1

ULTRAFAST RECTIFIERS4.0 AMPERES50−600 VOLTS

Preferred devices are recommended choices for future useand best overall value.

MARKING DIAGRAM

MUR4xx

MUR4xx= Device Codexx = 05, 10, 15, 20, 40, 60

See detailed ordering and shipping information in the packagedimensions section on page 2 of this data sheet.

ORDERING INFORMATION

http://onsemi.com

MUR405, MUR410, MUR415, MUR420, MUR440, MUR460

http://onsemi.com2

MAXIMUM RATINGS

MUR

Rating Symbol 405 410 415 420 440 460 Unit

Peak Repetitive Reverse VoltageWorking Peak Reverse VoltageDC Blocking Voltage

VRRMVRWM

VR

50 100 150 200 400 600 V

Average Rectified Forward Current (Square Wave)(Mounting Method #3 Per Note 2)

IF(AV) 4.0 @ TA = 80°C 4.0 @TA = 40°C

A

Nonrepetitive Peak Surge Current(Surge applied at rated load conditions, half wave, single phase, 60 Hz)

IFSM 125 110 A

Operating Junction Temperature & Storage Temperature TJ, Tstg 65 to +175 °C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limitvalues (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.

THERMAL CHARACTERISTICS

MUR


Maximum Thermal Resistance, Junction−to−Ambient RJA See Note 2 °C/W

ELECTRICAL CHARACTERISTICS

MUR


Maximum Instantaneous Forward Voltage (Note 1)(iF = 3.0 A, TJ = 150°C)(iF = 3.0 A, TJ = 25°C)(iF = 4.0 A, TJ = 25°C)

vF0.710.880.89

1.051.251.28

V

Maximum Instantaneous Reverse Current (Note 1)(Rated dc Voltage, TJ = 150°C)(Rated dc Voltage, TJ = 25°C)

iR1505

25010

A

Maximum Reverse Recovery Time(IF = 1.0 Amp, di/dt = 50 Amp/s)(IF = 0.5 Amp, iR = 1.0 Amp, IREC = 0.25 Amp)

trr3525

7550

ns

Maximum Forward Recovery Time(IF = 1.0 A, di/dt = 100 A/s, Recovery to 1.0 V)

tfr 25 50 ns

1. Pulse Test: Pulse Width = 300 s, Duty Cycle 2.0%.


Device Package Shipping †

MUR405 AXIAL LEAD 5000 Units / Bag

MUR405RL AXIAL LEAD 1500 / Tape & Reel











†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.


http://onsemi.com3

MUR405, MUR410, MUR415, MUR420

Figure 1. Typical Forward Voltage

vF, INSTANTANEOUS VOLTAGE (V)

0.3 0.60.4 0.8

30

0.1

0.3

0.2

2.0

1.0

100

20

7.0

3.0

0.5

5.0

50

, IN

STA

NTA

NE

OU

S F

OR

WA

RD

CU

RR

EN

T (A

MP

S)

F

VR, REVERSE VOLTAGE (V)

0 6040 100 120

40

80

0.008

0.0040.002

0.80.40.2

20

4.02.0

8.0

TJ = 175°C

I R

20 80 200

Figure 2. Typical Reverse Current

TA, AMBIENT TEMPERATURE (°C)

Figure 3. Current Derating(Mounting Method #3 Per Note 2)

Figure 4. Power Dissipation

0 2.0

1.0

2.0

3.0

4.0

04.0 6.0 8.0

IF(AV), AVERAGE FORWARD CURRENT (A)

PF

(AV

)

Figure 5. Typical Capacitance

0.7

10

70

1.0 1.1 1.2

100°CTJ = 175°C

25°C

160 180140

0.080.040.02

, RE

VE

RS

E C

UR

RE

NT

( A

)

100°C

25°C

, AV

ER

AG

E P

OW

ER

DIS

SIP

AT

ION

(W

AT

TS

)

dc

SQUAREWAVE

i

1.0 3.0 5.0 7.0

5.0

6.0

7.0

8.0

0.2 0.5 0.7 0.9

200

20

30

40

10

VR, REVERSE VOLTAGE (V)

C, C

AP

AC

ITA

NC

E (

pF)

50

60

70

8090

100

20 30 50400

TJ = 25°C

9.0

10

5.010IPK

IAV

(CapacitiveLoad)

=20

0

1

2

3

4

5

6

7

8

0 20 40 60 80 100 120 140 160 180 200

Rated VRRJA = 28°C/W

SQUAREWAVE

DC

I F(A

V),

AV

ER

AG

E F

OR

WA

RD

CU

RR

EN

T(A

)


http://onsemi.com4

MUR440, MUR460

Figure 6. Typical Forward Voltage

vF, INSTANTANEOUS VOLTAGE (VOLTS)

0.5 1.10.7 1.5

0.03

0.1

0.3

0.2

2.0

1.0

0.02

20

7.0

3.0

0.5

5.0

0.05

, IN

STA

NTA

NE

OU

S F

OR

WA

RD

CU

RR

EN

T (A

MP

S)

F

VR, REVERSE VOLTAGE (VOLTS)

0 200100 400

40

80

0.0080.004

200

0.80.40.2

20

4.02.0

8.0

TJ = 175°C

I R

300 700

Figure 7. Typical Reverse Current

TA, AMBIENT TEMPERATURE (°C)

Figure 8. Current Derating(Mounting Method #3 Per Note 2)

Figure 9. Power Dissipation

0 2.0

2.0

4.0

6.0

8.0

04.0 6.0 8.0

IF(AV), AVERAGE FORWARD CURRENT (A)

PF

(AV

)

Figure 10. Typical Capacitance

0.7

10

0.07

1.9 2.1 2.3

100°C

TJ = 175°C

25°C

600500

0.080.040.02

, RE

VE

RS

E C

UR

RE

NT

( A

)

100°C

25°C

, AV

ER

AG

E P

OW

ER

DIS

SIP

AT

ION

(W

AT

TS

)

IPK

IAV

dc

SQUAREWAVE

i

1.0 3.0 5.0 7.0

10

12

14

0.3 0.9 1.3 1.7

40

20

30

4.010

VR, REVERSE VOLTAGE (VOLTS)

C, C

AP

AC

ITA

NC

E (

pF)

5.0

6.07.08.09.010

20 30 50400

TJ = 25°C

400

9.0 10

5.0

10

(Capacitive

Load)=20

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

5

6

7

8

Rated VRRJA = 28°C/W

SQUAREWAVE

DC

I F(A

V),

AV

ER

AG

E F

OR

WA

RD

CU

RR

EN

T(A

)


http://onsemi.com5

Lead Length, L (IN)MountingMethod 1/8 1/4 1/2 Units

12

3

5058RJA

51 5359 61

28

°C/W

°C/W

°C/W

TYPICAL VALUES FOR RJA IN STILL AIR

Data shown for thermal resistance junction−to−ambient(RJA) for the mountings shown is to be used as typicalguideline values for preliminary engineering or in case thetie point temperature cannot be measured.

NOTE 2 — AMBIENT MOUNTING DATA

MOUNTING METHOD 1

MOUNTING METHOD 2

MOUNTING METHOD 3

3/45563

ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ

L L

P.C. Board Where Available CopperSurface area is small.

ÉÉÉÉÉÉÉÉÉÉÉÉ

L L

Vector Push−In Terminals T−28

ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ

L = 1/2

Board Ground Plane

″

P.C. Board with1−1/2″ x 1−1/2 ″ Copper Surface


http://onsemi.com6

PACKAGE DIMENSIONS

AXIAL LEADCASE 267−05

ISSUE G

STYLE 1:PIN 1. CATHODE (POLARITY BAND)

2. ANODE

1 2

K A

K

D

B

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.287 0.374 7.30 9.50

B 0.189 0.209 4.80 5.30

D 0.047 0.051 1.20 1.30

K 1.000 −−− 25.40 −−−

NOTES:1. DIMENSIONS AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. 267−04 OBSOLETE, NEW STANDARD 267−05.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further noticeto any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. Alloperating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rightsnor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. ShouldBuyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATIONN. American Technical Support : 800−282−9855 Toll FreeUSA/Canada

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For additional information, please contact yourlocal Sales Representative.

SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Complete Pulse-Width Modulation (PWM)Power-Control Circuitry

Uncommitted Outputs for Single-Ended orPush-Pull Applications

Low Standby Current . . . 8 mA Typ

Interchangeable With Industry StandardSG2524 and SG3524

description/ordering information

The SG2524 and SG3524 incorporate all thefunctions required in the construction of aregulating power supply, inverter, or switchingregulator on a single chip. They also can be usedas the control element for high-power-outputapplications. The SG2524 and SG3524 weredesigned for switching regulators of either polarity, transformer-coupled dc-to-dc converters, transformerlessvoltage doublers, and polarity-converter applications employing fixed-frequency, pulse-width modulation(PWM) techniques. The complementary output allows either single-ended or push-pull application. Each deviceincludes an on-chip regulator, error amplifier, programmable oscillator, pulse-steering flip-flop, two uncommittedpass transistors, a high-gain comparator, and current-limiting and shutdown circuitry.


TINPUT

REGULATION PACKAGE† ORDERABLE TOP-SIDETA REGULATION

MAX (mV)PACKAGE† ORDERABLE

PART NUMBERTOP-SIDEMARKING

PDIP (N) Tube of 25 SG3524N SG3524N

0°C to 70°C 30 SOIC (D)Tube of 40 SG3524D

SG35240°C to 70°C 30 SOIC (D)Reel of 2500 SG3524DR

SG3524

SOP (NS) Reel of 2000 SG3524NSR SG3524

PDIP (N) Tube of 25 SG2524N SG2524N

–25°C to 85°C 20SOIC (D)

Tube of 40 SG2524DSG2524SOIC (D)

Reel of 2500 SG2524DRSG2524

† Package drawings, standard packing quantities, thermal data, symboliztion, and PCB design guidelines areavailable at www.ti.com/sc/package.

Copyright 2003, Texas Instruments Incorporated ! "#$ ! %#&'" ( $)(#" ! " !%$"" ! %$ *$ $! $+! ! #$ !! (( , -) (#" %"$!!. ($! $"$!!'- "'#($ $! . '' %$ $!)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

IN–IN+

OSC OUTCURR LIM+CURR LIM–

RTCT

GND

REF OUTVCCEMIT 2COL 2COL 1EMIT 1SHUTDOWNCOMP

SG2524 . . . D OR N PACKAGESG3524 . . . D, N, OR NS PACKAGE

(TOP VIEW)


2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagram

T COL 2

OSC OUTEMIT 2

EMIT 1

COL 1

Vref

ReferenceRegulator

Comparator

Oscillator

SHUTDOWN

Error Amplifier

1

2

9

4

5CURR LIM–

CURR LIM+

GND8

10

+

–

+

–

NOTE A: Resistor values shown are nominal.

12

1113

143

IN–

IN+

COMP

1 kΩ10 kΩ

15

RT

CT

REF OUT16

6

7

Vref

Vref

Vref

Vref

VCC

Vref

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage, VCC (see Notes 1 and 2) 40 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Collector output current, ICC 100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference output current, IO(ref) 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current through CT terminal –5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Notes 3 and 4): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values are with respect to network ground terminal.2. The reference regulator may be bypassed for operation from a fixed 5-V supply by connecting the VCC and reference output

(REF OUT) pin both to the supply voltage. In this configuration, the maximum supply voltage is 6 V.3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient

temperature is PD = (TJ(max) – TA)/θJA. Operation at the absolute maximum TJ of 150°C can impact reliability.4. The package thermal impedance is calculated in accordance with JESD 51-7.



recommended operating conditionsMIN MAX UNIT

VCC Supply voltage 8 40 V

Reference output current 0 50 mA

Current through CT terminal –0.03 –2 mA

RT Timing resistor 1.8 100 kΩ

CT Timing capacitor 0.001 0.1 µF

TA Operating free air temperatureSG2524 –25 85

°CTA Operating free-air temperatureSG3524 0 70

°C

electrical characteristics over recommended operating free-air temperature range, VCC = 20 V,f = 20 kHz (unless otherwise noted)

reference section

PARAMETER TEST CONDITIONS†SG2524 SG3524

UNITPARAMETER TEST CONDITIONS†MIN TYP‡ MAX MIN TYP‡ MAX

UNIT

Output voltage 4.8 5 5.2 4.6 5 5.4 V

Input regulation VCC = 8 V to 40 V 10 20 10 30 mV

Ripple rejection f = 120 Hz 66 66 dB

Output regulation IO = 0 mA to 20 mA 20 50 20 50 mV

Output voltage change with temperature TA = MIN to MAX 0.3% 1% 0.3% 1%

Short-circuit output current§ Vref = 0 100 100 mA

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C§ Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:

N

n1

(xn X)2

N 1

oscillator section

PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

fosc Oscillator frequency CT = 0.001 µF, RT = 2 kΩ 450 kHz

Standard deviation of frequency§ All values of voltage, temperature, resistance,and capacitance constant

5%

∆fFrequency change with voltage VCC = 8 V to 40 V, TA = 25°C 1%

∆fosc Frequency change with temperature TA = MIN to MAX 2%

Output amplitude at OSC OUT TA = 25°C 3.5 V

tw Output pulse duration (width) at OSC OUT CT = 0.01 µF, TA = 25°C 0.5 µs

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C§ Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:

N

n1

(xn X)2

N 1



error amplifier section

PARAMETERTEST SG2524 SG3524

UNITPARAMETERTEST

CONDITIONS† MIN TYP‡ MAX MIN TYP‡ MAXUNIT

VIO Input offset voltage VIC = 2.5 V 0.5 5 2 10 mV

IIB Input bias current VIC = 2.5 V 2 10 2 10 µA

Open-loop voltage amplification 72 80 60 80 dB

VICR Common-mode input voltage range TA = 25°C1.8 to

3.41.8 to

3.4V

CMMR Common-mode rejection ratio 70 70 dB

B1 Unity-gain bandwidth 3 3 MHz

Output swing TA = 25°C 0.5 3.8 0.5 3.8 V

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C

output sectionPARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

V(BR)CE Collector-emitter breakdown voltage 40 V

Collector off-state current VCE = 40 V 0.01 50 µA

Vsat Collector-emitter saturation voltage IC = 50 mA 1 2 V

VO Emitter output voltage VC = 20 V, IE = –250 µA 17 18 V

tr Turn-off voltage rise time RC = 2 kΩ 0.2 µs

tf Turn-on voltage fall time RC = 2 kΩ 0.1 µs

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C.

comparator sectionPARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

Maximum duty cycle, each output 45%

V Inp t threshold oltage at COMPZero duty cycle 1

VVIT Input threshold voltage at COMPMaximum duty cycle 3.5

V

IIB Input bias current –1 µA

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C.

current limiting sectionPARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

VI Input voltage range (either input) –1 to1 V

V(SENSE) Sense voltage at TA = 25°CV(IN ) V(IN ) ≥ 50 mV V(COMP) 2 V

175 200 225 mV

Temperature coefficient of sense voltageV(IN+) – V(IN–) ≥ 50 mV, V(COMP) = 2 V

0.2 mV/°C‡ All typical values, except for temperature coefficients, are at TA = 25°C.

total devicePARAMETER TEST CONDITIONS MIN TYP‡ MAX UNIT

Ist Standby currentVCC = 40 V, IN–, CURR LIM+, CT, GND, COMP, EMIT 1, EMIT 2 grounded,IN+ at 2 V, All other inputs and outputs open

8 10 mA

‡ All typical values, except for temperature coefficients, are at TA = 25°C.



PARAMETER MEASUREMENT INFORMATION

0.1 µF

2 kΩ

10 kΩ

RT

1 W2 kΩ

8

4

2

1

9

6

7

10

11

14

16

3

12

13

(Open)

Outputs

VCC = 8 V to 40 V

15

SHUTDOWN

CT

RT

COMP

IN–

IN+

CURR LIM+ COL 2

COL 1

OSC OUT

REF OUT

EMIT 2

EMIT 1

GND

SG2524 or SG3524

VCC

CT

2 kΩ

1 W2 kΩ

2 kΩ10 kΩ

1 kΩ

5CURR LIM–

VREF

VREF

Figure 1. General Test Circuit

≈0 V

≈VCC

VOLTAGE WAVEFORMS

90%

10%10%

90%

trtf

TEST CIRCUIT

Circuit Under Test

Output

2 kΩ

VCC

Output

Figure 2. Switching Times



TYPICAL CHARACTERISTICS

Frequency – Hz

–10

0

10

20

30

40

50

60

70

80

90

Op

en-L

oo

p V

olt

age

Am

plif

icat

ion

of

Err

or

Am

plif

ier

– d

B

10 M1 M100 k10 k1 k100

RL is resistance from COMP to ground

ÏÏÏÏÏÏÏÏÏÏ

RL = 300 kΩ

ÏÏÏÏRL = 1 MΩ

ÏÏÏÏÏÏÏÏÏÏ

RL = 100 kΩ

ÏÏÏÏÏÏÏÏ

RL = 30 kΩ

OPEN-LOOP VOLTAGE AMPLIFICATIONOF ERROR AMPLIFIER

vsFREQUENCY

VCC = 20 VTA = 25°C

RL = ∞

Figure 3

1

– O

scill

ato

r F

req

uen

cy –

Hz

RT – Timing Resistance – kΩ

20 40 1007010742

OSCILLATOR FREQUENCYvs

TIMING RESISTANCE

VCC = 20 VTA = 25°C

1M

400 k

100 k

40 k

10 k

4 k

1 k

400

100

CT = 0.1 µF

CT = 0.01 µF

CT = 0.03 µF

CT = 0.003 µF

CT = 0

f osc

CT = 0.001 µF

Figure 4

OUTPUT DEAD TIMEvs

TIMING CAPACITANCE

1

10

4

0.001 0.01

Ou

tpu

t D

ead

Tim

e –

0.004 0.10.040.1

0.4

µs

CT – Timing Capacitance – µF

Figure 5



PRINCIPLES OF OPERATION†

The SG2524 is a fixed-frequency pulse-width-modulation (PWM) voltage-regulator control circuit. The regulatoroperates at a fixed frequency that is programmed by one timing resistor, RT, and one timing capacitor, CT. RTestablishes a constant charging current for CT. This results in a linear voltage ramp at CT, which is fed to thecomparator, providing linear control of the output pulse duration (width) by the error amplifier. The SG2524 containsan onboard 5-V regulator that serves as a reference, as well as supplying the SG2524 internal regulator controlcircuitry. The internal reference voltage is divided externally by a resistor ladder network to provide a reference withinthe common-mode range of the error amplifier as shown in Figure 6, or an external reference can be used. The outputis sensed by a second resistor divider network and the error signal is amplified. This voltage is then compared to thelinear voltage ramp at CT. The resulting modulated pulse out of the high-gain comparator then is steered to theappropriate output pass transistor (Q1 or Q2) by the pulse-steering flip-flop, which is synchronously toggled by theoscillator output. The oscillator output pulse also serves as a blanking pulse to ensure both outputs are never onsimultaneously during the transition times. The duration of the blanking pulse is controlled by the value of CT. Theoutputs may be applied in a push-pull configuration in which their frequency is one-half that of the base oscillator, orparalleled for single-ended applications in which the frequency is equal to that of the oscillator. The output of the erroramplifier shares a common input to the comparator with the current-limiting and shut-down circuitry and can beoverridden by signals from either of these inputs. This common point is pinned out externally via the COMP pin, whichcan be employed to either control the gain of the error amplifier or to compensate it. In addition, the COMP pin canbe used to provide additional control to the regulator.

APPLICATION INFORMATION†

oscillator

The oscillator controls the frequency of the SG2524 and is programmed by RT and CT as shown in Figure 4.

f 1.30RT CT

where: RT is in kΩCT is in µFf is in kHz

Practical values of CT fall between 0.001 µF and 0.1 µF. Practical values of RT fall between 1.8 kΩ and 100 kΩ.This results in a frequency range typically from 130 Hz to 722 kHz.

blanking

The output pulse of the oscillator is used as a blanking pulse at the output. This pulse duration is controlled bythe value of CT as shown in Figure 5. If small values of CT are required, the oscillator output pulse duration canbe maintained by applying a shunt capacitance from OSC OUT to ground.

synchronous operation

When an external clock is desired, a clock pulse of approximately 3 V can be applied directly to the oscillatoroutput terminal. The impedance to ground at this point is approximately 2 kΩ. In this configuration, RTCT mustbe selected for a clock period slightly greater than that of the external clock.

† Throughout these discussions, references to the SG2524 apply also to the SG3524.




synchronous operation (continued)

If two or more SG2524 regulators are operated synchronously, all oscillator output terminals must be tiedtogether. The oscillator programmed for the minimum clock period is the master from which all the otherSG2524s operate. In this application, the CTRT values of the slaved regulators must be set for a periodapproximately 10% longer than that of the master regulator. In addition, CT (master) = 2 CT (slave) to ensurethat the master output pulse, which occurs first, has a longer pulse duration and, subsequently, resets the slaveregulators.

voltage reference

The 5-V internal reference can be employed by use of an external resistor divider network to establish areference common-mode voltage range (1.8 V to 3.4 V) within the error amplifiers (see Figure 6), or an externalreference can be applied directly to the error amplifier. For operation from a fixed 5-V supply, the internalreference can be bypassed by applying the input voltage to both the VCC and VREF terminals. In thisconfiguration, however, the input voltage is limited to a maximum of 6 V.

To NegativeOutput Voltage

REF OUT

5 kΩR1

To PositiveOutput Voltage

R25 kΩ

REF OUT

+

–

+

–

5 kΩ

5 kΩ

R2

R1

VO 2.5 V R1 R2R1

VO 2.5 V 1 R2R1

2.5 V 2.5 V

Figure 6. Error-Amplifier Bias Circuits

error amplifier

The error amplifier is a differential-input transconductance amplifier. The output is available for dc gain controlor ac phase compensation. The compensation node (COMP) is a high-impedance node (RL = 5 MΩ). The gainof the amplifier is AV = (0.002 Ω–1)RL and easily can be reduced from a nominal 10,000 by an external shuntresistance from COMP to ground. Refer to Figure 3 for data.

compensation

COMP, as previously discussed, is made available for compensation. Since most output filters introduce oneor more additional poles at frequencies below 200 Hz, which is the pole of the uncompensated amplifier,introduction of a zero to cancel one of the output filter poles is desirable. This can be accomplished best witha series RC circuit from COMP to ground in the range of 50 kΩ and 0.001 µF. Other frequencies can be canceledby use of the formula f ≈ 1/RC.





shutdown circuitry

COMP also can be employed to introduce external control of the SG2524. Any circuit that can sink 200 µA canpull the compensation terminal to ground and, thus, disable the SG2524.

In addition to constant-current limiting, CURR LIM+ and CURR LIM– also can be used in transformer-coupledcircuits to sense primary current and shorten an output pulse should transformer saturation occur. CURR LIM–also can be grounded to convert CURR LIM+ into an additional shutdown terminal.

current limiting

A current-limiting sense amplifier is provided in the SG2524. The current-limiting sense amplifier exhibits athreshold of 200 mV ±25 mV and must be applied in the ground line since the voltage range of the inputs is limitedto 1 V to –1 V. Caution should be taken to ensure the –1-V limit is not exceeded by either input, otherwise,damage to the device may result.

Foldback current limiting can be provided with the network shown in Figure 7. The current-limit schematic isshown in Figure 8.

VO

RsR2

R1EMIT 2

EMIT 1

SG2524

IO(max) 1

Rs200 mV

VO R2

R1 R2

IOS 200 mV

Rs

CURR LIM+

CURR LIM–

11

14

5

4

Figure 7. Foldback Current Limiting for Shorted Output Conditions

Constant-Current Source

CURR LIM+

COMP CT

Comparator

Error Amplifier

CURR LIM–

Figure 8. Current-Limit Schematic





output circuitry

The SG2524 contains two identical npn transistors, the collectors and emitters of which are uncommitted. Eachtransistor has antisaturation circuitry that limits the current through that transistor to a maximum of 100 mA forfast response.

general

There are a wide variety of output configurations possible when considering the application of the SG2524 asa voltage-regulator control circuit. They can be segregated into three basic categories:

Capacitor-diode-coupled voltage multipliers Inductor-capacitor-implemented single-ended circuits Transformer-coupled circuits

Examples of these categories are shown in Figures 9, 10, and 11, respectively. Detailed diagrams of specificapplications are shown in Figures 12–15.

D1

VI

VO

VI < VO

VI

D1

VO

VI > VO

D1

VI

–VO

| +VI | > | – VO |

Figure 9. Capacitor-Diode-Coupled Voltage-Multiplier Output Stages





VIVO

VI > VO

VI

VI < VO

VO

VI–VO

| +VI | < | – VO |

Figure 10. Single-Ended Inductor Circuit

VO

Push-Pull

VO

VI

Flyback

ÏÏVI

Figure 11. Transformer-Coupled Outputs





SG2524

COMP

.

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

GND

OSC OUT

CT

RT

REF OUT

IN+

IN–

0.01 µF

0.1 µF

5 kΩ

5 kΩ

2 kΩ

50 µF

–5 V20 mA

1N916

1N91620 µF

1N91615 kΩ

VCC = 15 V

VCC

CURR LIM–SHUTDOWN

+

1

2

16

6

7

10

3

11

12

13

14

4

5

9

8

15

5 kΩ

+

Figure 12. Capacitor-Diode Output Circuit

VCC = 5 V

0.1 µF1 MΩ

300 Ω

1N916

1N916

20T200 Ω

–15 V

20 mA

15 V

50 µF

50 µF

50T

50T

TIP29A

1 Ω

1N916620 Ω

510 Ω

2N2222

4.7 µF

0.001 µF

0.02 µF

5 kΩ

2 kΩ

100 µF

5 kΩ

5 kΩ

SG2524

VCC

OSC OUT

GNDCOMP

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

CURR LIM–

CT

RT

REF OUT

IN+

IN–

+

+

SHUTDOWN

25 kΩ

+

+

1

2

16

6

7

10

3

11

12

13

14

4

5

9

15

8

InputReturn

Figure 13. Flyback Converter Circuit

†Throughout these discussions, references to the SG2524 apply also to the SG3524.




Input Return0.1 Ω

3 kΩ1N3880

500 µF

1 A5 V

0.9 mHTIP115

SG2524

VCC

OSC OUTGND

VCC = 28 V

0.001 µF

50 kΩ

5 kΩ

3 kΩ

0.1 µF

0.02 µF

5 kΩ

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

SHUTDOWN

CT

RT

REF OUT

IN+

IN–

CURR LIM–

COMP

1

2

16

6

7

10

3

11

12

13

14

4

5

9

15

8

5 kΩ

5 kΩ+

Figure 14. Single-Ended LC Circuit

5 kΩ

0.01 µF

0.1 µF

2 kΩ

5 kΩ

20 kΩ

1500 µF

0.1 Ω

100 µF

+

–5 A5 V

20T

20T

5T

5T

TIR101A

1 mH

TIP31A

100 Ω

100 Ω

TIP31A1W

1 kΩ

VCC = 28 V

GNDOSC OUT

VCC

SG2524

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

SHUTDOWN

CT

RT

REF OUT

IN+

IN–

CURR LIM–

COMP

1

2

16

6

7

10

3

11

12

13

14

4

5

9

15

8

5 kΩ

5 kΩ

0.001 µF

+

+

1W1 kΩ

Figure 15. Push-Pull Transformer-Coupled Circuit

†Throughout these discussions, references to the SG2524 apply also to the SG3524.

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. To minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.

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DSP dsp.ti.com Broadband www.ti.com/broadband

Interface interface.ti.com Digital Control www.ti.com/digitalcontrol

Logic logic.ti.com Military www.ti.com/military

Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork

Microcontrollers microcontroller.ti.com Security www.ti.com/security

Telephony www.ti.com/telephony

Video & Imaging www.ti.com/video

Wireless www.ti.com/wireless

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http://www.ti.com/audio

http://www.ti.com/automotive

http://www.ti.com/broadband

http://www.ti.com/digitalcontrol

http://www.ti.com/military

http://www.ti.com/opticalnetwork

http://www.ti.com/security

http://www.ti.com/telephony

http://www.ti.com/video

http://www.ti.com/wireless

boost converter

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