Digital Circuit Design and Language

Boolean Algebra and Gate Minimization

Chang, Ik JoonKyunghee University

Boolean Algebra

Min-term and Max-term

Canonical Form

+ Sum of Min-term?

+ Product of Max-term?

f1 = Σ m(1,4,7)f2 = Σ m(3,5,6,7)

f1 = ∏M(0,2,3,5,6)f2 = ∏M(1,2,3,5)

Basic Gate Types

Gate Minimization: K-MAP

Four Variable Karnaugh Maps

F = Σ m(0,2,3,5,6,7,8,10,11)+ Σ d(14,15)

Four Variable Karnaugh Maps

F = Π M(1,4,9,12,13)+ Σ d(14,15)

SELECTION OF PRIME IMPLICANTS

SIMPLIFYING 6-VARIABLE FUNCITONPartial truth table for 6-variable function

G(A, B, C, D, E, F) = m0 + m2 + m3 + Em5 + Em7 + Fm9 + m11 + m15 (+ don’t care terms)

ABCDEF G ABCDEF G0000XX 1 1001X1 10001XX X 1010XX X0010XX 1 1011XX 10011XX 1 1101XX X01011X 1 1111XX 101111X 1

SIMPLIFICATION USING MAP-ENTERED VARIABLES

SIMPLIFICATION USING MAP-ENTERED VARIABLES

+ G = A'B' + ACD + E(A'D) + F(AD)+ In general, Function = MS0 + P1MS1 + P2MS2 + · · ·

• MS0 = Minimal Sum when All Variables are 0• MS1 = Minimal Sum when Variable P1=1, All Others 0• MS2 = Minimal Sum when Variable P2=1, All Others 0

Gate Minimization: NAND/NOR Conversion and Bubble Cancel

STATIC HAZARDS+ Static 1-Hazard

• Output must be 1, but momentarily goes to 0 for some change in inputs and some combination of propagation delays

+ Static 0-Hazard• If output must be 0, but momentarily goes to 1 for

some change in inputs and some combination of propagation delays

EXAMPLE: STATIC 1-HAZARD+ Static 1-Hazard when A=1, B~, C=1

ELIMINATING STATIC-1 HAZARD