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[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed Electrical & Mechanical Engineer [email protected] Engineering 43 Series/Parallel, Dividers, Nodes & Meshes

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Page 1: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx1

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Bruce Mayer, PELicensed Electrical & Mechanical Engineer

[email protected]

Engineering 43

Series/Parallel,Dividers,Nodes & Meshes

Page 2: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx2

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Series Parallel

Up To Now We Have Studied Circuits That Can Be Analyzed With One Application Of KVL Or KCL

We will see That In Some Situations It Is Advantageous To Combine Resistors To Simplify The Analysis Of A Circuit

Now We Examine Some More Complex Circuits Where We Can Simplify The Analysis Using Techniques:• Combining Resistors• Ohm’s Law

Page 3: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx3

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Resistor Equivalents Series

• Resistors Are In Series If TheyCarry Exactly The Same Current

Parallel• Resistors Are In Parallel If

They have Exactly the Same Potential Across Them

NS RRRRR 321

NP RRRRR

11111

321

Page 4: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx4

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Conductance Equivalents

ReCall: G = 1/R For SERIES

Connection

For PARALLELConnection

NS

NS

GGGGG

RRRRR

11111

321

321

NP

NP

GGGGG

RRRRR

321

321

11111

GS = 1.479 S

GP = 15 S

Page 5: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx5

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Combine ResistorsExample:Find RAB

6k||3k = 2k

(10K,2K)SERIES

SERIESk3

kkk 412||6

k12

k5

(4K,2K)SERIES

kkk 36||6 (3K,9K)SERIES

kkk 312||4

Page 6: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx6

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

More Examples Step-1: Series

Reduction Step-2: Parallel

Reduction

k9

9 kΩ

kkk 69||18

kkk 1066

k22

Page 7: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx7

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example w/o Redrawing

Step-2: 12k 12k = 6k Step-3: 3k 6k = 2k

Step-1: 4k↔8k = 12k

Step-4: 6k (4k↔2k) = 3k = RAB

kkk 612||12

kkk 26||3

)24(||6 kkk

12k

Page 8: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx8

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Series-Parallel Resistor Circuits

Combing Components Can Reduce The Complexity Of A Circuit And Render It Suitable For Analysis Using The Basic Tools Developed So Far• Combining Resistors In SERIES Eliminates

One NODE From The Circuit• Combining Resistors In PARALLEL

Eliminates One LOOP From The Circuit

Page 9: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx9

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

S-P Circuit Analysis Strategy

Reduce Complexity Until The Circuit Becomes Simple Enough To Analyze

Use Data From Simplified Circuit To Compute Desired Variables In Original Circuit • Hence Must Keep Track Of Any

Relationship Between Variables

Page 10: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx10

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example – Ladder Network

Find All I’s & V’s in Ladder Network• 1st: S-P Reduction

k12kk 12||4

k6

kk 6||63

2

36

IkVk

VI

b

a

3I

• 2nd: S-P Reduction– Also by Ohm’s Law

Page 11: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx11

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Ladder Network cont.• Final Reduction; Find Calculation Starting

Points

VmAkV

mAkk

VI

a 30.13

0.139

121

VVIkV

mAIIIImAk

V

k

VI

bb

a

5.13

5.05.06

3

6

3

33212

• Now “Back Substitute” Using KVL, KCL, and Ohm’s Law– e.g.; From Before

Page 12: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx12

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

The Voltage Divider

tiRv

tiRv

R

R

2

1

2

1

tiRRtv

tiRtiRtv

21

21

21 RR

tvti

Ohm’s Law in KVL

Find i(t) by

Ohm’s Law

KVL ON THIS LOOP

Page 13: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx13

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Voltage Divider cont.

Now Sub i(t) Into Ohm’sLaw to Arrive at TheVoltage Divider Eqns

21

221

1 21and

RR

tvRv

RR

tvRv RR

tvR

tvRv

R

tvvR RR

2

22

1 0and0

000

21

0

00and

00

1112 21

R

tvvtv

R

tvRvR RR

Quick Chk → In Turn, Set R1, R2 to 0

KVL ON THIS LOOP

Page 14: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx14

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

V-Divider Summary

Governing Equations

)(21

11

tvRR

RvR

)(21

22

tvRR

RvR

• The Larger the R, The Larger the V-drop

Example• Gain/Volume Control

– R1 is a VariableResistor Called aPotentiometer, or “Pot” for Short

Page 15: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx15

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Volume Control Example• Case-I → R1 = 90 kΩ

2.25V93090

30

)(

2

21

22

Vkk

kV

tvRR

RV

V4.593020

30

)(

2

21

22

Vkk

kV

tvRR

RV

• Case-II → R1 = 20 kΩ 30kΩ

9 V

Page 16: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx16

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Practical Example Power Line

Also

8.25% of Pwr Generated is Lost to Line Resistance!* How to Reduce Losses?

Power Dissipated by the Line is a LOSS

Using Voltage Divider

kV 367

kV 400Ω 16.5183.5

Ω 183.5load

V MW 7345.183kA2 2

load

load2

load

P

RIP

MW 665.16kA2 2line

line2

loadsrcLOSS-line

P

RIPPP

Page 17: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx17

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Equivalent Circuit

The Equivalent Circuit Concept Can Simplify The Analysis Of Circuits• For Example, Consider A Simple

Voltage Divider

+-

1R

2R

Sv

i

21 RR

vi S

+-Sv 21 RR

i

SERIES Resistors → 1R 2Rº

21 RR

– As Far As TheCurrent IsConcerned BothCircuits AreEquivalent The One On The Right Has Only One Resistor

Page 18: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx18

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Schematic vs. Physical

Sometimes, For Practical Construction Reasons, Components That Are Electrically Connected May Be Physically Quite Apart• Each Resistor Pair Below Has the SAME

Node-to-Node Series-Equivalent Circuit

Page 19: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx19

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

COMPONENT SIDE

CONNECTOR SIDE

ILLUSTRATING THE DIFFERENCEBETWEEN PHYSICAL LAYOUT ANDELECTRICAL CONNECTIONS

PHYSICAL NODE

PHYSICAL NODE

SECTION OF 14.4 KB VOICE/DATA MODEM

CORRESPONDING POINTS

Page 20: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx20

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Generalization Multiple v-Sources

Voltage Sources In SeriesCan Be AlgebraicallyAdded To Form AnEquivalent Source• We Select The Reference

Direction To Move AlongThe Path

i(t)+-

+-

+ -

+-

+ -

1R

2R

1Rv

2Rv

1v

2v

3v

4v

5v

01542321 vvvvvvv RR

– Voltage Rises AreSubtracted From Drops

Apply KVL

Page 21: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx21

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Multiple v-Source Equivalent

Collect All SOURCES On One Side

The Equivalent Circuit:• V-source in Series

ADD directly

2154321 RR vvvvvvv

21 RReq vvv

+-eqv

1R

2R

Page 22: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx22

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Generalization Mult. Resistors

Apply KVL (rise = Σdrops)

tiRv kRik

Now by Ohm’s Law

And Define RS

Then Voltage Division For Multiple Resistors

KVL

tvR

Rv

S

kRk

• [Rk/RS] is the Divider RATIO

Page 23: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx23

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example

Find: I, Vbd, P30kΩ

Apply KVL & Ohm

VVIkV bdbd 10 KVLby So 0][2012

WWARIP 3001030)1030()10( 43242

Solving for I

Now Vbd

Finally, The 30 kΩ Resistor Power Dissipation

APPLY KVLTO THIS LOOP

bdV

Page 24: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx24

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Examples

Find: I, Vbd

• Use KVL and Ohm’s Law

APPLY KVLTO THIS LOOP

mAIkIkI 05.004012806

VVVkIV bdbd 1001240

V3

VVS 9320

201525

Find VS by V-Divider • The V20k Divider Eqn

201525

203

SVV

• Solving for VS

Page 25: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx25

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

When In Doubt → ReDraw

From The Last DiagramIt Was Not ImmediatelyObvious That This Wasa V-Divider Situation• UnTangle/Redraw at Right

VVVV

VVV

adS

Sad

9320

251520

20

251520

or

3251520

20

Page 26: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx26

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Single Node-Pair (SNP) Circuits

SNP Circuits Are Characterized By ALL the Elements Having The SAME VOLTAGE Across Them → They Are In PARALLEL

V

SNP Example

V

EXAMPLE OF SINGLE NODE-PAIR

This Element is INACTIVE

• The Inactive Element Has NO Potential Across it → SHORT Circuited

Page 27: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx27

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

UnTangling Reminder

Nodes Can Take STRANGE Shapes

LowDistortion

PowerAmplifier

NODE → A region of Constant Electrical Potential

e.g.; a group of connected WIRES is ONE Node

Page 28: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

LOW VOLTAGE POWER SUPPLY FOR CRT - PARTIAL VIEW

SOME PHYSICAL NODES

COMPONENT SIDE CONNECTION SIDE

Page 29: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

The Current Divider

Basic Circuit

The Current i(t) Enters The Top Node then Splits, or DIVIDES, into the the Currents i1(t) and i2(t)

Apply KCL at Top Node

Use Ohm’s Law to Replace Currents

APPLY KCL

Page 30: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

The Current Divider cont.

Basic Circuit

By KCL & Ohm The Current Division

Define PARALLEL Resistance

tvR

tip

1

tiRR

RRtv

21

21

pR

Page 31: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Current Divider Example

By I-Divider

For This Ckt Find: I1, I2, Vo

When in doubt… REDRAW the circuit to Better Visualize the Connections

2-Legged Divider is

more Evident

24V

kΩ802

IVo

Page 32: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Real World Example

Car Stereo and Circuit Model

Use I-Divider to Find Current thru the 4Ω Speakers

Thus the Speaker Power

Power Per Speaker by Joule

mA215 mA215

Page 33: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

[email protected] • ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx33

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Current & Power Example

Find I2 by I-Divider OR KCL• Choose KCL

For This Ckt Find: • I1, I2,

• P40k Power ABSORBED by 40 kΩ Resistor

By I-Divider

KCL

mA

mAI

21

1640120

1201

mAI

ImAI

4

016

2

12

The 40k Power by RI2

WmWP

millikmilli

mAP

k

k

76.55760

k4012

40

2

240

Page 34: BMayer@ChabotCollege.edu ENGR-43_Lec-02a_SP_VI-Divide_NodeMesh.pptx 1 Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE Licensed

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Generalization: Multi i-Sources

KCL on Top Node:

Given Single Node-Pair Ckt w/ Multiple Srcs

The Equivalent Ckt Combine Src Terms To Form Equivalent Source

KCL

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Generalization: Multi i-Sources

By Analysis and Electrical Physics of KCL

Thus CURRENT Sources in PARALLEL ADD directly • Compare to VOLTAGE Sources in SERIES

which also ADD Directly

=Oiiiii 6431

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

i-Source Example

Combine Srcs to Yield Equivalent Ckt

For This Ckt Find Vo, and the Power Supplied by the I-Srcs

Vo by Ohm’s Law V10mA5k2 Srcpo IRV

mA10 mA15k3

k6

-

+

OV

kkk

kkRp 2

36

3*6

OVpR

mA5

mW150

5mA1V10

mW100mA10V10

15

10

m

m

P

P

Use PASSIVE SIGN Convention for Power

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Generalization: Multi Resistors

KCL on Top Node:

Given Single Node-Pair Ckt w/ Multiple R’s

Ohm’s Law atEach Resistor

The EquivalentResistance & v(t)

po

N

K Kp

RtitvRR

1

11

tiR

Rti

Rtvti

tiRtv

oK

pK

KK

op

KCL

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Multi-R Example

Find Rp

For This Ckt Find i1, and the Power Supplied by the I-Source

Recall the General Current Divider Eqn

mA8

k4 k20 k5

1i

kΩ2kΩ2

1

kΩ20

415

kΩ5

1

kΩ20

1

kΩ4

11

p

p

R

R

tiR

Rti

Rtvti

tiRtv

oK

pK

KK

op

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Multi-R Example cont.

Find v for Single-Node-Pair by Ohm

Find i1, by Divider • Take Care with

Passive Sign Conv

mA8k4 k20 k5

1i

mA4mA8kΩ4

kΩ21 i

v

V16kΩ2mA8

psrc Riv

mW128mA8V16 srcsrc viP

• Note: this time For Passive Sign Convention CURRENT Direction assigned as POSITIVE Find Psrc by v•i

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Multi-R: Alternative Approach

The Ckt After the R-Combination

Start by Combining R’s NOT associated with i1

Now Have 1:1 Current Divider so

mA8

k4 k20 k5

1i20k||5k

mA8

k4 k41i

mA42

1kΩ4kΩ4

kΩ4

1

1

src

src

ii

ii

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example: Multi-R, Multi-Isrc SNP

Soln Game Plan: Convert The Problem Into A Basic CURRENT DIVIDER By Combining Sources And Resistors

Given Single Node-Pair Ckt: Find IL

1mA

mA2mA4mA1,

eqSI

Combine Sources• Assume DOWN =

POSITIVEeqSI ,

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Multi-R, Multi-Isrc SNP cont.

Next Combine Parallel Resistors

Given Single Node-Pair Ckt: Find IL

IL by 3:1 I-Divider

Then the Equivalent Circuit →

Note MINUS Sign

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

The SAME Ckt Can Look Quite Different

k3

k3

k6

k6

A

B

C

mA9

A

B

C

k6

k6

k3

k3mA9

k6

k3

k6

k3

A

CB

9mA

I1 I2

3mA

3mAmA993

12

1

II

I

I1

I2

I1

I2

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

UnTangling Utility Redrawing A Circuit May, Sometimes, Help To

Better Visualize The Electrical Connections

k3k3 k6k6

A

B

C

mA9I1

I2

• Be FAITHFUL to the Node-Connections

k6

k3

k6

k3

A

CBI1 I2

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Another Example

Alternatives for P• By vi & passive sign:

For This Ckt Find the I-SrcPower, P20

Use ||-Resistance

mA2020 VIVP

k2 k4 k3

mA20

+

V_

• By Joule and Energy Balance

220 mA20 PR RPPj

kΩ13

12

kΩ12

436

kΩ3

1

kΩ4

1

kΩ2

11

p

p

R

R

suppliedmW13

4800

mA20k1312

20

220

P

P

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Nodal Analysis (based on KCL)

A Systematic Technique To Determine Every Voltage and Current in a Circuit

The variables used to describe the circuit will be “Node Voltages”• The voltages of each node Will Be

Determined With Respect To a Pre-selected REFERENCE Node– The Reference Node is Often Referred to as

Ground (GND) Or

COMMON

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Consider Resistor Ladder

Goal: Determine All Currents & Potentials in this “Ladder” Network

Plan• Use Series/Parallel Transformation to Find I1

• Back-Substitute Using KVL, KCL, Ohm to Find Rest

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Series-Parallel Transformations Xform1

• Combine 3 Resistors at End of Network

k6

kk 6||6

3I

k12kk 12||4

][6

][3

2

3

kIV

kIV

a

b

Xform2• Combine 3 Resistors

at End of Network

Note By Ohm’s Law

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Xform cont. Xform3

• To Single-Loop Ckt

VkIV

mAk

VI

a 33

112

12

1

1

mAk

VI a 5.0

62

mAIII 5.0213

Now Back Substitute• Recall

• By KCL

k

VI

12

121

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Xform cont.

Recall Xform2

mAkVI

VkIV

b

b

375.04

Then

5.13

4

3

VkIV

mAIII

c 375.03

Law sOhm'by Then

125.0

5

435

In Summary• I1 = 1 mA

• I2 = I3 = 0.5 mA

• I4 = 0.375 mA

• I5 =0.125 mA

• Va = 3 V

• Vb = 1.5 V

• Vc = 0.375 V

Finally by KCL

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Node Analysis Perspective

ba

ba

VVV

VVV

3

3 0

KVL KVL KVL

REFERENCE

as

as

VVV

VVV

1

1 0

cb

cb

VVV

VVV

5

5 0

In General: Vx5 = Vx−V5 = Vx−0 = Vx • Then the KVL Eqns

Take Node-5 As the Ref, →V5 = 0, Always

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Node Analysis cont

If We Know Va, Vb, and Vc, Then • Can Calc V1, V2, V3 by KVL, Then

– Use Ohm’s Law to Find I1→I5

i.e., If we Know All Node Potentials, Then Can Calc All Branch Currents

Theorem: IF ALL NODE VOLTAGES WITH RESPECT TO A COMMON REFERENCE NODE ARE KNOWN, THEN ONE CAN DETERMINE ANY OTHER ELECTRICAL VARIABLE FOR THE CIRCUIT

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

ALWAYS Define Reference Node

The Statement V1 = 4V is Meaningless• UNTIL The

Designation of a REFERENCE NODE

V4

V2

12V

VVVVVV 6242112

By Convention The Ground (GND) Symbol Indicates the Reference Point• ALL Node Voltages

are Measured Relative to GND

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Strategy for Node Analysis1. Identify All Nodes And

Select A Ref. Node

2. Identify Known Node Voltages

3. at Each Node With Unknown Voltage Write A KCL Equation• e.g., (Sum Of

Current Leaving) =0

4. Replace Currents in Terms Of Node V’s

0:@ 321 IIIVa

0369

k

VV

k

V

k

VV baaaS

0:@ 543 IIIVb

0:@ 65 IIVc

0943

k

VV

k

V

k

VV cbbba

039

k

V

k

VV ccb

Yields Algebraic Eqns In The Node Voltages

Final Desired Eqn Set

REFERENCE

SV

aV

bV

cV

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Node Equation Mechanics

When Writing Node Equations• At Each Node We

Can Choose Arbitrary Directions for Currents

• Then select any form of KCL

When The Currents Are Replaced In Terms Of The Node Voltages The Node Eqns That Result Are The Same Or Equiv.

a b c

d

aV

bV

cV

dV

1R 3R

2R2I3I1I

00

0LEAVING CURRENTS

321321

R

VV

R

VV

R

VVIII cbdbba

00

0 NODE INTO CURRENTS

321321

R

VV

R

VV

R

VVIII cbdbba

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Node Eqn Mechanics cont. When Writing The Node Equations

• Use Ohm’s Law to Write The Equation Directly In Terms Of The Node Voltages

• BY Default Use KCL In The Form Sum-of-currents-leaving = 0– But The Reference Direction For The Currents

Does NOT Affect The Node Equation

a b c

d

aV

bV

cV

dV

1R 3R

2R '2I

'3I'

1I

00

0LEAVING CURRENTS

321

'3

'2

'1

R

VV

R

VV

R

VVIII bcdbab

00

0 NODE INTO CURRENTS

321

'3

'2

'1

R

VV

R

VV

R

VVIII bcdbab

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Ckts w/ Independent Sources

At Node-1• Using Resistances

00

2

21

1

1

R

vv

R

viA

Using Conductances Eliminates Tedious Division Operations

Replacing R’s w/ G’s• At Node-1

0)( 21211 vvGvGiA

• At Node-2

0OUTi

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Node Analysis of Indep Src Ckts

ReOrder Terms in Eqns for iA & iB

The Manipulation Of Systems Of Algebraic Equations Can Be Efficiently Done Using Matrix Analysis• c.f., MTH-6 or ENGR-25 (MATLAB)

The Model For The Circuit is a System Of Algebraic Equations

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example Write the KCL Eqns

• @ Node-1 We Visualize The Currents Leaving And Write the KCL Eqn

Similarly at Node-2

03

12

4

122

R

vv

R

vvi

• Could Use (i Entering Node) Just as well

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

KCL Eqn Example Write KCL At

Each Node In Terms Of Node Voltages• 3 Nodes Implies 2

KCL Equations

mA15

A

B

C

k8 k8k2 k2AV

BV

Mark the nodes (to insure that None is missing)

Select C asReference

01582

@ mAk

V

k

VA AA

01528

@ mAk

V

k

VB BB

VV

VV

B

A

24

24

Solving by Algebra, Find:

Two simple eqns in Two Unknowns

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Linear Algebra Analysis

kRRkR

mAimAi BA

6,12

4,1

Given

321

Recall R=1/G, Then Insert Numerical Values, and Change to Time Independent Notation (All CAPS)

The Math Model

The Node Eqns in Conductance Form

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Linear Algebra Analysis cont. The Numerical Model

Multiply the 1st Eqn by 4kΩ to Find V1 in Terms of V2

Back Sub into 2nd eqn

Then V2

And V1

Alternatively, Multiply Both Sides of Math Model by LCD in kΩ

k12

k6

• R.H.S. of Eqn Now in Volts

• V1, V2 CoEffs are No.s

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Linear Algebra Analysis cont. The “Clean” Eqns

2242

11223

21

21

VVV

VVV

Proceed with Gaussian Elimination• Add Eqns to Eliminate V2

VV

VV

6

122

1

1

• Back Substitute to Find V2

VV

VV

VVV

15

302

2426

2

2

2

V6

V15

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Use Matrix Algebra Recall The Math Model

From MTH-6 the Form of Matrix Multiplication

IGV • In this Case

G V I

The Matrix Eqn Soln

IGV 1• In this Case

Calculating the Matrix Inverse, G-1, is NOT Trivial• Use Matrix Manipulation

– Adjoint Matrix– Determinant Calculation

• Or use MATLAB

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

GV = I By MATLAB

Construct the Coefficient Matrix G >> G = [1/4e3 -1/6e3;

-1/6e3 1/3e3]

G =

1.0e-003 *

0.2500 -0.1667 -0.1667 0.3333

Construct the Constraint Vector, I

>> I = [1e-3; -4e-3]I = 0.0010 -0.0040

Matrix Inversion by “Left” Division for V

>> V = G\IV = -6 -15

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example Ckt w/ V-controlled Isrc

Write Node Equations

Treat Dependent Source as a Normal Current-Source• Node Eqns

Express Controlling Variable In Terms Of Node Voltages

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example Ckt w/ V-controlled Isrc

4 Eqns in 4 Unknowns• Solve Using Most

Convenient Method– Choose SUB &

GAUSSIAN ELIM

Sub for vxin •vx Isrc

Continue w/ Gaussian Elim OR UseMatrix Algebra

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Solve Using MATLAB

Define Components (m-file Node_Anal_0602.m)

]/[2

,4,2,4

,2,1

4

321

VA

mAimAikR

kRRkR

BA

R1 = 1000; R2 = 2000; R3 = 2000;R4 = 4000; %resistances in OhmsiA = 0.002; iB = 0.004; %sources in AmpsAlpha = 2; %gain of dependent source in Siemens

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Solve Using MATLAB cont

Define Coefficient Matrix

]/[2

,4,2,4

,2,1

4

321

VA

mAimAikR

kRRkR

BA

G=[(1/R1+1/R2), -1/R1, 0; % first Matrix row-1/R1,(1/R1+alpha+1/R2),-(alpha+1/R2); % 2nd row0, -1/R2,(1/R2+1/R4)] %third row.

G = 0.0015 -0.0010 0 -0.0010 2.0015 -2.0005 0 -0.0005 0.0008

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Solve Using MATLAB cont

Define Constraint Vector

]/[2

,4,2,4

,2,1

4

321

VA

mAimAikR

kRRkR

BA

I=[iA;-iA;iB]; Solve by Left/Back Division; V in voltsV=G\I % end with carriage return and get the ReadBackV = 11.9940 15.9910 15.9940

V 994.11 V 991.15V 994.15

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Loop Analysis (Based on KVL)

Loop Analysis is The 2nd Systematic Technique To Determine All Currents And Voltages In A Circuit• IT Is the DUAL To Node Analysis

– It First Determines All Currents In A Circuit And Then It Uses Ohm’s Law To Compute Voltages

• There Are Situations Where Node Analysis Is Not An Efficient Technique And Where The Number Of Equations Required By Loop Analysis Is Significantly Smaller

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Loop Analysis Illustration

Apply Node Analysis Observe

Need 3 Eqns to Find All Node Potentials; 24

Notice There is Only ONE Current Flowing Thru All Components• A Single Loop Ckt• Can Use Ohm’s Law to

Determine Voltages

Apply KVL for Clockwise Loop Starting at GND

+-

+-

1R 2R

3RV18

V12

2RV 1RV

3RV

I

3V2V1V

4V

GND

0][18][12 321 RRR VVVVV

• Have 4 Non-Ref Nodes• One SuperNode• One Node Connected to

GND Thru a V-src

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Loop Analysis Illustration cont

Now Use Ohm’s Law to Express V’s In Terms of the Loop Current

By KVL

Note:• Recalling that V=IR Allows

Writing the Ohm Eqn “by Inspection” for a Single Loop Ckt

The Loop Generates a SINGLE Eqn to Yield the Loop CURRENT

+-

+-

1R 2R

3RV18

V12

2RV 1RV

3RV

3V2V1V

4V

GND

KVL

0][18][12 321 IRVIRIRV

I

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Loops, Meshes, Loop-Currents

Each Component Is Characterized By The • VOLTAGE

ACROSS It• CURRENT THRU It

A Loop Is A Closed Path That Does Not Go Twice Over Any Node

This Circuit Has 3 Loops1. fabef

1

2 3

4

56

7

A BASIC CIRCUIT

ab c

def

1I

2I

3I

2. ebcde

3. fabcdef

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Loops, Meshes cont.

A MESH is a LOOP That Does Not Enclose Any OTHER Loop• This Ckt Has

Meshes– fabef

A Loop Current is a Fictitious or Virtual Current That is Assumed to Flow Around a Loop• The Loop Currents

of This Ckt– I1, I2, I3

Mesh Current = Current Within a Mesh Loop• e.g.: I1, I2

1

2 3

4

56

7

A BASIC CIRCUIT

ab c

def

1I

2I

3I

– ebcde

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Loops, Meshes cont.

Claim• In a Circuit, the

Current Through Any Component Can Be Expressed In Terms of the (perhaps multiple) Loop Currents

Ckt Examples

1

2 3

4

56

7

A BASIC CIRCUIT

ab c

def

1I

2I

3I32

21

31

III

III

III

cb

eb

fa

• The DIRECTION Of The Loop Currents is SIGNIFICANT

• FACT– Not ALL Loop

Currents are Required To Compute All The Currents Through Components

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Loops, Meshes cont.

For Every Circuit There is a MINIMUM Number of Loop Currents Needed to Find Every Current in the System

• Such A Collection is Called the “MINIMAL SET” (of Loop Currents)

For a Given Circuit Let• B Number of

BRANCHES• N Number of NODES

The Minimum Number of Loop Currents is

1

2 3

4

56

7

A BASIC CIRCUIT

ab c

def

1I

3I

)1( NBL

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Illustration For This Ckt

• B = 7• N = 6• L = 7-(6-1) = 2

Need Two Loop Currents• The Currents Shown

are MESH Currents– Hence They are

Independent and form a Minimal Set

Determination of Loop Currents• KVL on Left Mesh

• KVL on Right Mesh

• Using Ohm’s Law

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Illustration cont. Substituting and

Rearranging

We Obtain in MATRIX FORM the Loop Equations for This Circuit

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Mesh Practice Write The Mesh

Equations Some Bookkeeping

• 8 BRANCHES• 7 NODES• L = 8-(7-1) = 2

– Need TWO Mesh Currents

This is MESH Current Practice• Choose as the

Two Loops Meshes– i1– i2

Identify All Voltage Drops

KVL on Bottom Mesh

4Rv

1Rv

2Rv

5Rv

3Rv

02211 RSRS vvvv

033452 RSRRR vvvvv

KVL on Top Mesh

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Mesh Practice cont. Now Use Ohm’s Law To

Find The Mesh Current Equation Set

4Rv

1Rv

2Rv

5Rv

3Rv

11Ri

52Ri

42Ri

221 )( Rii

32Ri

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Develop a ShortCut Whenever An Element

Has More Than One Loop Current Flowing Through It We Calculate NET Current In The DIRECTION of TRAVEL

Draw The Mesh Currents• Orientation can be

arbitrary, But Conventionally Defined as CLOCKWISE

NOW • Write KVL For Each Mesh • Apply Ohm’s Law To Every

Resistor

+-

+ -

V 1

V 2R 1

R 2 R 3

R 4R 5

WRITE THE MESH EQUATIONS

1I

2I

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Develop a ShortCut cont At Each Loop must Follow

The Passive Sign Convention Using Loop Current REFERENCE DIRECTION• This Defines the Polarity of

the Voltage Drops

Then KVL for Meshes 1 & 2

Note The NET Currents

+-

+ -

V 1

V 2R 1

R 2 R 3

R 4R 5

WRITE THE MESH EQUATIONS

1I

2I

0)( 51221111 RIRIIRIV

0)( 21242322 RIIRIRIV

)( 21 II

)( 12 II

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Numerical Example Use Loop Analysis

to Find Io

SHORTCUT: • POLARITIES ARE

NOT NEEDED.• Apply Ohm’s Law To Each

Element As KVL Is being written

KVL for Meshes 1 & 2

Collect Like Terms & Solve

mAIVkI

kIkI

kIkI

21612

-----------------------

Add and2396

12612

22

21

21

mAIkIkI4

561212 121

mAIIIo 4

321

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Numerical Example - Alternate Alternative Loop Current

Selection KVL for Mesh1 & Loop2

Collect Like Terms & Solve In This Case one mesh

and one loop• Io = I1

– This Selection is More Efficient than 2 small meshes; Only Need to Find l1

oImAIkI

kIkI

kIkI

4

31824

-----------------

Substract and2996

312612

11

21

21

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Circuits w/ Indep. I-Sources Find Both Vo & V1

There is NO Relationship Between V1 and the 2 mA Source Current However ...• The Mesh-1 Current is

CONSTRAINED by the 2mA Source– Thus the Mesh-1 Eqn

mAI 21

In General• Current Sources That Are

NOT SHARED By Other Meshes (Or Loops) Serve To DEFINE a Mesh (Loop) Current And Reduce The Number Of Required Equations

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Circuits w/ Indep. I-Sources cont The Mesh-2 KVL Eqn

Then

ReArranging Find Equivalent Eqn

VV

mAkVmAkV

5.10

75.06224

1

1

To Obtain V1 Apply KVL To Any Closed Path That Includes V1

VkIkI 282 21 Use I1 Constraint

to Calculate I2

][2

96

4

3

8

2)2(2

2

2

VIkV

mAk

VmAkI

O

211 6240 IkVIkV

KVL

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Numerical Example

Two Mesh Currents Are Defined By Current Sources

Only Need Eqn for Mesh-3

mAImAI 24 21

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Numerical Example cont

Collect Terms for eqn-3 Finally Use KVL to Calculate VoVkIkIkI 31242 321

mAk

mAkmAkVI

4

1

12

)2(4)4(233

Then I3

KVL FOR Vo

036 3 oVVkI

V 2

33mA

4

16

VkVo

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

STOP Here if Short on Time

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Eqns by “Inspection” If The Circuit Contains

Only INDEPENDENT VOLTAGE Sources Then The Mesh Equations Can Be Written “By Inspection”• MUST HAVE All Mesh

Currents With The Same Orientation

In loop “k”• The Coefficient Of Ik Is The

Sum Of Resistances Around The Loop

The Right Hand Side Is The Algebraic Sum Of Voltage Sources Around The Loop• VoltageRise = POSITIVE

on R.H.S. of eqn

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Eqns by “Inspection” cont The Coefficient Of Ij Is

The Sum Of Resistances COMMON To Both k and j and With a NEGATIVE Sign

In This Example• Loop1: k = 1, j = 2

VkIIk 12612 21

VIkIk 396 21

• Loop2: k = 2, j = 1

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Equation Practice Loop-1

• Coefficient of I1

Similarly The Coeffs for Loop-2

• Coefficient of I2

V

kI

kkI

I

6RHS

3coeff

39coeff

0coeff

3

2

1

kkI 641

02 I

kI 63

][6 V

• Coefficient of I3

• Right Hand Side (RHS)

In Summary for Loop1

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Equation Practice cont.

In Summary for Loop-2

Applying the Method to Loop-3 Yields

Solve 3-Eqns in 3-Unknowns Using Normal Linear Algebra, or MATLAB, Techniques

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Numerical Example Use Mesh Eqns to

Determine Vo

1. Draw the Mesh Currents

2. Write the Mesh Eqns for Mesh-1 & Mesh-2

1I 2I

][32)242( 21 VkIIkkk

)36()62(2 21 VVIkkkI

Divide Both Sides of Both Eqns by 1kΩ• Units on RHS become

V/kΩ, or mA

Solve System of Eqns

VkIV

mAImAI

mAII

mAII

o 5

336then

10

113330

-----------------

Add and4982

328

2

22

21

21

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example 1. Draw the Mesh

Currents

2. Write Mesh Eqns by KVL

Or Eqns by Inspection

12k

6k

4k 4k

2k

12V

9V

WRITE THE MESH EQUATIONS

1I

2I

3I

4I

0)(61212 :1 MESH 311 IIkVkI

0)(4)(412 :2 MESH 3242 IIkIIkV

0)(4)(69 :3 MESH 2313 IIkIIkV

02)(49 :4 MESH 424 kIIIkV

VkIkI 12618 31

VkIkIkI 12448 432

VkIkIkI 91046 321

VkIkI 964 42

Calculate Currents Using Multi-Eqn Solver Tools• 4 Eqns in 4 unknowns

– Solve using Standard Linear Algebra Techniques

– Perfect for MATLABVI

R

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

All Done for Today

A DifferentType ofNODE

BRANCHES Connect to NODES

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

WhiteBoard Work

Let’s Use KCL to Derive the Req for N Parallel Resistors

Done Previously

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Bruce Mayer, PELicensed Electrical & Mechanical Engineer

[email protected]

Engineering 43

AppendixΔ↔WYE

& others

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Recall Passive Sign Convention

i

Rv 'Rv

'i

R

vvi Nm LAW SOHM'

R

vvi mN 'LAW SOHM'

iivv RR ' Thus '

If V’ Drops R←L• i’ by Passive Sign

Convention

If V Drops L→R• i by Passive Sign

Convention

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Single Loop Ckts - Background

Using KVL And KCL We Can Write Enough Equations To Analyze ANY Linear Circuit

Begin The Study Of Systematic And Efficient Ways Of Using The Fundamental KCL & KVL Circuit Laws• This Time →

Single LOOP Circuits

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

The Power of Loop Analysis Consider this

Circuit

ab c

def

1

2 3

4

56

6 branches6 nodes1 loop

ALL ELEMEN TS I N SER I ESON LY ON E CUR R EN T

Alternative Analyses• Write N-1 (5) KCL Equations• Determine Only the SINGLE Loop Current

– An Easy Choice

The Plan for Loop Analysis• Begin With The Simplest One-Loop Circuit• Extend Results To Multiple-Source

and Multiple-Resistor Circuits

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

“Inverse” Voltage Divider

The Std V-Divider1R

+- 2RSV

OV

SO VRR

RV

21

2

Inverse

Divider OS VR

RRV

2

21

kV 500 458.3kV220

220202

21

S

OS

V

VR

RRV

• Use Inverse Divider

Example Find VS

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example

Find• Vx, Vab

• P3Vx

– The Power Absorbedor Supplied By theDependent Source

Apply KVL VVVV XXX 203412

I

abV

+

-

xV3-+ V4

k4

-

+

XV

ab

SV

VVS 12=+ -

VVVV abXab 10034

VVVVV

VVV

abab

XSab

100212

0

1

2

3

1

2

3

IVP XVX3)3(

mAk

VI 1

4

4

mWmAVPXV 6][1][23)3(

Find DS Power• Passive Sign Conven.

• Ohm’s Law

• Then Pwr ABSORBED

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Example

Find: VDA, VCD, I• Apply KVL & Ohm

k30+-

+ -

V9k20

k10

A B C

DE

I

mAk

VI

k*Ik*Ik*I-

05.060

3

0103092012

VVIkV DADA 5.110*1012

12

1

2

VmAkIkVCD 5.105.030*30

12V

• Ohm’s Law

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

WhiteBoard Work

Let’s Work This Problem

1 2 0 m A 4 k 4 k

8 k

I o

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Inverse Series Parallel Combo

Find R: Simple Case• Constraints

– VR = 600 mV

– I = 3A– Only 0.1Ω R’s Available

Recall R = V/I 2.0

3

6.0

A

VR

1.01.02 availRR

Since R>Ravail, Then Need to Run in Series

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

More Complex Case Find R for Constraints

• VR = 600 mV

• I = 9A• Only 0.1Ω Resistors Available

m 67.660667.09

6.0

A

VR

R 0.1║(0.1↔0.1)

Either of These 0.1Ω R-Networks Will Work

33.33 mΩ

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Effect Of Resistor Tolerance The R Spec: 2.7k, ±10% What Are the Ranges for

Current & Power?• I = V/R

mAk

VImA

k

VImA

k

VInom 115.4

7.29.0

10367.3

7.21.1

10704.3

7.2

10maxmin

mW

k

VPmW

k

VPmW

k

VPnom 15.41

7.29.0

1067.33

7.21.1

1004.37

7.2

10 2

max

2

min

2

• P = V2/R

• For Both I & P the Tolerance.: -9.1%, +11.1% – Asymmetry Due to Inverse Dependence on R

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Final Example

Find VS

• Straight-Forward

VB

IBIS

VmAkVIkVV

mAmAmAImAI

mAk

V

k

VI

VmAkV

SBS

BS

BB

B

915.020620

15.005.01.01.0

05.0120

6

120

61.060

• Or, Recognize As Inverse V-Divider

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Final Example cont

Inverse DividerCalculation

VB

IBIS

Vk

kkV

R

kRVV

kkkR

VmAkV

BS

B

940

20406

20

40120||60

Before As61.060

||

||

||

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Wye↔ Transformations

This Circuit Has NoSeries or ParallelResistors

If We Could MakeThe Change Below Would Have Series-Parallel Case

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Y↔ Xforms cont Then the Circuit Would Appear as Below and

We Could Apply the Previous Techniques

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Wye↔ Transform Eqns

→Y (pg. 58)

→Y

←YR ac =

R 1||(

R 2↔

R 3) R

ab = Ra + R

b

321

13

321

32

321

21

RRR

RRR

RRR

RRR

RRR

RRR

c

b

a

a

accbba

c

accbba

b

accbba

R

RRRRRRR

R

RRRRRRR

R

RRRRRRR

3

2

1

←Y (pg. 58)

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

↔Y Application Example

Find IS

a

c

1R

2R

3R

Connection

Calc IS

Req

mAk

V

R

VI

kkkkkkR

eq

SS

eq

2.110

12

10)62(||936

• Use the →Y Eqns toArrive at The ReducedDiagram Below

a

c

b

b

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Another ↔Y Example

For this Ckt Find Vo

Convert this Y to Delta

Keep This Node-Pair

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Another ↔Y Example cont Notice for Y→Δ in

this Case Ra = Rb = Rc = 12 kΩ• Only need to Calc

ONE Conversion

k

k

kk

R

RRRRRRRRR

b

accbba 3612

12123321

The Xformed Ckt

4mA 36k

36k

36k

12k

12kOV

• ||-R’s Form a Current Divider

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Another ↔Y Example cont

The Ckt After ||-Reductions

4mA 36k

36 ||12 9k k k

OV

9kOI

Can Easily Calc the Current That Produces Vo

36 84

36 18 3O

kI mA mA

k k

Then Finally Vo by Ohm’s Law

89 9 24

3O OV k I k mA V

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

“BackSubbing” Example

Given I4 = 0.5 mA, Find VO

mA5.0

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Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

BackSubbing Strategy

Always ask: What More Can I Calculate?• In the Previous Example Using Ohm’s Law,

KVL, KCL, S-P Combinations - Calc:

2

432

3

4

2

3

6

IkV

IIIk

VI

IkV

a

b

b

11

521

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