bharatiya vidya bhavan’s sardar patel institute of …sardar patel institute of technology...
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Bharatiya Vidya Bhavan’s
Sardar Patel Institute of Technology (Autonomous Institute Affiliated to University of Mumbai)
Bachelor of Engineering/Technology (B.E./B.Tech)
in
Electronics Engineering
Third Year Engineering (Sem. V and Sem. VI)
Effective from Academic Year 2017 -18
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Preamble:
Concept of academic autonomy is based on the argument that Institutions
can undertake the work expected of them by all stakeholders such as
Students , Parents , University , Industry , Society in general, only if they
have freedom of choice and action.
We at S.P.I.T. would like to believe that this freedom of choice and
action as far as academics is concerned will make us more Proactive in
our offerings.
An academic autonomy is as good as its Curricula and execution of it is as well as its faculty.
S.P.I.T. is confident of succeeding on both the fronts.
In the first offering we have tried to pro-actively bridge the ever discussed “Industry-academic gap”
by way of our SCOPE program. The issue about sensitizing students to social needs is being
addressed by special activity based courses. Liberal arts courses have been introduced to enhance
functionality of both sides of brain. In all this the professional core has not been overlooked. Thus
the curricula are designed to achieve multi dimensional outcomes.
The evaluation mechanism is tuned for assessing the attainment of the designed outcomes and is
designed as a fair mechanism.
As our learning cycle begins from July 2017, I wish to place on record that entire S.P.I.T. staff and
faculty will work with singular focus and commitment towards the success of this endeavour.
Dr. Prachi Gharpure
Principal, S.P.I.T.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
From the Desk of Dean Academics and Head of Electronics Engg. Dept.
Greetings and congratulations to all the students, teaching and supporting
staff of Sardar Patel Institute of Technology for getting autonomous status to
the institute from the year 2017-18. We look towards autonomy as a great
opportunity to design and implement curriculum sensitive to needs of Indian
Society and Industries.
In the proposed curriculum we have made an attempt to provide opportunity
for students to develop themselves as competent engineering graduates with
knowledge, skill and ethical behavior required for global career. Curriculum
is designed to provide multiple learning opportunities for students to acquire
and demonstrate competencies for rewarding careers. The curriculum model is outcome based that
focuses on learning by doing. This is achieved through activity based learning, minor projects,
problem solving and innovative styles of pedagogy. Various steps are taken to transform teaching-
learning process to make learning a joyful experience for students. Special laboratory based courses
are introduced to give more practical exposure to the students.
To create socially responsible citizen curriculum offers courses like Constitution of India,
Environmental Studies and Human Health Systems Approach. Also various activity based learning
modules like „Building Automation, Fire Safety and Electronic Security‟, „Occupational Safety &
Legal Studies for Engineers‟, „Technical Presentation Skills‟, „Technical Paper and Patent Drafting‟,
„Engineering Solution for Environmental Problems‟ and „Financial Planning, Taxation Policies and
Investment‟ are introduced. For overall development of the learner, various elective courses like
Yoga Vidya, Music Appreciation, Dramatics, Industrial and Organizational Psychology, Law for
Engineers, French Language, German Language etc. are introduced. To encourage interdisciplinary
studies institute level Open Elective courses are offered.
One of the special feature of this curriculum is Skill development programme called SCOPE (Skill
Certification for Outcome-Based Professional Education) planned to enhance employability,
innovation and research culture in the institute. Every department is offering six domain specific
tracks, each track containing six courses. Student will have an opportunity to enroll for more than
140 courses in any of the department of his choice. Some of the courses under SCOPE will be
delivered in co-ordination with industries.
We believe that this curriculum will raise the bar of academic standards with the active involvement
and cooperation from students, academic and administrative units. Faculty of S.P.I.T. deserves a
special appreciation for their relentless efforts in designing curriculum and assessment instruments
which will bring transformation in the quality and transparency in assessment of learners.
Looking forward for your active cooperation and constructive feedback to create vibrant and joyful
learning environment at Sardar Patel Institute of Technology.
Dr. Surendra Singh Rathod
Professor and Dean Academics
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Scheme for B.E./B.Tech Electronics Engineering (SEM V)
SEM V
Course
Code
Course Name Teaching Scheme
(Hrs/week)
Credits
L T P Total
EXC501 Microcontrollers and Applications 4 -- -- 4
EXC502 Design with Linear Integrated Circuits 4 -- -- 4
EXC503 Electromagnetic Engineering 4 -- -- 4
EXC504 Signals and Systems 4 1 -- 5
EXC505 Digital Communication 4 -- -- 4
EXS506 Business Communication and Ethics -- -- *4 2
EXL501 Microcontrollers and Applications
Laboratory
-- -- 2 1
EXL502 Design with Linear Integrated Circuits
Laboratory
-- -- 2 1
EXL503 Digital Communication Laboratory -- -- 2 1
EXL504 Mini Project I
-- -- 2 2
Total 20 -- 10+02 28
*Common to all branches
Scheme for B.E./B.Tech Electronics Engineering (SEM VI)
SEM VI
Course
Code
Course Name Teaching Scheme
(Hrs/week)
Credits
L T P Total
EXC601 Basic VLSI Design 4 -- -- 4
EXC602 Advanced Instrumentation Systems 4 -- -- 4
EXC603 Computer Organization 4 -- -- 4
EXC604 Power Electronics I 4 -- -- 4
EXC605 Digital Signal Processing and Processors 4 -- -- 4
EXC606 Modern Information Technology for
Management
2 -- -- 2
EXL601 VLSI Design Laboratory -- -- 2 1
EXL602 Digital Signal Processing and Processors
Laboratory
-- -- 2 1
EXL603 Advanced Instrumentation and Power
Electronics Laboratory
-- -- 2 1
EXL604 Mini Project II -- -- 2 2
Total 22 -- 8 27
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Semester V
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC501 Microcontrollers and Applications
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes EXC303: Digital Circuits and Design
EXC402: Discrete Electronic Circuits
EXC403: Microprocessor and Peripherals
Aftersu ccessful completion of the course, student will be able to
Course
Outcomes
CO1 Discuss architecture and pin configuration of ARM7TDMI and Intel 8051.
CO2 Apply the knowledge of instruction set of 8051 microcontroller and
ARM7TDMI to implement Assembly Language Programs
CO3 Design various applications using 8051 microcontroller and ARM7TDMI.
CO4 Develop C program applications in LPC2148
Module
No.
Unit
No. Topics Ref. Hrs.
1 8051 Microcontroller Architecture 06
1.1 8051 architectural features and its purpose, advantages 1,2
2 8051 Microcontroller Assembly Language Programming 12
2.1 Bit, byte, word processing, format conversion between HEX, BCD,
ASCII 1,2
2.2 Data movement / copy operations, Block transfer of data, data swap /
exchange 1,2
2.3 Arithmetic, logical, and stack operation, loops, condition evaluation,
decision making based on flags 1,2
2.4 Call, return, jumps, serial and parallel port handling, timer / counter
handling, interrupts and its handling 1,2
3 8051 Microcontroller Hardware and Software Applications
Objectives: Interpreting logical, electrical, timing specification,
requirement of following interfaces and interfacing and
accessing/controlling using assembly programs
10
3.1 External memory interfacing and memory access cycles, polled I/O,
Interrupt I/O 1,2
3.2 Serial communication using RS232: Pulse width modulation and DC
motor interfacing, electromagnetic relay, stepper motor interfacing,
switch interfacing, SCR firing circuit (with electrical isolation)
1,2
3.3 Parallel input/output interfacing: 7-segment LED display
interfacing, 8-bit parallel DAC interfacing, 8-bit parallel ADC
interfacing, 4x4 matrix keyboard interfacing, temperature (resistive,
diode based) sensor, optical (photodiode/ phototransistor, LDR)
1,2
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
sensors interfacing, 16x2 generic alphanumeric LCD interfacing
4 ARM7TDMI(ARMv4T) Architectural 10
4.1 Features, purpose, and advantages 4,5
4.2 Processor operating states, memory formats, data types, operating
modes, registers 4,5
4.3 The program status registers, exceptions, interrupt latencies, and
pipelined architecture advantage 4,5
5 ARM7TDMI(ARMv4T) Assembly Language Programming 10
5.1 8,16,32 bit and floating point numbers processing, format conversion
between Hex, BCD, ASCII, data movement/copy operations, block
transfer of data, data swap/exchange
4,5
5.2 Arithmetic, logical, and stack operation, loops, condition evaluation
and decision making based on flags, control transfers (Call, Return,
Jumps), processor state changing (ARM THUMB)
4,5
5.3 Exceptions, interrupts and its handling 4,5
6 LPC2148 based C Program Applications 6 4
6.1 Applications for On-chip ADC, DAC, parallel port, and serial port
accessing
Total 52
References:
[1] Kenneth J. Ayala, “The 8051 Microcontroller architecture, Programming and Applications” Penram
international, Cengage Learning India Pvt. Ltd, Second Edition.
[2] M. A. Mazadi and J. C. Mazadi, “The 8051 Microcontroller and Embedded Systems”, Pearson
Education, Second Edition.
[3] V. Udayashankara, “8051 Microcontroller Hardware, Software and Application”, McGraw-Hill.
[4] David Seal, “ARM Architecture”, Reference Manual (Second Edition)
[5] William Hohl, “ARM Assembly Language: Fundamentals and Techniques”, Second Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC502 Design With Linear Integrated
Circuits
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes FEC105: Basic Electrical & Electronics Engineering
EXC302: Electronic Devices
EXC303: Digital Circuits and Design
EXC402: Discrete Electronic Circuits
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Discuss fundamentals of IC operational amplifier
CO2 Analyze the various applications and circuits based on particular linear
integrated circuit
CO3 Design linear application with the use of operational amplifier IC
CO4 Design non-linear application with the use of operational amplifier IC
CO5 Design an application with data converters, voltage regulator ICs and special
purpose ICs
Module
No.
Unit
No. Topics Ref. Hrs.
1 Fundamentals of Operational Amplifier 06
1.1 Ideal Op Amp, characteristics of op-amp, op-amp parameters, high
frequency effects on op-amp gain and phase, slew rate limitation,
practical determination of op-amp parameters, single supply versus dual
supply op-amp
1,3,5
1.2 Operational amplifier open loop and closed loop configurations,
Inverting and non-inverting amplifier 1,3,5
2 Applications of Operational Amplifier 12
2.1 Amplifiers: Adder, subtractor, integrator, differentiator, current
amplifier, difference amplifier, instrumentation amplifier and application
of Op-Amp in transducer measurement system with detail design
procedure, single supply DC biasing techniques for inverting, non-
inverting and differential amplifiers
1,3,5
2.2 Converters: Current to voltage and voltage to current converters,
generalized impedance converter 1,3,5
2.3 Active Filters: First order filters, second order active finite and infinite
gain low pass, high pass, band pass and band reject filters 1
2.4 Sine Wave Oscillators: RC phase shift oscillator, Wien bridge oscillator,
Quadrature oscillator
4
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
3 Non-Linear Applications of Operational Amplifier 12
3.1 Comparators: Inverting comparator, non-inverting comparator, zero
crossing detector, window detector and level detector 1,3,5
3.2 Schmitt Triggers: Inverting Schmitt trigger, non-inverting Schmitt
trigger with adjustable threshold levels 1,3,5
3.3 Waveform Generators: Square wave and triangular wave generator
with duty cycle modulation 4
3.4 Precision Rectifiers: Half and full wave precision rectifiers and their
applications 1,3,5
3.5 Peak detectors, sample and hold circuits, voltage to frequency converter,
frequency to voltage converter, logarithmic converters and antilog
converters
1,3,5
4 Data Converters 06
4.1 Performance parameters of ADC, single ramp ADC, ADC using DAC,
dual slope ADC, successive approximation ADC, flash ADC,
ADC0808/0809 and its interfacing
1,3,5
4.2 Performance parameters of DAC, binary weighted register DAC, R/2R
ladder DAC, inverted R/2R ladder DAC, DAC0808 and its interfacing 1,3,5
5 Special Purpose Integrated Circuits 08
5.1 Functional block diagram, working, design and applications of Timer 555 3,5
5.2 Functional block diagram, working and applications of VCO 566, PLL
565, multiplier 534, waveform generator XR 2206, power amplifier
LM380
3,5
6 Voltage Regulators 08
6.1 Functional block diagram, working and design of three terminal fixed
(78XX, 79XX series) and three terminal adjustable (LM 317, LM 337)
voltage regulators
1,3,5
6.2 Functional block diagram, working and design of general purpose 723
(LVLC, LVHC, HVLC and HVHC) with current limit and current fold-
back protection, Switching regulator topologies, functional block
diagram and working of LT1070 monolithic switching regulator
1,3,5
Total 52
References:
[1] Sergio Franco, “Design with operational amplifiers and analog integrated circuits”, Tata McGraw
Hill, Third Edition.
[2] William D. Stanley, “Operational Amplifiers with Linear Integrated Circuits”, Pearson, Forth Edition
[3] D. Roy Choudhury and S. B. Jain, “Linear Integrated Circuits”, New Age International Publishers,
Forth Edition.
[4] David A. Bell, “Operation Amplifiers and Linear Integrated Circuits”, Oxford University Press,
Indian Edition.
[5] R. A. Gayakwad, “Op-Amps and Linear Integrated Circuits”, Pearson Prentice Hall, Fourth Edition.
[6] R. P. Jain, “Modern Digital Electronics,” Tata McGraw Hill, Third Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC503
Electromagnetic Engineering
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes Knowledge of Vector Calculus, Cylindrical and Spherical
coordinate systems
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Apply basic laws of electromagnetic and Maxwell‟s equations
CO2 Illustrate the behavior of EM waves and travelling of waves in free space as
well as media.
CO3 Solve problems related to the propagation of electromagnetic waves
CO4 Discuss the types of antennas and their parameters
CO5 Discuss types of radio wave propagation
Module
No.
Unit
No. Topics Ref. Hrs.
1 Basic Laws of Electromagnetic and Maxwell’s Equations 10
1.1 Coulomb‟ s law, Gauss‟ s law, Bio-Savart‟ s law, Ampere‟ s law,
Poisson‟ s and Laplace equations 2
1.2 Boundary conditions for static electric and magnetic fields 2
1.3 Maxwell’s Equations: Integral and differential form for static and
time varying fields and its interpretations 2
2 Uniform Plane Wave Equation and Power Balance 10
2.1 Wave equation: Derivation and its solution in cartesian co-ordinates 2
2.2 Solution of wave equations: Partially conducting media, perfect
dielectrics and good conductors, concept of skin depth 2
2.3 Electromagnetic Power: Poynting Vector and power flow in free
space and in dielectric, conducting media 2
2.4 Polarization of wave: Linear, Circular and Elliptical 2
2.5 Propagation in different media: Behavior of waves for normal and
oblique incidence in dielectrics and conducting media, propagation in
dispersive media
2
3 Radiation Field and Computation 12
3.1 Concept of vector potential, fields associated with Hertzian dipole 3
3.2 Radiation resistance of elementary dipole with linear current
distribution, radiation from half-wave dipole and quarter-wave
monopole
4
3.3 Finite Difference Method (FDM): Neumann type and mixed
boundary conditions, Iterative solution of finite difference equations,
solutions using band matrix method
4
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
3.4 Finite Element Method (FEM): triangular mesh configuration, finite
element discretization, element governing equations, assembling all
equations and solving resulting equations
4
3.5 Method of Moment (MOM):Field calculations of conducting wire,
parallel conducting wires 4
4 Fundamentals of Antenna 10
4.1 Antenna Parameters: Radiation intensity, directive gain, directivity,
power gain, beam width, band width, gain and radiation resistance of
current element
3
4.2 Half-wave dipole and folded dipole: Reciprocity principle, effective
length and effective area 3
4.3 Radiation from small loop and its radiation resistance, Helical antenna 3
5 Radio Wave Propagation 10
5.1 Types of wave propagation: Ground, space, and surface wave
propagation, tilt and surface waves, impact of imperfect earth and
earth‟ s behavior at different frequencies
1,2
5.2 Space wave propagation: Effect of imperfection of earth, curvature of
earth, effect of interference zone, shadowing effect of hills and
building, atmospheric absorption, Super-refraction, scattering
phenomena, troposphere propagation and fading
1,2
5.3 Sky Wave Propagation: Reflection and refraction of waves,
ionosphere and earth magnetic field effect 1,2
5.4 Measures of ionosphere propagation: Critical frequency, angle of
incidence, maximum unstable frequency, skip distance, virtual height,
variations in ionosphere
1,2
Total 52
References:
[1] W.H. Hayt, and J.A. Buck, “Engineering Electromagnetics”, McGraw Hill Publications, Seventh
Edition.
[2] R.K. Shevgaonkar, “Electromagnetic Waves”, TATA McGraw Hill Companies, Third Edition.
[3] Edward C. Jordan and Keth G. Balmin, “Electromagnetic Waves and Radiating Systems”, Pearson
Publications, Second Edition.
[4] Matthew N.D. Sadiku, “Principles of Electromagnetics”, Oxford International Student Forth Edition.
[5] J.D. Kraus, R.J. Marhefka, and A.S. Khan, “Antennas & Wave Propagation”, McGraw Hill
Publications, Forth Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC504
Signals and Systems
4 1 -- 4 1 -- 5
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes --
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Classify continuous time & discrete time signals and systems
CO2 Apply time and frequency domain analysis techniques to different signals
CO3 Analyze continuous time system using Laplace Transform
CO4 Analyze discrete time system using Z- Transform
Module
No.
Unit
No. Topics Ref. Hrs.
1 Continuous And Discrete Time Signals And Systems 08
1.1 Mathematical representation, classification of CT and DT signals,
arithmetic operations on the signals, transformation of independent
variable
1,4
1.2 Mathematical representation, classification of CT and DT systems 1,4,5
1.3 Sampling and reconstruction, aliasing effect
2 Time Domain Analysis Of Continuous and Discrete Signals And
Systems 06
2.1 Properties of LTI systems, impulse and step response. 3,4,5
2.2 Use of convolution integral and convolution sum for analysis of LTI
systems. 3,4,5
2.3 Properties of convolution integral/sum. 3,4,5
3 Frequency Domain Analysis of Continuous Time System Using
Laplace Transform
08
3.1 Need of Laplace transform, review of Laplace transform, properties,
inverse of Laplace transform, concept of ROC, poles and zeros 1,4
3.2 Unilateral Laplace transform 1,4
3.3 Analysis and characterization of LTI system using Laplace transform:
impulse and step response, causality, stability, stability of causal
system
1,4
3.4 Block diagram representation 1
4 Frequency Domain Analysis of Discrete Time System Using Z
Transform
14
4.1 Need of Z transform, definition, properties of unilateral and bilateral Z
Transform, mapping with s plane, relationship with Laplace transform 3,5
4.2 Z transform of standard signals, ROC, poles and zeros of transfer
function, inverse Z transform 3,5
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
4.3 Analysis and characterization of LTI system using Z transform:
impulse and step response, causality, stability, stability of causal
system
3,5
4.4 Block diagram representation, system realization
5 Frequency Domain Analysis of Continuous and Discrete Signals 12
5.1 Review of Fourier series, Discrete time Fourier series, its properties 4
5.2 Fourier transform, properties of Fourier transform, relationship with
Laplace and Z transform 4
5.3 Discrete time Fourier transform, properties, frequency sampling,
Discrete Fourier transform, properties 4,5
6 Correlation and Spectral Density 04
6.1 Comparison of convolution and correlation, Auto and cross correlation,
energy/power spectral density 1
6.2 Relation of ESD, PSD with auto-correlation 1
6.3 Relationship between ESD/PSD of input and output of LTI system 1
Total 52
References:
[1] Alan V. Oppenheim, Alan S. Willsky, and S. Hamid Nawab, “Signals and Systems”, Second Edition,
PHI learning.
[2] Tarun Kumar Rawat, “Signals and Systems”, Oxford University Press, Edition 2014.
[3] John Proakis and Dimitris Monolakis, “Digital Signal Processing”, Pearson Publication, Forth
Edition.
[4] A. Nagoor Kani, “Signals & Systems”, McGraw Hill Education (India) Pvt Ltd, Fourteenth Edition.
[5] S.Salivahanan, A Vallavaraj, C Gnanapriya, “Digital Signal Processing”, Tata McGraw Hill, First Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC505
Digital Communication
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes Knowledge of Probability Theory and Signals and Systems
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Determine nature of random signal and its statistical characteristics
CO2 Identify source and channel coding techniques
CO3 Explain techniques to enhanced transmission efficiency of the system
CO4 Describe digital modulation formats and its properties
CO5 Demonstrate the use of error control and spread spectrum techniques in wired
and wireless communication.
Module
No.
Unit
No. Topics Ref. Hrs.
1 Application of Probability Theory in Communication Systems 07
1.1 Introduction to digital communication system, significance of AWGN
channel, pulse dispersion in the channel 1,2,3
1.2 Introduction to probability and sample space , Baye‟ s rule,
conditional probability and statistical independence, random variables,
probability functions, mean and variance of random variables and sum
of random variables
1.3 Probability Models: Binomial Distribution, Poisson Distribution,
Gaussian PDF, Rayleigh PDF and Rician PDF, Central-Limit Theorem
1.4 Binary Synchronous Channel(BSC), development of optimal receiver
2 Information Theory and Source Coding 05
2.1 Measure of Information, Entropy, Information rate, Channel capacity 1,2,3
2.2 Capacity of a Gaussian channel, bandwidth, S/N trade-off, Shannon„s
source coding theorem
2.3 Coding to increase the average information per bit, Huffman coding,
Lempel Ziv coding, examples and applications of source coding
3 Pulse Shaping for Optimum Transmission 08
3.1 Line codes and their desirable properties, PSD of digital data. 1,2,3
3.2 Baseband PAM transmission: Concept of inter channel and inter
symbol interference, eye pattern
3.3 Concept of equalizer to overcome ISI, Nyquist‟ s Criterion for
distortion less transmission
3.4 Duo-binary encoding and modified duo-binary encoding
4 Digital Modulation Techniques 15
4.1 Digital modulation formats, coherent and non- coherent reception 1,2,3
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
4.2 Binary modulation techniques: BPSK, BFSK , BASK
4.3 M-ary Modulation techniques: QPSK, M-ary PSK, MSK , M-ary
FSK, M-ary QAM, Differential encoded BPSK & D-QPSK
4.4 Optimal Reception of Digital Data: A baseband signal receiver and
its Probability of error
4.5 Optimum receiver and its transfer function, matched filter and its
properties
5 Error Control Codes 12
5.1 Need for channel encoding, discrete memory-less channel ,
redundancy, code rate ,code efficiency and hamming bound 1,2,3
5.2 Linear block codes, cyclic codes, block interleaving
5.3 Convolution codes: State diagram, code tree, trellis diagram
5.4 Decoding of Convolutional codes using Viterbi algorithm
6 Spread Spectrum Modulation 05
6.1 Need for spread spectrum modulation, pseudo noise sequence
generation, direct-sequence spread spectrum (DSSS) 1,2,5
6.2 Processing gain and jamming margin, frequency–hop spread spectrum
(FHSS)
6.3 Application of spread spectrum : DS-CDMA
Total 52
References:
[1] Simon Haykin, “Communication System”, John Wiley And Sons, Fourth Edition
[2] Taub Schilling And Saha, “Principles Of Communication Systems”, Tata Mc-Graw Hill,
Third Edition
[3] Amitabha Bhattacharya, “Digital Communication”, Tata Mcgraw Hill, Edition 2006
[4] Lan A. Glover and Peter M. Grant, “Digital Communications”, Pearson, Second Edition.
[5] John G. Proakis, “Digital Communications”, Mcgraw Hill, Fifth Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXS 506
Business Communication and
Ethics
-- -- 4 -- -- 2 2
Examination Scheme
ISE Practical Oral Total
50 -- -- 50
Pre-requisite Course Codes FEC206: Communication Skills
After successful completion of the course, student will be able to
Course
Outcomes
CO1 communicate effectively in both verbal and written form and demonstrate
knowledge of professional and ethical responsibilities
CO2 Participate and succeed in Campus placements and competitive examinations like GATE, CET.
CO3 Possess entrepreneurial approach and ability for life-long learning.
CO4 Have education necessary for understanding the impact of engineering solutions on Society and demonstrate awareness of contemporary issues.
Module
No.
Unit
No. Topics Ref. Hrs.
1 Report Writing 08
1.1 Objectives of report writing
1.2 Language and Style in a report
1.3 Types of reports
1.4 Formats of reports: Memo, letter, project and survey based
2 Technical Proposals 02
2.1 Objective of technical proposals
2.2 Parts of proposal
3 Introduction to Interpersonal Skills 08
3.1 Emotional Intelligence
3.2 Leadership
3.3 Team Building
3.4 Assertiveness
3.5 Conflict Resolution
3.6 Negotiation Skills
3.7 Motivation
3.8 Time Management
4 Meetings and Documentation 02
4.1 Strategies for conducting effective meetings
4.2 Notice
4.3 Agenda
4.4 Minutes of the meeting
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
5 Introduction to Corporate Ethics and etiquettes 02
5.1 Business Meeting etiquettes, Interview etiquettes, Professional and
work etiquettes, Social skills
5.2 Greetings and Art of Conversation
5.3 Dressing and Grooming
5.4 Dinning etiquette
5.5 Ethical codes of conduct in business and corporate activities (Personal
ethics, conflicting values, choosing a moral response, the process of
making ethical decisions)
6 Employment Skills 06
6.1 Cover letter
6.2 Resume
6.3 Group Discussion
6.4 Presentation Skills
6.5 Interview Skills
Total 26
References:
[1] Fred Luthans, “Organizational Behavior”, Mc Graw Hill, First edition
[2] Huckin and Olsen, “Technical Writing and Professional Communication”, Mc Graw Hill
[3] Wallace and Masters, “Personal Development for Life and Work”, Thomson Learning, Twelfth
edition
[4] Heta Murphy, “Effective Business Communication” , Mc Graw Hill, edition
[5] B N Ghosh, “Managing Soft Skills for Personality Development”, Tata McGraw
[6] Bell . Smith, “Management Communication” Wiley India Edition,Third edition.
[7] Dr.K.Alex , “Soft Skills”, S Chand and Company
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL501
Microcontrollers and
Applications Laboratory
-- -- 2 -- -- 1 1
Examination Scheme
ISE ESE Total
Practical Oral
40 10 10 60
Pre-requisite Course Codes EXC501 (Microcontrollers and Applications)
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Compose assembly language and C programs for 8051 microcontroller based
system
CO2 Interface various peripherals with 8051 microcontroller
CO3 Prepare initialization procedure for internal peripherals of ARM7 TDMI-S
(LPC2148)
CO4 Develop device drivers for ARM7 using datasheet
CO5 Practice professional design techniques for microcontroller based system
design
Exp. No. Experiment Details Ref. Marks
1 Interfacing of LED and Switch 1 5
2 Print characters on LCD 1 5
3 WAP for transfering block of data/ Arrange data in ascending order 1 5
4 Mixed language program form timer 1 5
5 Interfacing of Serial port 1 5
6 Initialization of ARM7 and blink LED using ARM 7 LPC2148 2 5
7 Transmit and receive data using UART in LPC2148 2 5
8 To transfer block of data from one location to another in ARM7 2,3 5
Total Marks 40
References:
[1] M. A. Mazadi and J. C. Mazadi, “The 8051 Microcontroller and Embedded Systems”, Pearson
Education, Asia
[2] ARM User Manual
[3] www.arm.com
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL502
Design with Linear Integrated
Circuits Laboratory
-- -- 2 -- -- 1 1
Examination Scheme ISE ESE Total
Practical Oral
40 10 10 60
Pre-requisite Course Codes EXC502 (Design with Linear Integrated Circuits)
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Validate electrical characteristics of given ICs.
CO2 Design, debug and test electronic circuit using ICs like op-amp 741, IC 555,
IC 566, IC723, etc.
CO3 Validate circuits by simulation using modern tools available like ngspice and
LTspice, TINA, Multisim.
CO4 Design, develop and troubleshoot the complete electronic system for typical
applications like speed control of DC Motor, Temperature control,
development of signal conditioning circuits for various transducers.
CO5 Infer the data sheet of electronic components/ICs
Exp. No. Experiment Details Ref. Marks
1 To measure (a) Input bias current, (b) Input offset current,(c)Input
offset voltage & (d) Slew rate of the given Op-Amp IC
1,2,3 5
2 Design, Implement and analyze Schmitt Trigger Circuit using given
Op-Amp IC and also Square Wave, Triangular Wave Generator
Circuit using given Op-Amp IC.
1,2,3 5
3 Design, Implement and analyze Monostable Multivibrator Circuit
using given Timer and its operation as divide by N frequency.
1,2,3 5
4 Design, Implement and analyze Voltage Regulator Circuit using
given Voltage Regulator IC.
1,2,3 5
5 Design, Implement and analyze given application using given ICs
like Op-Amp, DAC, Multiplier, and VCO with Analog System
Trainer Kit - TEXAS INSTRUMENTS.
1,2,8 5
6 To measure the performance specifications of given ADC, DAC
ICs and interface these ICs to Microcontroller to perform ADC and
DAC conversions.
1,2,3 5
7 Design, Simulate and analyze the given problem statement (circuit)
using Circuit Simulation S/W preferably NI-Multisim
/TINA/SPICE. (Please refer to the extra sheet attached).
1,2,4,5,6 5
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
8 Score in Quiz on TSE-2017 7 5
Total Marks 40
References: [1] D. Roy Choudhury and S. B. Jain, “Linear Integrated Circuits”, New Age International Publishers,
4th Edition.
[2] David A. Bell, “Operation Amplifiers and Linear Integrated Circuits”, Oxford University Press,
Indian Edition.
[3] DLIC Laboratory Manual
[4] www.ti.com
[5] www.ni.com
[6] www.pspice.com
[7] TSE-2017 Brochure
[8] Analog System Trainer Manual by Texas Instruments.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL503 Digital Communication Laboratory
-- -- 2 -- -- 1 1
Examination Scheme ISE ESE Total
Practical Oral
40 -- 20 60
Pre-requisite Course Codes EXC503 (Digital Communication)
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Observe the characteristics of waveforms using digital modulation
techniques
CO2 Validate line coding techniques experimentally
CO3 Demonstrate the significance of channel and source coding techniques in
digital communication systems
CO4 Observe the characteristics of spread spectrum techniques using scilab
CO5 Accept the attributes of plagiarism pertaining to creating the screencast of
lab experiment
CO6 Show audio power point presentation on technological drift in
communication
Exp. No. Experiment Details Ref. Marks
1 To design and build a simple Analog-to-Digital (ADC) using OpAmp
circuits and resistors.
1 5
2 To observe the waveform of ASK signal. 1,2 5
3 To convert NRZ coded data to NRZ -RZ codes. 1 5
4 To understand the working and implementation of LBC using gates 1,2 5
5 To understand the working and implementation of Hamming codes
using gates.
1,2 5
6 To analyze the receiver performance by using the eye diagram. 1,2 5
7 To find out the entropy of binary memory less source using Scilab. 2 5
8 To find out the entropy, average length and variance of Huffman
coding using Scilab.
1,2 5
Total Marks 40
References: [1] Simon Haykin, “Communication System”, John Wiley And Sons ,4th Ed
[2] Taub Schilling and Saha, “Principles Of Communication Systems”, Tata Mc-Graw Hill, Third Ed
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL504 Mini Project-I
-- -- 2 -- -- 2 2
Examination Scheme
ISE Practical Oral Total
Phase-I:10
Phase-II:10
Phase-III:10
Phase-IV:20
-- 50 100
ISE:
The main intention of Mini Project is to make student enable to apply the knowledge and skills learned
out of courses studied to solve/implement predefined practical problem. The students undergo various
Laboratory/ tutorial/ simulation laboratory/work shop courses in which they do experimentation based on
the curriculum requirement. The Mini Project may be beyond the scope of curriculum of courses taken or
may be based on the courses but thrust should be on
• Learning additional skills
• Development of ability to define and design the problem and lead to its accomplishment with proper
planning
• Learn the behavioral science by working in a group
The group may be maximum four (04) students. Each group will be assigned one faculty as a supervisor.
The college should keep proper assessment record of progress of the project and at the end of the
semester it should be assessed for awarding TW marks. The TW may be examined by approved internal
faculty appointed by the head of the institute. The final examination will be based on demonstration in
front of internal and external examiner. In the examination each individual student should be assessed for
his/her contribution, understanding and knowledge gained about the task completed. The students may
use this opportunity to learn different computational techniques as well as some model development. This
they can achieve by making proper selection of Mini Projects.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Semester VI
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC601
Basic VLSI Design
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes EXC302: Electronic Devices
EXC303: Digital Circuits and Design
EXC402: Discrete Electronic Circuits
EXC502: Design With Linear Integrated Circuits
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Distinguish between technologies and MOSFET models
CO2 Analyze MOSFET based circuits like inverters, logic circuits and
semiconductor memories
CO3 Design MOSFET based logic circuits with different design styles
CO4 Design data path for adders, multipliers and shifters
CO5 Discuss issues in VLSI Clocking and System Design
Module
No.
Unit
No. Topics Ref. Hrs.
1 Technology Trend 06
1.1 Technology Comparison: Comparison of BJT, NMOS and CMOS
technology 1
1.2 MOSFET Scaling: Types of scaling, Level 1 and Level 2 MOSFET
Models, MOSFET capacitances 1
2 MOSFET Inverters 10
2.1 Circuit Analysis: Static and dynamic analysis (Noise, propagation
delay and power dissipation) of resistive load and CMOS inverter,
comparison of all types of MOS inverters, design of CMOS inverters,
CMOS Latch-up
1
2.2 Logic Circuit Design: Analysis and design of 2-I/P NAND and NOR
using equivalent CMOS inverter 1
3 MOS Circuit Design Styles 10
3.1 Design Styles: Static CMOS, pass transistor logic, transmission gate,
Pseudo NMOS, Domino, NORA, Zipper, C2MOS, sizing using logical
effort
1,7
3.2 Circuit Realization: SR Latch, JK FF, D FF, 1 Bit Shift Register,
MUX, decoder using above design styles 1,7
4 Semiconductor Memories 08
4.1 SRAM: ROM Array, SRAM (operation, design strategy, leakage
currents, read/write circuits), DRAM (Operation 3T, 1T, operation
modes, leakage currents, refresh operation, Input-Output circuits),
1,2
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Flash (mechanism, NOR flash, NAND flash)
4.2 Peripheral Circuits: Sense amplifier, decoder 1,2,3
5 Data Path Design 08
5.1 Adder: Bit adder circuits, ripple carry adder, CLA adder 7
5.2 Multipliers and shifter: Partial-product generation, partial-product
accumulation, final addition, barrel shifter 7
6 VLSI Clocking and System Design 10
6.1 Clocking: CMOS clocking styles, Clock generation, stabilization and
distribution 2,5,6
6.2 Low Power CMOS Circuits: Various components of power
dissipation in CMOS, Limits on low power design, low power design
through voltage scaling
5,6
6.3 IO pads and Power Distribution: ESD protection, input circuits,
output circuits, simultaneous switching noise, power distribution
scheme
5,6
6.4 Interconnect: Interconnect delay model, interconnect scaling and
crosstalk 5,6
Total 52
References:
[1] Sung-Mo Kang and Yusuf Leblebici, “CMOS Digital Integrated Circuits Analysis and Design”,
Tata McGraw Hill, Third Edition.
[2] Jan M. Rabaey, Anantha Chandrakasan and Borivoje Nikolic, “Digital Integrated Circuits: A
Design Perspective”, Pearson Education, Second Edition.
[3] Etienne Sicard and Sonia Delmas Bendhia, “Basics of CMOS Cell Design”, Tata McGraw Hill,
First Edition.
[4] Neil H. E. Weste, David Harris and Ayan Banerjee, “CMOS VLSI Design: A Circuits and
Systems Perspective”, Pearson Education, Third Edition.
[5] Debaprasad Das, “VLSI Design”, Oxford, First Edition.
[6] Kaushik Roy and Sharat C. Prasad, “Low-Power CMOS VLSI Circuit Design”, Wiley, Student
Edition.
[7] John P. Uyemura, “Introduction to VLSI Circuits and Systems”, Wiley, Student Edition, 2013.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC602 Advanced Instrumentation
System
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Identify process control system components and their applications.
CO2 Apply the knowledge of Pneumatic and Hydraulic components in
Instrumentation Process System.
CO3 Discuss principles of transmission and conversion of process parameters to
electrical and vice versa.
CO4 Decide the appropriate types of controllers and their tuning methods to build
the process control system
Module
No.
Unit
No. Topics Ref. Hrs.
1 Concepts of Advancement in Instrumentation 06
1.1 Data acquisition and data logging, telemetry in measurement, basic
requirement of control system and components 7
2 Pneumatic Components 12
2.1 ISO symbols, pneumatic air supply system, air compressors, pressure
regulation devices, directional control valves 4
2.2 Special types of pneumatic valve: pilot-operated valves, non-return
valves, flow control valves, sequence valves, and time delay valve 4
2.3 Single and double acting linear actuators, special type of double acting
cylinder, rotary actuators, air motors 4
2.4 Process control pneumatics: flapper nozzle system, volume boosters,
air relays, pneumatic transmitters and controllers, pneumatic logic
gates, dynamic modeling of pneumatic circuits
4
3 Hydraulic Components. 4 06
3.1 Hydraulic pumps, Pressure regulation method, loading valves 4
3.2 Hydraulic valves and actuators, speed control circuits for hydraulic
actuators 4
3.3 Selection and comparison of pneumatic, hydraulic and electric systems 4
4 Transmitters and Converters 12
4.1 Electronic versus pneumatic transmitters, 2-wire; 3-wire and 4-wire
current transmitters 4,1
4.2 Electronic type: temperature, pressure, differential pressure, level,
flow transmitters and their applications Smart (Intelligent) transmitters,
Buoyancy transmitters and their applications.
4,1
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
4.3 Converters: Pneumatic to Electrical and Electrical to Pneumatic
converters 4,1
5 Process Control Valves 08
5.1 Globe, ball, needle, butterfly, diaphragm, pinch, gate, solenoid, smart
control valves and special designs of globe valves 4
5.2 Flow characteristics, control valve parameters, control valve capacity,
valve rangeabilty, turn-down, valve size, valve gain 4
5.3 Selection criteria, specifications and installation of control valves 4
5.4 Valve Positioners: Necessity, types-motion balance and force-balance,
effect on performance of control valve 4
5.5 Control Valve Actuators: Electrical, pneumatic, hydraulic, electro-
mechanical, digital actuators. selection criteria of valve actuators 4
6 Controllers and Controller Tuning 08
6.1 Continuous and discontinuous controller: proportional controller,
proportional band, RESET controller, rate controller, composite
controller, cascade controller, feed-forward controller
4,1
6.2 Need and different method of controller tuning 4,1
Total 52
References:
[1] Bella G. Liptak, “Process Control and Optimization, Instrument Engineer‟s Handbook”, CRC
Press , Fourth Edition
[2] WG Andrews and Williams, “Applied Instrumentation in the process Industries, Vol. - I and II”,
Gulf Publication
[3] Terry Barlett, “Process Control System and Instrumentation”, Delimar Cengage learning Reprint-
2008
[4] Andrew Parr, “Hydraulics And Pneumatics- A Technician‟s And Engineer‟s Guide”, Jaico
Publishing House, Mumbai
[5] C.D.Johnson, “Process Control and Instrument Technology”, Tata Mcgraw Hill.
[6] J. W. Hatchison, “ISA Handbook of Control Valves”, ISA, Second Edition.
[7] A. K. Sawhney, Electrical & Electronic Instruments & Measurement, Dhanpat Rai and Sons,
Eleventh Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC603
Computer Organization
4 -- -- 4 -- -- --
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Outline the basic structure of a digital computer and illustrate the integer and
floating point arithmetic.
CO2 Design the control unit of a CPU using two approaches namely hardwired and
micro-programmed control.
CO3 Classify and Create a memory organization
CO4 Discuss the concepts of I/O organization
CO5 Discuss instruction level parallelism and IA32 family architecture.
Module
No.
Unit
No. Topics Ref. Hrs.
1 Introduction to Computer Organization 10
1.1 Fundamental units of computer organization, evolution of computers,
von neumann model, performance measure of computer architecture 1,3
1.2 Introduction to buses and connecting I/O devices to CPU and Memory,
bus structure, 1,3
1.3 Introduction to number representation methods, integer data
computation, floating point arithmetic. 3
2 Processor Organization and Architecture 14
2.1 CPU Architecture, register organization, instruction formats, basic
instruction cycle, instruction interpretation and sequencing 1,3
2.2 Control unit: soft wired (micro-programmed) and hardwired control
unit design methods 1,3
2.3 Microinstruction sequencing and execution, micro operations, concepts
of nano programming. 1,3
2.4 Introduction to RISC and CISC architectures and design issues, case
study on 8085 microprocessor, features, architecture, pin configuration
and addressing modes
3 Memory Organization 12
3.1 Introduction to memory and memory parameters, classifications of
primary and secondary memories, types of RAM and ROM, allocation
policies, memory hierarchy and characteristics
1,3
3.2 Cache memory concept, architecture (L1, L2, L3), mapping
techniques, cache coherency 1,3
3.3 Interleaved and associative memory, virtual memory, concept, 1,3
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
segmentation and paging, page replacement policies
4 Input / Output Organization 08
4.1 Types of I/O devices and access methods, types of buses and bus
arbitration, I/O interface, serial and parallel ports 1,3
4.2 Types of data transfer techniques, programmed I/O, interrupt driven
I/O and DMA 1,3
4.3 Introduction to peripheral devices, scanner, plotter, joysticks, touch
pad, storage devices 1,3
5 Introduction To Parallel Processing System 04
5.1 Introduction to parallel processing concepts, Flynn‟ s classifications,
pipeline processing, instruction pipelining, pipeline stages, pipeline
hazards
1,2
6 Introduction to Intel IA32 Architecture. 04
6.1 Intel IA32 family architecture, register structure, addressing modes,
advancements in arithmetic and logical instructions, exception
handling in IA32 architecture
1
Total 52
References:
[1] Carl Hamacher, Zvonko Vranesic and Safwat Zaky, “Computer Organization”, Tata McGraw-
Hill, Fifth Edition
[2] John P. Hayes, “Computer Architecture and Organization”, Third Edition.
[3] William Stallings, “Computer Organization and Architecture: Designing for Performance”,
Pearson, Eighth Edition.
[4] B. Govindarajulu, “Computer Architecture and Organization: Design Principles and
Applications”, Tata McGraw-Hill, Second Edition.
[5] Dr. M. Usha and T. S. Srikanth, “Computer System Architecture and Organization”, Wiley-India,
First Edition.
[6] Ramesh Gaonkar, “Microprocessor Architecture, Programming and Applications with the 8085”,
Penram, Fifth Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC604
Power Electronics I
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes EXC302: Electronic Devices
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Analyze different circuits involving Silicon Controlled Rectifier
CO2 Interpret tradeoffs involved in power semiconductor devices.
CO3 Analyze different types of controlled rectifiers and inverters
CO4 Analyze DC-DC convertors (choppers) and AC-AC converters.
Module
No.
Unit
No. Topics Ref. Hrs.
1 Silicon Controlled Rectifiers 10
1.1 Principle of operation of SCR, static and dynamic characteristics, gate
characteristics 3,7
1.2 Methods of turning on (type of gate signal), firing circuits (using R, R-
C, UJT),commutation circuit 3,7
1.3 Protection of SCR 3,7
2 Other Switching Devices 08
2.1 Principle of operation, characteristics, rating and applications of:
TRIAC, DIAC, GTO, MOSFET, IGBT and power BJT 2
2.2 Driver circuits for power transistors 2,7
3 *Controlled Rectifiers 12
3.1 Half wave controlled rectifiers with R, R-L load, 2,8
3.2 Full wave controlled rectifiers, half controlled and fully controlled
rectifiers with R, R-L load (effect of source inductance not to be
considered)
2,8
3.3 Single phase dual converter, three phase half controlled and fully
controlled rectifiers with R load only *Numerical based on
calculation of output voltage
2,8
4 *Inverters 10
4.1 Introduction, principle of operation, performance parameters of:
Single phase half / full bridge voltage source inverters with R and R-L
load, three phase bridge inverters (1200 and 1800 conduction mode)
with R and R-L load
2,7
4.2 Voltage control of single phase inverters using PWM techniques,
harmonic neutralization of inverters, applications *Numerical with R
load only
2,7
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
5 Choppers 06
5.1 Basic principle of step up and step down choppers 2
5.2 DC-DC switching mode regulators: Buck, Boost, Buck-Boost, Cuk
regulators, (CCM mode only) 2
6 AC Voltage Controllers 04
6.1 Principle of On-Off control, principle of phase control, single phase
bidirectional control with R and RL load 1,2
7 Cycloconvertor 02
7.1 Introduction, single phase and three phase Cyclo-converters,
applications 2,7
Total 52
References:
[1] M. H. Rashid, “Power Electronics”, Prentice-Hall of India, Third Edition.
[2] Ned Mohan, “Power Electronics”, Undeland, Robbins, John Wiley Publication, Third Edition.
[3] Ramamurthy, “ Thyristors and Their Applications”, East-West Press, Third Edition.
[4] Alok Jain, “Power Electronics and its Applications”, Penram International Publishing (India) Pvt.
Ltd, Second Edition.
[5] Vedam Subramanyam, “Power Electronics”, New Age International, Second Edition.
[6] Landers, “Power Electronics”, McGraw Hill, Second Edition.
[7] M.D. Singh and K. B. Khanchandani, “Power Electronics”, Tata McGraw Hill, Second Edition.
[8] P. C. Sen, “Modern Power Electronics”, Wheeler Publication, Second Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC 605 Digital Signal Processing and
Processors
4 -- -- 4 -- -- 4
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Apply DFT Properties and Illustrate FFT algorithms
CO2 Design and Realize Digital IIR & FIR Filters
CO3 Analyze the effect of hardware limitations
CO4 Justify the need and use of DSP processor
Module
No.
Unit
No. Topics Ref. Hrs.
1 Discrete Fourier Transform and Fast Fourier Transform 10
1.1 Discrete Fourier Series: Properties of discrete Fourier series, DFS
representation of periodic sequences. 1,2,7
1.2 Discrete Fourier transforms: Properties of DFT, linear convolution
of sequences using DFT, computation of DFT, relation between Z-
transform and DFS
1,2,7
1.3 Fast Fourier Transforms: Fast Fourier transforms (FFT), Radix-2
decimation in time and decimation in frequency FFT algorithms,
inverse FFT, and composite FFT
1,2,7
2 IIR Digital Filters 10
2.1 Mapping of S-plane to Z-plane, impulse invariance method, bilinear Z
transformation (BLT) method, frequency warping, pre-warping 1,3,7
2.2 Analog filter approximations: Butter worth and Chebyshev, design of
IIR digital filters from analog filters, design examples 3,7
2.3 Analog and digital frequency transformations
3 FIR Digital Filters 10
3.1 Characteristics of FIR digital filters, frequency response, location of
the zeros of linear phase FIR filters 1,3,7
3.2 Design of FIR digital filters using window techniques, Gibbs
phenomenon, frequency sampling technique, comparison of IIR and
FIR filters
1,3,7
4 Finite Word Length Effects in Digital Filters 08
4.1 Number representation, fixed point, sign-magnitude, one‟ s
complement, two‟ s complement forms, floating point numbers 3,4
4.2 Quantization, truncation, rounding, effects due to truncation and
rounding, Input quantization error, Product quantization error, co-3,4
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
efficient quantization error, zero-input limit cycle oscillations,
overflow limit cycle oscillations, scaling
4.3 Quantization in Floating Point realization IIR digital filters, finite word
length effects in FIR digital filters, quantization effects in the
computation of the DFT- quantization errors in FFT algorithms
5 Introduction to DSP Processors 08
5.1 Introduction to fixed point and floating point DSP processor, multiplier
and multiplier accumulator (MAC), modified bus structures and
memory access schemes in DSPs, multiple access memory, multiport
memory, VLIW architecture, pipelining, special addressing modes, on-
chip peripherals
4
5.2 Features of TMS 320c67xx DSP processor, architecture of TMS
320c67xx DSP processor, architecture features: computational units,
bus architecture memory, data addressing, address generation unit,
program control, program sequencer, pipelining, interrupts, features of
external interfacing, on-chip peripherals, hardware timers, host
interface port, clock generators, SPORT
4
6 Applications of DSP Processors 06
6.1 Speech Processing: Speech analysis, speech coding, sub band coding,
channel vocoder, homomorphic vocoder, digital processing of audio
signals.
5
6.2 Radar signal processing: Radar principles, radar system and
parameter considerations, signal design 5
Total 52
References:
[1] Proakis J., Manolakis D., "Digital Signal Processing", Pearson Education, Fourth Edition
[2] Oppenheim A., Schafer R., Buck J., "Discrete Time Signal Processing", Pearson Education,
Second Edition.
[3] Babu R., "Digital Signal Processing", Scitech Publications, Fourth Edition
[4] B. Venkata Ramani and M. Bhaskar, “Digital Signal Processors, Architecture, Programming and
Applications”, Tata McGraw Hill, Edition 2004.
[5] L. R. Rabiner and B. Gold, “Theory and Applications of Digital Signal Processing”, Prentice-
Hall of India, Edition 2006.
[6] B. Kumar, “Digital Signal Processing”, New Age International Publishers, Edition 2014.
[7] S.Salivahanan, A Vallavaraj, C Gnanapriya, “Digital Signal Processing”, Tata McGraw Hill
Edition Private Limited, New Delhi, Edition 2010
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching
Scheme
(Hrs/week)
Credits Assigned
L T P L T P Total
EXC 606
Modern Information
Technology for
Management
2 -- -- 2 -- -- 2
Examination Scheme
ISE MSE ESE
10 30 100 (60% Weightage)
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Identify production tools, various protocols which run the business
infrastructure system and business system managements
CO2 List the importance of IT tools in content management
CO3 List various network management protocols and their applicability in global
connectivity.
CO4 Identify keys applications of Management Information System in various
businesses.
Module
No.
Unit
No. Topics Ref. Hrs.
1 IT Infrastructure 06
1.1 Information technology 1
1.2 Computing infrastructure: software
1.3 Networking infrastructure
1.4 Cabling infrastructure
1.5 Wires less infrastructure
1.6 Storage infrastructure
2 IT Production Tool 06
2.1 Security infrastructure 1
2.2 Office tools
2.3 Data management tools
2.4 Web tools
3 Internet and Network Protocol 04
3.1 Network management tools 1
3.2 Network protocols and global connectivity
4 IT Management 06
4.1 E-Business Highway- business automation platform 1
4.2 Infrastructure management
4.3 Security management
4.4 Information management and audit
5 IT Applications 04
5.1 E Governance 1,2
5.2 Connected world and E-commerce
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
5.3 Information systems
5.4 Business systems
Total 26
References:
[1] B Muthukumaran, “Information Technology for Management”, Oxford University Press, Edition
2010.
[2] Kenneth C. Laudon and Jane P. Laudon, “Management Information Systems”, Pearson Education,
Fourth Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL601
VLSI Design Laboratory
-- -- 2 -- -- 1 1
Examination Scheme ISE ESE Total
Practical Oral
40 -- 20 60
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course Outcomes
CO1 Make use of simulation tools to verify characteristics of
MOSFET based circuits
CO2 Set-up simulation environment for VLSI circuit simulation
CO3 Observe characteristics of MOSFETS via simulation
CO4 Discuss tradeoffs in VLSI circuits by observing simulation
results
CO5 Validate design of MOSFET based circuits
CO6 Reproduce the given abstract of the IEEE paper
Exp.
No.
Experiment Details Ref. Marks
1 To Analyze NMOS and PMOS Transistor characteristics. 1,2 5
2 To simulate Resistive Load Inverter and CMOS Inverter, verify the VTC.
Compare both the topologies. Comment on the Noise Margins.
1,2 5
3 Implement CMOS NAND, NOR, AND, OR using Static CMOS Logic. 1,2 5
4 Design and Implement AB+CD bar using different CMOS Logic styles. 1,2 5
5 Simulate Pseudo NMOS Inverter and comment on the result. 1,2 5
6 Simulate 6 Transistor SRAM and check the read and write stability 1,2 5
7 Design and Implement given equation using Pseudo NMOS ,Domino
Logic and C2MOS Logic
1,2 5
8
Simulate Clocked JK and D Flip Flop using Static CMOS Logic.
1,2 5
Total Marks 40
References:
[1] Sung-Mo Kang and Yusuf Leblebici, “CMOS Digital Integrated Circuits Analysis and Design”, Tata
McGraw Hill, 3rd Edition.
[2] Etienne Sicard and Sonia Delmas Bendhia, “Basics of CMOS Cell Design”, Tata McGraw Hill, First
Edition.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL602
Digital Signal Processing and
Processors Laboratory
-- -- 2 -- -- 1 1
Examination Scheme
ISE ESE Total
Practical Oral
40 -- 20 60
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course
Outcomes
CO1 Test Fast Fourier Transform Algorithm
CO2 Design a Digital Filter
CO3 Adapt open source tools for signal processing application
CO4 Demonstrate Real Time Signal Processing using DSP Processor
Exp. No. Experiment Details Ref. Marks
1 Convolution and Correlation 5
2 Discrete Fourier Transform 5
3 Fast Fourier Transform 5
4 Overlap Add Method / Overlap Save Method 5
5 Digital IIR Filter Design 5
6 Digital FIR Filter Design 5
7 Real Time Signal Processing 5
8
Signal Processing Application
5
Total Marks 40
References:
As recommended by faculty.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
Course
EXL603a
Advanced Instrumentation
System
-- -- 2 -- -- 1 1
Examination Scheme
ISE ESE Total
Practical Oral
40(50%weightage) -- 10 30
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course Outcomes
CO1 Make use of Virtual Instrumentation software (LabVIEW) in
process control applications.
CO2 Differentiate Pneumatic and Hydraulic components
CO3 Make use of simulator to build Pneumatic and Hydraulic
control circuit
CO4 Design PID control circuit
Exp. No. Experiment Details Ref. Marks
1 To construct a VI to convert Fahrenheit to Celsius,
and convert into sub-VI by selection.
1 5
2 To construct a VI to add 8 numeric pressure input values and light up
LED if sum <25
1 5
3 To constructs a VI to monitor industry temperature and display
warning text and glow warning LED if:
1) Current temperature > max temperature. warning text: Heat
stroke warning
2) Current temperature < min temperature. warning text: Freeze
warning
3) min. temperature < current temperature <max temperature.
warning text: no warning text.
1 5
4 To construct a VI to generate a sine wave using Simulate signal express
VI. Add uniform white noise then use suitable filter to filter signal and
show filtered and unfiltered signal.
1 5
5 To construct a VI to create a table to display pressure values P, , 1 5
6 To demonstrate and understand different types of Pneumatic 2 5
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Components: i) 5/3 way hand lever valve, ii) 5/2 way pushbutton
valve, iii) 5/2 way single solenoid valve, iv) 5/2 way double solenoid
valve, v)5/2 way direction control valve, vi)Double acting cylinder,
vii) Compressor, viii) FRL unit.
7 To design a PLC based pneumatic system which will operate double
acting cylinder using 5/2 way double solenoid valve and pushbutton
2 5
8
To design and simulate PID controller for process control application
of plant using MATLAB
3 5
Total Marks 40
References:
[1] www.ni.com
[2] Electro-pneumatic manual
[3] www.mathworks.com
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL603b Power Electronics – I Lab
-- -- 2 -- -- 1 1
Examination Scheme
ISE ESE Total
Practical Oral
40(50%weightage) -- 10 30
Pre-requisite Course Codes
After successful completion of the course, student will be able to
Course Outcomes
CO1 Make use of simulation tool to analyze power electronic
circuits and comment on its performance
CO2 Analyze different power semiconductor switches with their
characteristics
CO3 Evaluate different performance parameters of rectifiers and
choppers
CO4 Evaluate different performance parameters of inverters and
cycloconverters
Exp. No. Experiment Details Ref. Marks
1 Analysis of V-I Characteristics of SCR. 4 5
2 Analysis of Half Wave Controlled Rectifier using SCR. 1 5
3 Analysis of V-I Characteristics of TRIAC. 7 5
4 Analysis of Light Dimmer using DIAC and TRIAC. 7 5
5 Analysis of different performance parameters of semi-converter using
PSIM
2 5
6 Analysis of different performance parameters of full converter using
PSIM
2 5
7 Evaluation of different performance parameters of Buck Converter
using PMLK
2 5
8
Evaluation of different performance parameters of Boost Converter
using PMLK
2 5
Total Marks 40
References:
As recommended by faculty.
Sardar Patel Institute of Technology Bhavan‟s Campus, Munshi Nagar, Andheri (West), Mumbai-400058-India
(Autonomous Institute Affiliated to University of Mumbai)
Course
Code Course Name
Teaching Scheme
(Hrs/week) Credits Assigned
L T P L T P Total
EXL604 Mini Project II
-- -- 2 -- -- 2 2
Examination Scheme
ISE Practical Oral Total
Phase-I:10
Phase-II:10
Phase-III:10
Phase-IV:20
-- 50 100
ISE:
The main intention of Mini Project is to make student enable to apply the knowledge and skills learned
out of courses studied to solve/implement predefined practical problem. The students undergo various
laboratory/tutorial/simulation laboratory/work shop courses in which they do experimentation based on
the curriculum requirement. The mini Project may be beyond the scope of curriculum of courses taken or
may be based on the courses but thrust should be on
• Learning additional skills
• Development of ability to define and design the problem and lead to its accomplishment with proper
planning.
• Learn the behavioral science by working in a group
The group may be maximum four (04) students. Each group will be assigned one faculty as a supervisor.
The college should keep proper assessment record of progress of the project and at the end of the semester
it should be assessed for awarding TW marks. The TW may be examined by approved internal faculty
appointed by the head of the institute. The final examination will be based on demonstration in front of
internal and external examiner. In the examination each individual student should be assessed for his/her
contribution, understanding and knowledge gained about the task completed.
The topic of Mini Project I and II may be different and / or may be advancement in the same topic. The
students may use this opportunity to learn different computational techniques as well as some model
development. This they can achieve by making proper selection of Mini Projects.