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Site

VlizyMobile Radio Division

Originator(s)

A. RezzougE. Marza

B10: BSS Architecture Service Guideline

Domain : Network Architecture

Product : GSM B10

Division : Methods

Rubric : GSM/GPRS/EDGE

Type : Guidelines

Distribution codes Internal:

Pre-distribution:

NE Velizy NE Timisora NE Portugal NE Egypt

F. Colin Cristian I. Inta Pedro Henriques Maged Sayed

T. Plantier E. Marza Joo Frade

M. Talayssat

LM. Palumbo

Abstract:The aim of this document is to describe BSS architecture configuration rules &

dimensioning processes in Alcatel release B10. It is recommended to be the guideline for

RNE & TPM people who are involve in BSS architecture aspect.

Key words:BTS, BSC, TC, MFS/GP(U), Abis, AterMUX, A, and Gb; B10 release

Appraisal and approval authorities

GSM TIS

DD-MM-YY: Signature: DD-MM-YY: Signature:

Network Engineering Florent Colin

DD-MM-YY: Signature:

All Alcatel system details given in this document are for your comfort only. The system

information may not reflect the latest status of the equipment used in your project.

Please consult in addition to this document the latest product descriptions!


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Table of contents

1 INTRODUCTION..................................................................................14

2 OVERVIEW OF BSS ARCHITECTURE SERVICES ....................... 15

2.1 WHAT IS THE BSSARCHITECTURE? ........................................................................15

2.1.1 BSS Network Elements ........... .......................................................................15

2.1.2 BSS Interfaces ...............................................................................................16

2.1.2.1 Um (air or radio) interface .........................................................................16

2.1.2.2 Abis interface ............................................................................................16

2.1.2.3 AterMUX interface................... .................................................................16

2.1.2.4 A interface.................................................................................................172.1.2.5 Gb interface...............................................................................................17

2.2 BSSARCHITECTURE SERVICES ................................................................................18

2.2.1 Scope.............................................................................................................18

2.2.2 Goal..............................................................................................................18

2.2.3 Category .......................................................................................................18

2.2.4 Process..........................................................................................................19

2.2.4.1 Process for Network Architecture SETUP and EVOLUTION....................19

2.2.4.2 Process for Network Architecture ASSESSMENT.................. ...................222.3 BSSARCHITECTURE IMPACT IN B10 .....................................................................25

2.3.1 Multiple CCCH .............................................................................................25

2.3.2 Gb over IP.....................................................................................................26

2.3.3 Capacity Improvements .................................................................................27

2.3.3.1 Optimized HR connectivity .......................................................................28

2.3.3.2 HSL functionality......................................................................................28

2.3.4 STM-1 transmission in 9125 Transcoder .......................................................29

2.3.5 Ater optimization........................................................................ ...................29

3 DETAILED BSS ARCHITECTURE PROCESS ................................. 30

3.1 BTS........................................................................................................................30

3.1.1 BTS Configuration............................................... ..........................................30

3.1.1.1 Cell Configuration.....................................................................................34

3.1.1.2 SDCCH Configuration ..............................................................................35


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3.1.2 Determination of BTS configuration .................... ..........................................37

3.1.3 Cell dimensioning..........................................................................................37

3.1.3.1 SDCCH Dimensioning ..............................................................................38

3.1.3.2 TCH/PDCH Dimensioning .............................. ..........................................40

3.2 ABIS INTERFACE......................................................................................................46

3.2.1 Abis Configuration..................................................................... ...................46

3.2.1.1 Abis Network Topology ............................................................................46

3.2.1.2 Abis Channels ...........................................................................................48

3.2.1.3 Abis Link Capacity................................................................. ...................50

3.2.1.4 Signalling Sub-Multiplexing Schemes .......................................................50

3.2.1.4.1 No Multiplexing......................................................................................................................... 51

3.2.1.4.2 16K Static Multiplexing............................................................................................................. 51

3.2.1.4.3 16K Statistical Multiplexing ...................................................................................................... 523.2.1.4.4 64K Statistical Multiplexing ...................................................................................................... 53

3.2.1.5 Secondary Abis Link .................................................................................58

3.2.2 Abis Dimensioning ..................................................................... ...................61

3.2.2.1 Case #1: B9 with No GPRS/EDGEB10 with EDGE ............................62

3.2.2.2 Case #2: B10 with EDGE ..........................................................................62

3.3 BSC........................................................................................................................68

3.3.1 G2 BSC Configuration ..................................................................................68

3.3.1.1 BSC Capacity ............................................................................................69

3.3.1.2 Abis TSU ..................................................................................................70

3.3.1.3 Ater TSU...................................................................................................72

3.3.2 BSC Evolution Configuration .............................. ..........................................72

3.3.2.1 BSC Capacity ............................................................................................74

3.3.2.2 Delta BSC Evolution versus G2 BSC ........................................................75

3.3.2.3 TP GSM board ..........................................................................................75

3.3.2.4 CCP board.................................................................................................76

3.3.2.5 LIU shelf ...................................................................................................77

3.3.2.6 SS7 transport .............................................................................................77

3.3.2.7 HSL usage.................................................................................................78

3.3.3 BSC Dimensioning ..................................................................... ...................80

3.3.3.1 Design BSC area .......................................................................................81

3.3.3.2 Parenting Abis ports of the BSC ................................................................83


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3.3.4 LA Dimensioning................................................. ..........................................85

3.3.4.1 LA Definition and Capacity.................................................... ...................85

3.3.5 RA Dimensioning ..........................................................................................89

3.3.6 Summary of LA/RA dimensioning process......................................................91

3.3.7 CCCH dimensioning......................................................................................92

3.4 ATERMUXAND AINTERFACES................................................................................94

3.4.1 General .........................................................................................................94

3.4.1.1 AterMUX interface................... .................................................................94

3.4.1.2 A interface.................................................................................................94

3.4.1.3 AterMUX interface versus A interface.................................... ...................94

3.4.2 AterMUX configuration.................................................................................95

3.4.2.1 AterMUX CS and A interfaces ..................................................................96

3.4.2.2 AterMUX PS.............................................................................................98

3.4.2.3 AterMUX CS/PS .......................................................................................99

3.4.3 SS7 Signalling mode....................................................................................101

3.4.3.1 LSL and HSL modes ...............................................................................101

3.4.3.2 SS7 Dimensioning...................................................................................101

3.4.4 AterMUX Dimensioning ..............................................................................108

3.4.4.1 AterMUX CS ..........................................................................................108

3.4.4.1.1 A Dimensioning ....................................................................................................................... 111

3.4.4.2 AterMUX PS...........................................................................................1123.4.4.2.1 Process description .................................................................................................................. 112

3.4.4.2.2 GSL Dimensioning .................................................................................................................. 115

3.4.4.2.3 GCH/AterMUX-PS Dimensioning .......................................................................................... 120

3.4.4.3 AterMUX CS/PS.....................................................................................122

3.5 TC ........................................................................................................................123

3.5.1 G2 TC Configuration...................................................................................124

3.5.2 G2.5 TC Configuration................................................................................124

3.5.2.1 New MT120-xB boards available .................... ........................................125

3.5.3 TC Dimensioning ........................................................................................126

3.5.4 STM-1 in TC................................................................................................127

3.5.4.1 Functional Requirements .......... ...............................................................127

3.5.4.2 Overall description ..................................................................................127

3.5.4.3 TC Configuration ....................................................................................128


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3.6 MFS .....................................................................................................................129

3.6.1 The 1stMFS generation (A9135 MFS) .........................................................129

3.6.1.1 GPRS Processing Unit (GPU)................................................. .................130

3.6.1.2 Multiple GPU per BSS ............................................................................130

3.6.1.3 Capacity ..................................................................................................131

3.6.2 MFS Evolution (A9130 MFS) .............................. ........................................131

3.6.2.1 Configurations and Capacity....................................................................132

3.6.2.2 Delta MFS Evolution versus the 1st MFS generation................................133

3.6.2.3 Delta B10 versus B9........... .....................................................................134

3.6.3 GP(U) Dimensioning and AterMux PS dimensioning (user traffic) ..............135

3.6.3.1 Required GCH traffic estimation .............................................................138

3.6.3.2 GP(U) GCH capacity estimation..............................................................140

3.6.3.3 GP(U) limitations ....................................................................................142

3.7 GB INTERFACE .......................................................................................................147

3.7.1 Gb configuration.........................................................................................149

3.7.2 Gb Dimensioning ........................................................................................151

4 ANNEX 1: BSS ARCHITECTURE IMPACT FROM B9................. 155

5 ANNEX 2: PRE-REQUISITES FOR MXBSC CAPACITY

IMPROVEMENTS ...................................................................................... 160

5.1 CICCODE LIMITATION ...........................................................................................160

5.2 HSLLIMITATION ...................................................................................................160

5.3 GBOIPLIMITATION ................................................................................................161


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INDEX OF FIGURES

Figure 1: BSS Architecture...................................................................................................15

Figure 2: TRX configuration on Um interface.......................................................................16

Figure 3: Abis configuration.................................................................................................16

Figure 4: AterMUX configuration Dedicated AterMUX for CS traffic...............................17

Figure 5: A-interface configuration.......................................................................................17

Figure 6: BSS Architecture Services.....................................................................................18

Figure 7: Network Architecture Setup and Evolution process ...............................................19

Figure 8: BSC/LAC/RAC (re) design - example ...................................................................20

Figure 9: Abis TSU port (re) design......................................................................................22

Figure 10: Network architecture assessment process.............................................................23

Figure 11: mCCCH mapping on Beacon TRX......................................................................25

Figure 12: MFS capacity ......................................................................................................27

Figure 13: B10 BSC capacity improvements.........................................................................27

Figure 14: BSC - MSC connectivity with HSL mode............................................................28

Figure 15: BTS generation/type supported in B10..............................................................30

Figure 16: Determination of BTS configuration....................................................................37

Figure 17: SDCCH dimensioning process.............................................................................38

Figure 18: TCH/PDCH dimensioning process.......................................................................41

Figure 19: TCH/PDCH dimensioning assessment.................................................................44

Figure 20: Abis Chain (Multi-drop) Topology ......................................................................46

Figure 21: Abis Star Topology..............................................................................................47


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Figure 22: Abis Ring (Closed loop) Topology ......................................................................47

Figure 23: Secondary Abis Topology....................................................................................48

Figure 24: TRX - Abis mapping ...........................................................................................48

Figure 25: Example of Abis TS usage for 1 BTS/4 TRX No Multiplexing.........................51

Figure 26: Example of Abis TS usage for 1 BTS/4 TRX 16K Static Multiplexing .............52

Figure 27: 16K Statistical Multiplexing MCB 16/1 mapping .............................................52

Figure 28: Example of Abis TS usage for 1 BTS/4 TRX 16K Statistical Multiplexing.......53




Figure 32: Example of Abis TS usage for 1 BTS/4 TRX 64K Statistical Multiplexing.......54

Figure 33: Abis TS configuration on primary and secondary links ..................... ...................58

Figure 34: BTS with 24 TRX mapped on both Abis links ........... ..........................................58

Figure 35: Example of topology with two BTS chained........................................................59

Figure 36: Two Abis links filling examples. .........................................................................59

Figure 37: Abis dimensioning process Method 1................................................................63

Figure 38: Abis dimensioning process Method 2................................................................65

Figure 39: G2 BSC (A9120 BSC) Architecture.....................................................................68

Figure 40: G2 BSC Cabinet layout .......................................................................................69

Figure 41: Abis TSU G2 BSC............................................................................................70

Figure 42: Ater TSU G2 BSC............................................................................................72

Figure 43: BSC Evolution (A9130 BSC) HW Architecture...................................................73


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Figure 44: Abis and Ater allocation on LIU boards / BSC capacity.......................................77

Figure 45: BSC dimensioning process ........... .......................................................................80

Figure 46: BTS position & configuration design BSC area step 1 ................... ...................81

Figure 47: Transmission planning & BSC position design BSC area step 2........................82

Figure 48: BSC area definition design BSC area step 3......................................................82

Figure 49: Transmission load checking.................................................................................83

Figure 50: BTS / Abis parenting on BSC done by AMT.NET............................................84

Figure 51: LA dimensioning assessment...............................................................................88

Figure 52: Subdivision of a LA in GPRS routing areas (RA) ................................................89

Figure 53: AterMUX and A relationship...............................................................................94

Figure 54: AterMUX interface structure ...............................................................................95

Figure 55: AterMUX CS interface configuration G2 BSC..................................................96

Figure 56: Channel mapping between AterMUX CS and A..................................................97

Figure 57: AterMUX PS interface configuration - GPU........................................................98

Figure 58: Sharing AterMUX links.......................................................................................99

Figure 59: AterMUX CS/PS Timeslot configuration...........................................................100

Figure 60: SS7 message length (in bytes) according to GSM event.....................................102

Figure 61: Difference between Exact busy hour, NPO busy hour and Peak traffic...............104

Figure 62: AterMUX-CS dimensioning process..................................................................109

Figure 63 AterMux-PS dimensioning process at BSC level.................................................113

Figure 64 AterMux-PS dimensioning process at GP(U) level..............................................113

Figure 65 GSL usage factor ................................................................................................119


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Figure 66: TC G2 architecture with mixed configuration ....................................................123

Figure 67: TC G2.5 architecture .........................................................................................124

Figure 68: TC dimensioning process...................................................................................126

Figure 69: The BSS Architecture with STM-1 on TC side .......... ........................................128

Figure 70: The 1stMFS generation (A9135 MFS) Architecture...........................................129

Figure 71: Multiple GPU per BSS ......................................................................................130

Figure 72: MFS Evolution (A9130 MFS) HW Architecture................................................132

Figure 73: MFS capacity ....................................................................................................133

Figure 74: GP(U) dimensioning process .............................................................................136

Figure 75 AterMux PS dimensioning process based on user traffic.................... .................137

Figure 76: Example of GCH/PDCH traffic relationship in case of AterMux PS

underdimensioning.......................................................................................................139

Figure 77 GCH vs. PDCH traffic relationship: example......................................................140

Figure 78 GPU_for_MS_context_handling due to PMU memory limitation .......................143

Figure 79 GPU_for_Power_Limitation due to PMU CPU load...........................................144

Figure 80 GPU_for_Power_Limitation due to DSP CPU load ............................................145

Figure 81: Gb interface configuration (from 3BK 09559 LAAA EBZZA) ..........................148

Figure 82: Gb interface connections ...................................................................................149

Figure 83: GboIP End-to-End architecture.......................................................................150

Figure 84: Gb dimensioning process...................................................................................151

Figure 85: EGCH link in B8 vs. M-EGCH link in B9 ........................................ .................155

Figure 86: Wasted Abis nibbles case in B8 .......... ...............................................................157

Figure 87: Enhance transmission resource management......................................................157


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Figure 88: AterMUX TS reserved by GP(U) Ater TS margin..............................................158

Figure 89: Better transmission resource usage with DL retransmission in the BTS .............159


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INDEX OF TABLES

Table 1: BSC-MFS/GP(U)-TC (re) design............................................................................21

Table 2: Configuration G1 BTS MKII with DRFU ............................................................30

Table 3: Configuration G2 BTS.........................................................................................31

Table 4: Configuration Evolium BTS ................................................................................31

Table 5: Configuration Evolium Evolution .............................. ..........................................32

Table 6: BTS HW Capability in B10 ....................................................................................33

Table 7: TRX HW capability since G3 BTS generation ........................................................34

Table 8: Cell Types ..............................................................................................................34

Table 9: Frequency Hopping supported in B10.....................................................................35

Table 10: Recommended SDCCH configuration for a standardcell only FRTRXs...........36

Table 11: Counter list - SDCCH dimensioning .................................................. ...................38

Table 12: Counter list - TCH dimensioning ..........................................................................40

Table 13: Counter list - PDCH dimensioning........................................................................41

Table 14: RLC data block size for each (M) CS....................................................................45

Table 15: Abis Channel Types..............................................................................................49

Table 16: Number of TS available in one Abis link .................... ..........................................50

Table 17: Abis occupation according to the number of FR TRX ...........................................55

Table 18: Counter list - Abis dimensioning Method 1...........................................................62

Table 19: Counter list - Abis dimensioning Method 2. ..........................................................65

Table 20: G2 BSC Capacity..................................................................................................69

Table 21: TSL/TCU Mapping...............................................................................................71


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Table 22: BSC Evolution Capacity .......................................................................................74

Table 23: Counter list LA dimensioning ........... .................................................................85

Table 24: Counter list RA dimensioning........... .................................................................89

Table 25: Max number of AterMUX CS interfaces G2 BSC ..............................................97

Table 26: Max number of A-interfaces G2 BSC.................................................................98

Table 27: Max number of AterMUX PS G2 BSC ...............................................................99

Table 28: Ratio of Mixing CS and PS Traffic in AterMUX.................................................100

Table 29: Counter list AterMUX-CS dimensioning..........................................................103



Table 32: Counter list GSL dimensioning ........................................................................116

Table 33: Counter list GSL dimensioning ........................................................................117

Table 34: G2 TC/ G2.5 TC capabilities...............................................................................123

Table 35: G2 TC configuration...........................................................................................124

Table 36: G2.5 TC configuration........................................................................................125

Table 37: G2.5 TC capacity................................................................................................125

Table 38: The 1stMFS generation (A9135MFS) Capacity .................................................131

Table 39: Counter list - GP(U) dimensioning......................................................................136

Table 40: Counter list - Gb dimensioning ...........................................................................151

Table 41: GCH consumption B8 vs. B9 ...........................................................................156


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History:

Edition Date Originator Comments

Draft 05/11/07 Abdesselem Rezzoug Creation from B9 version

Ed1P2 10/01/08 Eugen Marza Correction from NE comments

Ed1 05/02/08 Abdesselem Rezzoug Additonnal corrections and updates

Ed2 05/02/09 Eugen Marza Additonnal corrections and updates

References:

[1] 3BK 17430 5000 PGZZA BSS Configuration Rules release B10

[2] 3BK 10204 0608 DTZZAEnhanced Transmission Resource Management

Release B9

[3] 3BK 17025 0062 DSZZA

Introduction of DRFU on G1 MK II BTS Principle of

Method

[4] 3BK 17025 0061 DSZZA Introduction of DRFU on G2 BTS Principle of Method

[5] 3BK 11210 0157 DSZZA G3 BTS Architecture and Principles

[6] 3BK 11210 0328 DSZZA BTS G4 Architecture and Principles

[7] 3DC 21083 0001 TQZZA EVOLIUM A9100 Base Station Product description

[8] 3BK 10204 0511 DTZZA SFD: Dynamic SDCCH allocation

[9] 3DF 01903 2810 PGZZA BSS B8 Dimensioning Rules

[10] 3DC 20003 0019 UZZZADimensioning Rules for CS and PS traffic with BSS

Software Release B10

[11] 3DC 21150 0323 TQZZAGSM/GPRS/EDGE Radio Network Design Process for

ALCATEL BSS Release B10

[12] 3DC 21016 0005 TQZZA A9135 MFS Product Description

[13] 3DF 00995 0005 UAZZA GPRS/E-GPRS Radio Network Planning Aspects

[14] 3BK 11203 0100 DSZZA GPRS resource usage and dimensioning B8 release

[15] 3BK 09722 JAAA DSZZA GPRS management functional specification

[16] 3BK 11206 0476 DSZZA BSC abbreviations Release B9

[17] 3DF 019032911 VAZZA B9: BSS Architecture Service Guideline

[18] 3DC 21144 0120 TQZZA Gb over IP in Release B10

[19] 3BK 10204 0028 DTZZA Multiple CCCH

Abbreviations:

Refer to [16].


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1 INTRODUCTION

The aim of this document is to describe BSS architecture configuration rules &

dimensioning processes in Alcatel release B10.

It is recommended to be the guideline for RNE (Radio Network Engineer) & TPM

(Technical Project Manager) people who are involve in BSS architecture aspect.

This document is organised as below:

Part I: Overview of BSS Architecture Service

The purpose of this part is to give the reader the overview of the architecture

service for the BSS network which consists of:

- The global picture of BSS network architecture together with the shortdefinition for each network elements and interfaces

- Describing overall processes for each BSS architecture service- The short presentation about B9/B10 impacts to BSS architecture.

The main impacts are linked to the new features introduced in B10 release.

Part II: Detailed BSS Architecture Processes

This part describes in the details of the main network configuration rules in release

B10 and the dimensioning processes, which are related to counter analysis.

It covers the following BSS network elements and interfaces:

- BTS- BSC

- MFS/GP(U)

- TC

- Abis interface

- AterMUX interface

- A interface

- Gb interface

The dimensioning method due to migration from B8 to B9 release is not detailed in this

document (please refer to [17] document).

Nevertheless, a short presentation about BSS architecture impacts with the introduction

of new B9 features is presented in Annex.


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2 Overview of BSS Architecture Services

This section gives an overview of the BSS architecture.

It describes briefly all the components in the BSS together with their key functions and

the global BSS architecture processes.

2.1 What is the BSS Architecture ?

BSS stands for Base Station Subsystem.

The main role of the BSS is to provide and support both bi-directional signalling and CS

traffic channels (respectively PS traffic channels) between the Mobile Station and

Network SubSystem or NSS (respectively GPRS SubSystem or GSS).

Figure 1: BSS Architecture

As presented in shown in Figure 1, the BSS consists of several network elements and

interfaces.

2.1.1 BSS Network Elements

BTS (Base Transceiver Station): providing radio links between the MobileStations and the BSC.

BSC (Base Station Controller):controlling several BTSs.

TC (TransCoder): providing speech conversion between the 16kbps channel(from/to BSC side) and the 64kbps channel (from/to the MSC1).

MFS (Multi-BSS Fast packet Server):To be able to support PS traffic, a MFS isintroduced in the BSS in order to manage data packets.

1MSC (Mobile Switching Center) is a main network element of the NSS having connection to the BSS.

BTS

BTS

BTS

BSC

MFS

TC

NSS(CS traffic)

GSS

(PS traffic)

Um Abis

AterMUX CS

Gb

A

BSS (CS+PS traffic)

AterMUX PS

AterMUX CS/PS


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2.1.2 BSS Interfaces

2.1.2.1 Um (air or radio) interface

The UM interface is the radio interface connecting the MS with the BTS. It consists of a

group of TRXs and the group size is based on the BTS traffic.

TS0 TS1 TS2 TS3 TS4 TS5 TS6 TS7

TRX

Figure 2: TRX configuration on Um interface

Each TS of a TRX can provide a channel with different codec rates (FR, EFR, HR and AMR)

available for CS traffic, while GPRS CS1/CS4 and EDGE MCS-1/9 available for PS traffic.

As a radio TS is dynamically allocated to serve either CS or PS traffic, the TS is called asTCHwhile it supports CS traffic; otherwise called as PDCHwhile it supports PS traffic.

2.1.2.2 Abis interface

The Abis interface is connecting the BTS with their parent BSC. It is usually a 2Mbps link

(64kbps * 32 TS). A BTS can handle maximum two links and each TS contains four 16kbps

channels or nibbles.

Based on the corresponding radio TS; at one moment, a given nibble can be called either asTCHif its corresponding radio TS is TCH; or as GCHif its corresponding radio TS is PDCH.

Other Abis TSs can carry signalling (RSL and OML) or extra TS.

Abis

CH# 1 CH# 2 CH# 3 CH# 4

T S 0

T S 1

:

:

T S 26

T S 27

T S 28 TCH / GC H T CH / G CH T CH / G CH T CH / GCH

T S 29 TCH / GC H T CH / G CH T CH / G CH T CH / GCH

T S 30

T S 31

TS : 64 Kbits/sec

Channel or N ibble : 16 Kbits/sec

T S 0 Transparency

OML

R SL

Extra TS

Extra TS

:

:

Free

Mapping to 1 TRXof Um Interface

Figure 3: Abis configuration

2.1.2.3 AterMUX interface

The AterMUX interfaces provide connections between:

- BSC and TC

- BSC and MFS

- MFS and TC (in case of AterMUX transporting mixed Traffic CS & PS)


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In general, the AterMUX is also a 2Mbps PCM link (64kbps * 32 TS).

However, differently from Abis, every nibbles on AterMUX are already defined to be TCH or

GCH or signalling channels.

AterMUX CS

CH# 1 CH# 2 CH# 3 CH# 4

TS 0

TS 1 TCH TCH TCH TCH


:

:

TS 14 Qmux TCH TCH TCH

TS 15

TS 16



:

:


TS 31

TS : 64 Kbits/sec

Channel or Nibble : 16 Kbits/sec

Frame Synchronization

Alarm octet

SS7

X25

:

:

:

:

Figure 4: AterMUX configuration Dedicated AterMUX for CS traffic

2.1.2.4 A interface

This interface, connecting TC and MSC, is supported by 2Mbps PCM links (64kbps * 32 TS).

One 64kbps channel on A is corresponding to one 16kbps channel on AterMUX TC is

responsible for this channel speed conversion.

The A trunk carries up to 31 traffic channels identified by a CIC (Circuit Identification Code).

A Interface

TS 0

TS 1

TS 2

TS 3

:

:

:

:

TS 30

TS 31

TS : 64 Kbits/sec

CIC 1

CIC 2

CIC 3

:

:

:

:

CIC 30

Frame Synchronization

CIC 31

Figure 5: A-interface configuration

2.1.2.5 Gb interface

The Gb interface connects the MFS with the SGSN2

(Serving GPRS Support Node), which isa main network element of the GSS having connection to the BSS.

When using Frame Relay stack, the Gb interface (GboFR) is supported by 2Mbps PCM links

(64kpbs * 32 TS).

When using UDP/IP/Ethernet stack, the Gb interface (GboIP) is supported by a Gigabit

Ethernet link (GE).

2SGSN (Serving GPRS Support Node) is a main network element of the GSS having connection to the BSS.


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2.2 BSS Architecture Services

2.2.1 Scope

The BSS architecture services cover the main tasks to be performed for designing the BSS

network topology and for dimensioning the BSS network elements and interfaces.

2.2.2 Goal

It is to define the BSS capacity and topology, which is appropriateand necessaryto be able

to support the real network traffic or to fit new requirements for network evolution.

2.2.3 Category

According to different network states, the BSS architecture services can be classified into:

1) Network Architecture SETUPThis service is providing the BSS architecture design for a newnetwork.

2) Network Architecture ASSESSMENTFor an existing network, it is important to perform this service to check periodically

the network performance from architecture point of view.

3) Network Architecture EVOLUTIONThe BSS architecture should be re-designed in case of some network evolutions e.g.

network extension (to be adapted to a forecasted traffic scenario) and new network

feature activation (GPRS CS 3-4 or EDGE, for instance).

Network Architecture

Evolution


Assessment


Setup Initial

Steady

Developing

BSS Architecture Services Network State

Figure 6: BSS Architecture Services


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2.2.4 Process

Two different processes are defined, one supporting the services network architecture setup

and evolution, and the other one supporting the service network architectureassessment.

2.2.4.1 Process for Network Architecture SETUP and EVOLUTION

It is considered the same process can be applied for these two BSS architecture services; see

the process diagram below.

START

(1) Gathering Data

(2) Design/Re-design

(2b) BSC/MFS (GPU/GP)/TC Configuration

(2d) Parenting Abis TSU/LIU ports of the BSC

(2a) BSC/LAC/RAC Areas

(2c) Number of interfaces: Abis, AterMUX, A and Gb

(3) Operational Implementation, according to (2)

FINISH

NW Configuration Rules

Figure 7: Network Architecture Setup and Evolution process

Step (1) Gathering data

The first step is to gather the architecture data from the network:

NE specifications i.e. type of BTS, BSC, MFS, TC.

NE locations.

Current BSS network topology (architecture) available in case of network evolution.

Defined configuration e.g. TRX configuration (BCCH combined or non-combined andnumber of SDCCH).


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Step (2) Design / Re-design

This step will be considered as design in case of network setup but re-design in case of

network evolution of which current design already existed.

The architecture (re)-design should be performed for each BSS network elements and

interfaces, based on the data from Step 1 and also strictly respected to Networkconfiguration rules for more details, please refer to [1].

(2a)BSC/LAC/RAC Areas

Since the data about TRX configuration and BTS location are known (from step 1), the

(re)-design will start with defining the BSC/LAC/RAC area based on geographical point

of view.

The following is the example of BSC/LAC/RAC (re) design.

Figure 8: BSC/LAC/RAC (re) design - example

Fore more details, please refer to section 3.3.3.1 for BSC area design, section 3.3.4 for

LAC design and section 3.3.5 for RAC design.

(2b)BSC/MFS (GP(U))/TC Configuration

BSC:

An appropriate typeand configurationhas to be chosen for each BSC in order to provide

the sufficient capacity to support their resource usage (e.g. number of TRX, BTS, Abis,

etc. is required for a BSC), which is related to the BSC area in the previous (re)-design.


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MFS (GP(U)) and TC:

According to the defined BSC configuration and the CS traffic (respectively PS traffic), we

can continue to design the configuration of TC (respectively MFS/GP(U)).

Therefore, the outcome of (re)-design should provide the following information.

BSC MFS/GP(U) TC

Type A9120 BSC, A9130 BSC A9135 MFS, A9130

MFS

G2 TC, G2.5 TC

(A9125 Compact TC)

Configuration - Conf 1, 2, 3, 4, 5 or 6 for

A9120 BSC

- Stand Alone / Rack sharedconfiguration with 200, 400,

600, 800 or 1000 TRX for

A9130 BSC

Nb of GP(U) boards

dedicated to eachBSC

Nb of MFS racks

- Nb of TC boards

dedicated to each BSC

- Nb of TC racks

Table 1: BSC-MFS/GP(U)-TC (re) design

Fore more details, please refer to section 3.3 for BSC configuration, section 3.5 for TC

configuration, and section Erreur ! Source du renvoi introuvable. for MFS

configuration.

(2c)Number of interfaces; Abis, AterMUX, A and Gb

After the configuration of all BSS network elements is defined, it comes to the step to

design interfacesconnecting them.

In general, we have to design the numberof needed interface links.

However, additional characteristic has to be designed for some interfaces:

Abis: Type of signalling sub-multiplexing schemes, BTS in multidrop and numberof extra Abis TS (in case of supporting GPRS CS3-4 and EDGE).

AterMUX: Type of Traffic i.e. CS, PS or Mixed CS/PS.

Gb: Number of 64kbps TSs for GboFRMinimum throughput of IP network (QoS, Delay) for GboIP

Fore more details, please refer to section 3.2 for Abis, section 3.4 for AterMUX & A-interface and section 3.7 for Gb.

(2d)Parenting Abis TSU ports of the BSC

The final (re)-design is to assign the dedicated Abis TSU (at BSC side) for each Abis link

(from BTS side).


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To perform parenting Abis TSU, please refer to the Abis TSU configuration rules in

section 3.3.1.2.

However, Network Engineering service has developed the architecture management tool,

so called AMT.NET, which assists the radio network engineer to design efficiently the

parenting Abis TSU in the convenient way.

For more details, please refer to websitehttp://pcs.tm.alcatel.ro/Amt.

Below is an example of parenting Abis TSU, which is done by AMT.NET tool.

Figure 9: Abis TSU port (re) design

The operation of parenting Abis TSU is required only in case of G2 BSC. For MxBSC it

has no meaning.

Step (3) Operational Implementation

According to the results from all architecture (re)-designs in step 2, the operational

implementation should include the following activities:

The extension of Network elements i.e. new configuration and/or new resources.

BTS Cutover, either intra BSC (i.e. change the connected Abis TSU port withinthe same BSC) or inter BSC (different BSC).

Parameter modification.

2.2.4.2 Process for Network Architecture ASSESSMENT

The aim of the process is:

- To analyze traffic flows in the network at different levels (NE & Interfaces).


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- To assess the actual flows versus the installed BSS architecture capacity : overdimensioning implies over investment, under dimensioning implies bottlenecks,

congestion and unbalanced investments.

The process diagram for network assessment is presented below.

FINISH

START

(1) Gathering DataNW Configuration Rules

Recommendation/Threshold

(2) Applying Dimensioning Methods

Counters/Indicators vs. Configuration analysis

for each Network Elements and Interfaces

(3) Assessment

- Identify bottle necks

- Identify need of new resources / new configuration

Figure 10: Network architecture assessment process

Step (1) Gathering data

The first step is to gather 2 different kinds of data from the network:

Traffic data: relevant countersor indicatorsretrieved from OMC-R or NPOmachines.

BSS network topology data: the existing number, location andconfigurationof each BSS network elements and interfaces.

Step (2) Applying dimensioning methods


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It is the process to analyse the traffic counters (or indicators) by applying the defined

dimensioning methods and theNetwork configuration rules.

The traffic analysis should be done individually at different level of NE and interfaces.

BSS network elements:

CELL dimensioning (for more details, please refer to section 3.1.3)

BSC dimensioning (for more details, please refer to section 3.3.3)

TC dimensioning (for more details, please refer to section 3.5.3)

GP(U) dimensioning (for more details, please refer to section 3.6.3)

BSS interfaces:

Abis dimensioning (for more details, please refer to section 3.2.2)

AterMUX dimensioning (for more details, please refer to section 3.4.4)

A dimensioning (for more details, please refer to section 3.4.4.1)

Gb dimensioning (for more details, please refer to section 3.7.2)

Step (3) Assessment

This is the last process to assess the installedcapacity versus usedcapacity (refer to the

traffic analysis results from step 2), based on therecommendation and given thresholdat

all levels of the BSS.

The assessment can identify the existing bottleneck that implies the lack of resources or

unbalanced resource usage.

Therefore, the proposed solutions should be implementing new resources and/or new

configuration and probably parameter modification.


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2.3 BSS Architecture Impact in B10

In B10 release, there are several improvements in term of architecture point of view.

These improvements are related to the introduction of new features as follows:

Multiple CCCH (B10MR1) Gb over IP (B10MR2)

Capacity Improvements (4000Erl in B10MR1, 4500Erl in B10MR2)

Optimized HR connectivity (B10MR1)

HSL functionality (B10MR1)

2.3.1 Multiple CCCH

The multiple CCCH (mCCCH) feature is required to support the increasing signalling load on

the common channels, due to either big CS cells with high peak throughput or to PS trafficwhen no master PDCH is configured.

The 3GPP defines up to 4 Time Slots (TS0, TS2, TS4 & TS6) to carry the CCCH information

on the beacon TRX of one cell.

From B10 MR1, the optional mCCCH feature allows to define a second CCCH TS: only TS0

and TS2 on beacon TRX will be used, while TS0 is foreseen for single CCCH timeslot.

0 21 3 4 5 6 7Beacon

TRX0 21 3 4 5 6 7

Beacon

TRX Figure 11: mCCCH mapping on Beacon TRX

The main benefits permit:

To handle high capacity cells

To handle cells with heavy traffic models (high BHCA, high HR usage)

To define larger Location Areas

Avoid master Channel (PBCCH/PCCCH) deployment

Anyway, it is also possible to use mCCCH feature when master PDCH is implemented.

The mCCCH feature that can be implemented in both G2 BSC and Mx BSC, and has impacts

for:

Telecom: main impact on Paging and Access Control entity O&M: impacts include the introduction of a new channel type CCH (BCCH +

CCCH) and change of the TRX mapping algorithm

In addition, TRE hardware limitation shall follow the below rules:

G3: maximum number of CCCH + SDCCH TS = 3

G4: maximum number of CCCH + SDCCH TS = 4

G5 (TWIN TRA): maximum number of CCCH + SDCCH TS = 4


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The mCCCH feature has impacts in the Paging and Access Control entity.

On radio interface, the capacity of the PCH paging channel will allow about 63 paging/s.

The following set of rules applying for the configuration of mCCCH:

1) CCH should be configured on TS2 of BCCH TRX

2) When BCCH is combined with SDCCH, CCH cannot be configured.

3) In BCCH TRX, when CCH is configured, only one Static SDCCH is allowed

4) In the cell with both BCC and CCH, the max number of SDCCH TS is extended to 22.

5) CBC and CBH are forbidden

6) Dynamic SDCCH is forbidden on BCCH TRX

7) Limitation rule on G2 TCU shall respect CCCH (BCCH) TS +SDCCH TS


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As shown in the following figure, the mix of GboIP and GboFR is allowed within one MFS.

MFS

SGSN

BSS4

BSS3

BSS2

GbIP Network

Frame Relay Network

BSS1

BSSGP

NSFR

BSSGPNSFR

BSSGP NS

UDP/IP

BSSGP NS

UDP/IP

Figure 12: MFS capacity

2.3.3 Capacity Improvements

With B10 release, the capacity of the Mx BSC has been improved in terms of TRX, cells and

traffic mix load.

The Mx BSC will support up to 1000TRX with 5 CPP boards in one ATCA shelf, the number

of supported cells has been improved to reach the target of 500 cells.

Regardless these improvements, Mx BSC will allow a capacity of up to 324000 BHCA, about

575000 paging/hour and up to 4000Erl (B10 MR1).

In B10 MR1, the committed capacity will allow up to 4000Erl with TPGSMv1 board, and up

to 4500Erl in B10 MR2with both the former TPGSMv1 and the new introduced TPGSMv3

board.Five Mx BSC configuration types are defined based on the number of active CCP boards that

support 200 TRX each.

Without Optimized HR connectivity feature, the B9 rule is still applied.

The following table gives the configuration data of each MX BSC configuration type.

200 TRX 900

400 TRX 1800

150

600 TRX

BSC EvoConfiguration

Max CS Load(Erlang)

BTSs

2600 (B9)2700 (B10)

255

255

800 TRX 3600 (B10)

1000 TRX 4000 (B10-MR1)4500 (B10-MR2)

255

255

200

Cells

264

264

500

500

96

AbisE1

96

176

176

176

10

Ater-CSE1

20

30

40

48

6

Ater-PSE1

12

18

24

28

Figure 13: B10 BSC capacity improvements


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2.3.3.1 Optimized HR connectivity

The Optimised half-rate connectivity feature is an optional feature that has been introduced

in B10 for BSC evolution capacity improvements.

Thanks to this feature, the TRX are no more weighted in terms of TRX equivalent, whether

FR or HR, and each CCP board can handle 200 TRX (e.g. 1 FR TRX = 1 HR TRX).

However, the CCP board is limited by a load of 1000 TCH simulaneously allocated.

This feature corresponds to the removal of HR connectivity constraints.

In case of half-rate usage, a maximum number of calls simultaneously established per CCP

board will be defined, so as to allow reaching 900Erl per CCP board, while not increasing the

external blocking.

2.3.3.2 HSL functionality

The ITU-T Recommendations have limited the amount of Signalling Links (SL) between two

adjacent Signalling Point (SP).

For Alcatel BSCs, there is a maximum of 16 SS7 signalling channels per BSC.

The signalling channel, called N7 channel, is carried over an individual 64kbps timeslot on

the AterMUX CS link; it is traditionally dimensioned with a 40% load.

In B9 release, Mx BSC was supporting up to 2600Erl that corresponds to a SS7 load of 60%.

To overcome the ITU-T limitation, High Speed Link (HSL) functionality has been introduced.

This HSL mode is only available with Mx BSC and it is used when Low Speed Link (LSL)

mode i.e. 64kbps SS7 channels is not sufficient for Mx BSC requiring a high SS7

signalling load or a high traffic mix model (1900Erl up to 4500Erl).

The HSL mode relies on the transport of SS7 signalling over a couple of 2Mbps PCM links:

Whatever the traffic load is

For redundancy and load sharing purposes

To double the BSC signalling throughput (for 4500Erl, the SS7 load is 33%)

HSL links are directly connected to MSC, without passing through TC

Figure 14: BSC - MSC connectivity with HSL mode

BSC MSCTC

HSL 2

HSL 1

ATERMUX Interface A


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2.3.4 STM-1 transmission in 9125 Transcoder

Transmission equipments usually represent a significant part of the Total Cost of

Ownership for a Network Operator. Traditionally based on E1 transport links, solutions for

the GSM transport network have evolved to other technologies, such as SDH.

In the Core Network as well, with introduction of NGN, SDH and IP networks havebecome the common transport solutions.

As the first network element at the crossing between BSS and Core Network, and usually

located on Core Network site, the transcoder must support STM-1 connectivity.

Integrated STM-1 interface on the TC G2.5 is foreseen to:

- reduce cost on interface equipment to SDH network;- reduce the cabling effort;- reduce the space needed for cables and distribution frames;- simplify cabling & assignment changes;- increase the reliability and availability.By the insertion of an STM-1 interface board in the existing Transcoder cabinet, the 9125

Transcoder can offer 4 protected OC-3/STM-1 optical interfaces, in mono-mode/short-haultype.

Each E1 link is transported transparently in one 2 Mbit/s VC12 container. One STM-1 link

can contain up to 63 VC12 containers.

2.3.5 Ater optimization

The Ater optimization is an optional B10 feature. It was introduce in order to globally

increase the ratio actual Gb throughput / Ater resources needed on the GPUs. The

optimization of the total amount of Ater resources needed on the GPU to support its PS

traffic will allow to reduce the number of Ater links of the GPUs.

An othe goal is to decrease the number of TBF establishment failures due to lack of Ater

resources (for a fixed amount of Ater resources available). This is because a non-optimal

usage of Ater resources can lead to failure/blocking situations for the incoming traffic on

the GPU due to the Ater congestion.

Some algorithmic changes were done. The intent of the technical corrections is to establish

(at most) n GCHs for each short TBF (short TBF meaning signalling or short data

transfer TBF), nbeing a low number.

The transfer of a given MS may have now 2 possible values: short data or data. An MS

transfer is considered to be short data as long as less than

N_DATA_BYTES_MAX_TRANS bytes have been transferred in both directions (sincethe TBF establishment(s)). Else, if more than N_DATA_BYTES_MAX_TRANS bytes

have been transferred in at least one direction, the MS transfer is considered to be data.

A short data MS transfer is supposed to cover both the GMM traffic case (signalling

case) and the cases of short actual data (e.g. short blackberry terminal transfers).


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3 Detailed BSS Architecture Process

This section describes in details of the BSS architecture process in release B10.

Several sub-sections are created to focus on each network elements and interfaces.

3.1 BTS

The area covered by a BSS is divided into cells and each cell is managed by a BTS.

Each BTS consists of radio transmission and reception devices including antennae and signal

processing equipment for the Air Interface.

3.1.1 BTS Configuration

The following diagram presents the BTS generations, which are supported in release B10.

BTSGeneration

Evolium EvolutionG1 BTS G2 BTS Evolium BTS

G1 BTS MK II

with DRFU

G2 BTS

DRFU

G3 BTS

M4M

G4 BTS

M5M

GPRSCS-1, CS-2

GPRSCS-1, CS-2

GPRSCS-1, CS-4

GPRS CS-1, CS-4EDGE MCS-1, MCS-9

G5 BTS

Twin

BTSGeneration


G1 BTS MK II

with DRFU

G2 BTS

DRFU

G3 BTS

M4M

G4 BTS

M5M

BTSGeneration


G1 BTS MK II

with DRFU

G2 BTS

DRFU

G3 BTS

M4M

G4 BTS

M5M

GPRSCS-1, CS-2

GPRSCS-1, CS-2

GPRSCS-1, CS-4

GPRS CS-1, CS-4EDGE MCS-1, MCS-9

G5 BTS

Twin

Figure 15: BTS generation/type supported in B10

G1 BTS 1stBTS Generation

Only MKII with DRFU is supported in B10. It stays at B7.2 functionality and its

configuration is presented in Table 2.

Type Characteristic Nb of sectors Nb of TRX GSM 900MKII Std + DRFU 1 8 x

Data in this table, based on [9]

Table 2: Configuration G1 BTS MKII with DRFU

For more details, please refer to [1] and [3]


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G2 BTS 2ndBTS Generation

Only G2 BTSwith DRFUis supported in B10 with following the rule: the FUMO in

G2 BTS must be replaced by DRFU before B7/B8 release migration.

G2 BTS stays at B7.2 functionality and its configuration is presented in Table 3.

Extension / Reduction

Physical LogicalMin Max

G2 1 TRE 1 Sector: 8 TRE 1 TRE 1 TRE

ConfigurationBTS

Min


Table 3: Configuration G2 BTS


Evolium BTS 3rdBTS Generation

The Evolium BTS is designed with some improvements as compared to the previous

BTS generation (G2). The main changes (related to architecture design) are:

Support Abis Statistical Multiplexing (64kbps and 16kbps)

Secondary Abis link (except micro BTS M4M)

GPRS CS-3, CS-4 is available

Support TWIN TRX modules (since B9 MR4)

From B9 support, Evolium BTSs include G3 BTS, G3.5 BTS (which is G3 BTS with

new power supply modules) and micro BTS M4M. See their configurations in Table 4.

Extension/ReductionConfiguration

Physical LogicalBTS

Min Max Min

Evolium BTS

(G3 / G3.5)1 TRE Up to 18 TRE (1 to 6 sectors) (since B9MR4) 1 TRE TRE

M4M

(micro BTS)2 TRE Up to 6 TRE (1 to 6 sectors) 2 TRE 1 TRE


Table 4: Configuration Evolium BTS



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Evolium Evolution 4thBTS Generation

Further evolutions (from Evolium BTSs) introduce new main features:

G4 BTS platform is ready for EDGE and E-GPRS.

GSM 900 output power has been increased to 45W.

The new architecture of the Transceiver module (digital & analogue parts on thesame board) brings the possibility to develop a low power TRE that would allow

achieving 18 TRX capacity in one rack.

Since B9 support, Evolium Evolution BTSs include:

G3.8 BTS, which is G3.5 BTS with SUMA, ANC, new power supply modules

G4.2 BTS, which introduces a new TRE with EDGE HW Capability

Micro BTS M5M

TWIN TRX modules (since B9MR4)

Their configurations are presented in Table 5.

Extension/ReductionConfiguration

Physical LogicalBTS

Min Max Min

Evolium BTS

(G3.8 / G4.2)1 TRE Up to 18 TRE (1 to 6 sectors) (since B9MR4) 1 TRE 1 TRE

Evolium BTS(G5)

1 TRE Up to 24 TRE (1 to 6 sectors) (since B9MR4) 1 TRE 1 TRE

M5M

(micro BTS)2 TRE Up to 12 TRE (1 to 6 sectors) 2 TRE 1 TRE


Table 5: Configuration Evolium Evolution

N.B.In case of BTS housing TWIN TRA modules and G3 TRX a maximum number

of 12 TRX is allowed.

For more details, please refer to [1], [6], [7]


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Summary BTS Hardware Capability B10 release

As shown in Table 6:

G1BTS G2 BTSG1 BTS MKII

DRFU G2BTS DRFU G3 BTS M4M G4 BTS M5MNo Multiplexing x x x x x x

16K Static Multiplexing x x x x x

64K Statistical Multiplexing x x x x


2nd Abis access x x x

FR x x x x x x

DR x x x x x x

AMR x x x x x x

EFR x x x x x x

GPRS (CS-1, CS-2) x x x x x x

GPRS (CS-3, CS-4) x x x x

EGPRS (MCS-1 to MCS-9) x x

GSM 850 x x

GSM 900 x x x x x x

GSM 1800 x x x x x

GSM 1900 x x x x

850/1800 x x x

850/1900 x x x

900/1800 x x x x

900/1900 x x x

Multi

band

Evolium BTS Evolium EvolutionB9 release

Abis

feature

Voice

Traffic

Data

Traffic

Mono

band

B10 release

G1BTS G2 BTSG1 BTS MKII

DRFU G2BTS DRFU G3 BTS M4M G4 BTS M5MNo Multiplexing x x x x x x

16K Static Multiplexing x x x x x



2nd Abis access x x x

FR x x x x x x

DR x x x x x x

AMR x x x x x x

EFR x x x x x x

GPRS (CS-1, CS-2) x x x x x x

GPRS (CS-3, CS-4) x x x x

EGPRS (MCS-1 to MCS-9) x x

GSM 850 x x

GSM 900 x x x x x x

GSM 1800 x x x x x

GSM 1900 x x x x

850/1800 x x x

850/1900 x x x

900/1800 x x x x

900/1900 x x x

Multi

band

Evolium BTS Evolium EvolutionB9 release

Abis

feature

Voice

Traffic

Data

Traffic

Mono

band

B10 release


Table 6: BTS HW Capability in B10

TRX hardware description

Three main types of Transceiver modules are implemented since G3 BTS generation;

the Evolium TRE, the EDGE TRA and the Twin TRX.

These Transceivers can cover either GSM band or DCS band.

The Evolium TRE, which is the first version of Evolium transceiver, do not allow

EDGE activation, however G3 BTS can offer EDGE services on each cell if one EDGE

TRA(or Twin TRX) module is implemented on that cells.

The operation that consists to replace an Evolium TRE module by an EDGE TRA /

Twin TRX is called a REFRESH (or NORIA) operation.

The EDGE TRA is the first Evolium transceiver that is EDGE capable.

The Twin TRX module is a module that can be used in two different modes

Capacitymode that generates two functional TRX (16 RTS), in the same or differentcells, with same radio performances as TRA Medium Power(45W GMSK in 900MHz),

Coveragemode (Tx Diversity mode) that generates a single functional TRX (8 RTS)allowing either:

Higher Output Power due to Tx diversity ("air coupling") usage (113W to 175WGMSK in 900MHz, and 88W to 136W GMSK in 1800MHz

Higher Sensitivity (-117.4 to -121dBm) due to 4Rx Uplink Diversity usage (2RxDiversity also possible)


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The following table describes the transceiver hardware since G3 BTS generation.

YesTGT18A9100 TRX 1800 TWING5


YesTADHEA9100 TRX 1800 HP EDGE PLUSG4

YesTAGHEA9100 TRX 900 HP EDGE PLUSG4

YesTRADEA9100 TRX 1800 EDGE PLUSG4

YesTRAGEA9100 TRX 900 EDGE PLUSG4

YesTADHA9100 TRX 1800 HP EDGE COMPATIBLEG4

YesTAGHA9100 TRX 900 HP EDGE COMPATIBLEG4

YesTRAPA9100 TRX 1900 EDGE COMPATIBLEG4

YesTRALA9100 TRX 850 EDGE COMPATIBLEG4

YesTRADA9100 TRX 1800 EDGE COMPATIBLEG4

YesTRAGA9100 TRX 900 EDGE COMPATIBLEG4

NoTRDHTRX 1800 60W DR-EFR 9100G3

NoTRDMTRX 1800 35W DR-EFR 9100G3

NoTRGMTRX 900 35W DR-EFR 9100G3

EDGEMNEMOTRX TypeGeneration



YesTADHEA9100 TRX 1800 HP EDGE PLUSG4

YesTAGHEA9100 TRX 900 HP EDGE PLUSG4

YesTRADEA9100 TRX 1800 EDGE PLUSG4

YesTRAGEA9100 TRX 900 EDGE PLUSG4

YesTADHA9100 TRX 1800 HP EDGE COMPATIBLEG4

YesTAGHA9100 TRX 900 HP EDGE COMPATIBLEG4

YesTRAPA9100 TRX 1900 EDGE COMPATIBLEG4

YesTRALA9100 TRX 850 EDGE COMPATIBLEG4

YesTRADA9100 TRX 1800 EDGE COMPATIBLEG4

YesTRAGA9100 TRX 900 EDGE COMPATIBLEG4

NoTRDHTRX 1800 60W DR-EFR 9100G3

NoTRDMTRX 1800 35W DR-EFR 9100G3

NoTRGMTRX 900 35W DR-EFR 9100G3

EDGEMNEMOTRX TypeGeneration

Table 7: TRX HW capability since G3 BTS generation

3.1.1.1 Cell Configuration

Cell Types: the following table describes all the cell types (with profile type

parameters) available in B10.

Dimension Coverage Partition Range

Micro Micro Overlaid Normal NormalSingle Macro Single Normal NormalMini Macro Overlaid Normal NormalExtended Macro Single Normal ExtendedUmbrella Macro Umbrella Normal NormalConcentric Macro Single Concentric NormalUmbrella-Concentric Macro Umbrella Concentric NormalIndoor Micro Micro Indoor Normal Normal

Profile Type ParametersCell Type


Table 8: Cell Types

Extended Cell:

Its configuration is a BTS with up to 4 TRX in the inner cell and up to 4 TRX in the outer cell.

M4M and M5M do not support extended cell configurations.

Only one extended cell per BTS is possible.


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Shared Cell:

A cell shared by several BTSs is possible to support up to 16 TRX (software limitation).

With Twin TRX, the 16 TRX limitation can be reached without using shared cell method.

Only the A9100 Evolium BTS (G3 BTS & G4 BTS) support shared cell.

The BTSs in a shared cell must be clock synchronized.

M4M and M5M do not support a shared cell because they cannot be clock synchronized.

Frequency Hopping:

The Table 9 shows the hopping types supported in B10.

Hopping Type Supported in B9Non Hopping (NH) x

Base Band Hopping (BBH) x

Radio Hopping (RH) * -Non Hopping / Radio Hopping (NH/RH) x

NH/RH with Pseudo Non Hopping TRX x

BBH with Pseudo Non Hopping TRX x Data in this table, based on [1]

* RH works only with M1M and M2M that are now obsolete.

Table 9: Frequency Hopping supported in B10

3.1.1.2 SDCCH Configuration

Since B8 release, the dynamic SDCCH allocation feature is a new mechanism that providesautomatic (the optional number of) SDCCH in the cell, which translates as a set of dynamic

SDCCH/8 TS, used for TCH traffic or for SDCCH traffic, depending on the requirement.

Principle:

Static SDCCH sub-channels are defined to handle normalSDCCH traffic.

Dynamic SDCCH sub-channels are defined to handle highSDCCH traffic.

Main Rules:

At least one static SDCCH/8 or SDCCH/4 timeslot on BCCH TRX must be configured in a cell.

Combined SDCCHs (SDCCH/4 + BCCH) are always static.

The total number of SDCCH sub-channels configured on static or dynamic SDCCH TS or on a

BCCH/CCCH TS (CCCH combined case) must not exceed 24 sub-channels per TRX and 88sub-channels per cell.

In order to avoid incoherent allocation strategies between SDCCH and PDCH, a dynamic

SDCCH/8 TS cannot be a PDCH.

BTS with DRFU do not support dynamic SDCCH allocation.

In A9130 BSC Evolution it is not allowed more than one SDCCH TS per TRX.


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Recommended SDCCH configuration:

In a cell, the number of SDCCHs is defined variously, based on:

- Location Update (LU) signalling traffic: 1 LU/call for standard cell

- SMS signalling traffic: 0.5 SMS/call for standard cell

- Numberof TRXs

Recommended default number of SDCCH and configuration are presented in Table 10.

Total SDC SDD

1 Yes 12 4 82 Yes 12 4 82 No 24 8 163 No 24 8 164 No 32 8 245 No 32 8 24

6 No 32 8 247 No 40 16 248 No 40 16 249 No 48 16 3210 No 48 16 3211 No 48 16 3212 No 56 16 4013 No 56 16 4014 No 64 24 4015 No 72 24 4816 No 72 24 48

Number of TRXs BCCH CombinedNumber of SDCCH sub-channels


Table 10: Recommended SDCCH configuration for astandardcell only FRTRXs

Remarks:

1) SDC means Static SDCCH, SDD means Dynamic SDCCH, and Max presents themaximum number of SDCCHs (SDC+SDD) that may be allocated in a cell.

2) Up to 16 TRXs are possible to be configured for a cell thanks to shared cell feature.

3) For one TRX, dynamic SDCCH are over-dimensioned because of the granularity of 8.According to Alcatel traffic model, all dynamic SDCCH will not be used.

4) An additional dynamic SDCCH/8 must be provided for each DR TRX (these areexpected mainly on small cells).

5) For some particular cells with high (LU and/or SMS) signalling load, the operator will

probably need to customize the number of SDCCHs (different from therecommendation) according to his requirements; otherwise the SDCCH dimensioningshould be applied (please refer to section 3.1.3.1).



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3.1.2 Determination of BTS configuration

For each sites, it is necessary to define the number of required BTSs, which depends on the

total number of required TRXs and cells and maximum capacity of the given BTS (refer to

section 3.1.1).

To determine the number of required TRXs, the cell dimensioning (refer to section 3.1.3) isneeded to start first, and then the following processes to determine BTS configuration will be

performed afterwards as shown in Figure 16.

Nb of requiredTRXs

Nb of requiredcells

Max. Capacity of

the given BTS

Assessment

(comparision)

OKUnder-dimensioning

Increase installed BTSs

Required >

Required =

Required


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3.1.3.1 SDCCH Dimensioning

Target:To estimate the number of SDCCH resources needed at Cell level.

Gathered Counters:

Counter Name Indicator Name Definition

MC400 GSDTRT Cumulated time during which the SDCCH sub-channels belonging

to the related static or dynamic SDCCH timeslots are busy.

MC04 GSDNACGN Number of unsuccessful SDCCH sub-channel selection (all

SDCCH sub-channels are busy or Out of Service).

MC148 GSDNACAN Number of SDCCH attempts for any other purpose than HO

(Channel Activation).

Table 11: Counter list - SDCCH dimensioning

Measured Object: Cell

Gathering periods: 7-day Busy Hour data, recommended

Otherwise, at least 2 working-day Busy Hour data

Note: Busy Hour means the hour gives the highest SDCCH traffic (i.e. MC400) of the day.

Methodology:

The process of SDCCH dimensioning is presented in Figure 17.

Erlang B

RequiredSDCCH Traffic

GoS:

% SDCCH blocking

Nb of required

SDCCH sub-

channels /

timeslots

INPUT OUTPUTMETHOD

Figure 17: SDCCH dimensioning process

INPUT

The required SDCCH traffic is computed as below formula.

%),cong_SDCCH(%Min

traffic_SDCCH_Measuredtraffic_SDCCH_quiredRe

301=

Note: 30% is defined as the max congestion rate to be considered because several congestions can be

re-produced from one given user trying to access the network several times.


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Where:

3600

400__

MCtrafficSDCCHMeasured =

%10014804

04

_% += MCMC

MC

congSDCCH

The other input is Grade of Service (GoS), which is defined by the required SDCCH

congestion rate (pSDCCH).

Normally GoS should be given or agreed by the Mobile Operator.

The typical value for the required SDCCH congestion rate is 0.5%.

METHOD

Concerning only CS traffic, the statistical law Erlang B is used during the dimensioning

process to determine the necessary resources versus the traffic and the target GoS.

As SDCCH is associated to CS traffic only, Erlang B can be applied to calculate the

required number of SDCCH sub-channels according to required SDCCH traffic and the

target congestion rate.

OUTPUT

Number of required SDCCH sub-channels

= Erlang B (Required_SDCCH_traffic, pSDCCH)

Then,

Number of required SDCCH Timeslots

Nb of required SDCCH sub-channels / 8; for non- BCCH combined cell

(Nb of required SDCCH sub-channels 4) / 8; for BCCH combined cell

Assessment:

When % SDCCH congestion (of any cell) > pSDCCH, the SDCCH re-dimensioning is

needed.

=


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3.1.3.2 TCH/PDCH Dimensioning

Target:To estimate the number of TCH & PDCH resources needed at Cell level.

Gathered Counters: TCH


MC380a GTCTRFT Time during which the TCH FR are busy

MC380b GTCTRHT Time during which the TCH HR are busy

MC812 GTCNACGN Number of failures when switching from SDCCH to the TCH

(call establishment only) due to congestion on Air Interface

channels (RTCH).

MC703 GTCNACAN Number of TCH successfully selected for any purpose other

than HO.

Table 12: Counter list - TCH dimensioning

Gathered Counters: PDCH


P451b GARPDCTDBUT Cumulative time during which a DL TBF uses on PDCH, for

all PDCHs and for all the TBFs of the cell (established in

GPRS mode or EGPRS mode).

P451a GARPDCTUBUT Cumulative time during which a UL TBF uses on PDCH, for

all PDCHs and for all the TBFs of the cell (established in


P14 GQRDTECGN Number of DL TBF establishment failures due to radio

congestion (no radio resource in the MFS at PDU life time

expiry). Applied to GPRS and EGPRS MS.

P27 GQRUTECGN Number of uplink TBF establishment failures due to

congestion (no radio resource in the MFS).

P91a+P91b+P91c+

P91d+P91e+P91f+P505

GTRDTERQN Number of DL TBF establishment requests per cell.

P62a+P62b+P62c-

P438c + P507

GTRUTERQN Number of UL TBF establishment requests per cell.

P38e GARPDCUDBUT Cumulative time during which the slave PDCHs are

established and carry at least one DL TBF (established in


P38f GNPACUUBUT Cumulative time during which the slave PDCHs are

established and carry at least one UL TBF (established inGPRS mode or EGPRS mode).

P20x

(x = ad)

GQRPDDRxN

(x = 1,.. ,4)

In acknowledged mode, number of DL RLC data blocks

(except RLC blocks containing LLC Dummy UI Commands

only) on PDTCH encoded in (M)CS-x (i.e. CS-1 (P20a)

CS-4 (P20d)) retransmitted due to unacknowledgement of the

MS.


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P20f+P20g+P20h+

P20i+P20j+...+P20n

(x = fn)

GQRPDDRMN In acknowledged mode, number of DL RLC data bytes

encoded in all MCS-x and retransmitted due to

unacknowledgement of the MS. RLC blocks containing LLC

dummy UI commands are not counted.

P21x

(x = ad)

GQRPDURxN

(x = 1,.. ,4)

In acknowledged mode, number of UL RLC data blocks on

PDTCH encoded in (M)CS-x (i.e CS-1 (P21a) CS-4(P21d)) retransmitted due to unacknowledgement of the MFS.

P21f+P21g+P21h+

P21i+P21j++P21n

(x = fn)

GQRPDURMN In acknowledged mode, number of UL RLC data bytes

encoded in all MCSx and retransmitted due to

unacknowledgement of the MFS.

P55x

(x = a,.. ,m)

GTRPDDCxN

(x = 1,.. ,4)

GTRPDDMyN

(y = 1,.. ,9)

Number of useful DL RLC blocks sent in RLC acknowledged

mode on PDTCH encoded in (M) CS-x i.e. CS-1 (P55a)

CS-4 (P55d) and MCS-1 (P55e) MCS-9 (P55m).

P57x

(x = a,.. ,m)

GTRPDUCxN

(x = 1,.. ,4)

GTRPDUMyN(y = 1,.. ,9)

Number of useful UL RLC blocks received in RLC

acknowledged mode on PDTCH encoded in (M) CS-x i.e. CS-

1 (P57a) CS-4 (P57d) and MCS-1 (P57e) MCS-9

(P57m).

Table 13: Counter list - PDCH dimensioning

Measured Object: Cell

Gathering periods: 7-day Busy Hour data, recommended

Otherwise, at least 2 working-day Busy Hour data

Note: Busy Hour means the hour gives the highest TCH & PDCH traffic of the day.

Methodology:

The process of TCH/PDCH dimensioning is presented below.

Kaufmann-

Robert

Algorithm

CS service

input data

PS service

input data

Total

required TS

for TCH and

PDCH

INPUT OUTPUTMETHOD

Figure 18: TCH/PDCH dimensioning process

INPUT

(1)CS service input data:

CS Traffic Intensity in Erlang:

The CS traffic intensity is calculated separately between Full Rate (FR) and Half

Rate (HR) Traffic.

The calculation will take into account the real measured traffic and additional margin

from congestion rate.


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The way to calculate the congestion rate for FR and HR is presented below:

Per)Real_Cong__CS%,min(Per_Cong_CS 30=

Note: 30% is defined as the max congestion rate to be considered because several congested calls

can be re-produced from one given user trying to access the network several times.

RequestnRTCH_Assig

CongnRTCH_Assigng_PerCS_Real_Co

_

_=

703812 MCMC

MC812

+=

As there is no specific coun

b10 bss arch serv guideline ed2

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