avr modern risc architecture: compact and fast. tuned for high level languages. consistent...

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AVR Modern RISC architecture: Compact and FAST. Tuned for high level languages. Consistent architecture across entire line. Small AVR are subsets of larger chips: Same hardware and code works across all chips. I/O structure reduces need for external components. Flash based, ultra trivial downloading of code.

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Page 1: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

AVRAVRModern RISC architecture: Compact and FAST.Tuned for high level languages.Consistent architecture across entire line.Small AVR are subsets of larger chips: Same

hardware and code works across all chips.I/O structure reduces need for external components.Flash based, ultra trivial downloading of code.

Page 2: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

AVR RISC ArchitectureAVR RISC Architecture

Single Cycle Instructions: 8mhz = 8mips.

Large register file (32).Every register an

accumulator.3 index register pairsRegister & IO are mapped

in SRAM space.

Page 3: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

Typical Hardware SupportTypical Hardware Support

Internal or External Oscillator/Clock

Brown Out DetectorOne or more timersTwo or more PWMOne or more USARTI2C

Real time clock10bit ADC Analog ComparatorExternal interruptsPulse timing captureEEPROMUSB/CAN/RF

Page 4: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

ToolsToolsAtmel Studio: IDE & Simulator/debugger.BASCOM: Basic compiler & IDE with

programmer.GNU C compiler (free, very high quality).Third party C compilers vary from cheap to very

expensive.FLASH programmers are trivial to make.

Page 5: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

Availability & PriceAvailability & Price

www.digikey.com has everything (single unit price):Attiny26 (2k, ADC, USI, 2 PWM, 2 ports) $2.58ATmega16 (16k, ADC, etc, 4 ports) $7.74ATmega128 (128k, 6 ports, oodles of stuff) $16.34STK500 (development board) $79ICE200 (In circuit emulator) $100ATAVRISP (serial programmer) $29

Page 6: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

I/O Example: simple switchI/O Example: simple switch

No external parts

Page 7: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

Input Example: Trinary Input

Input Example: Trinary Input

Three states with one input.Useful way to expand IO.Switch internal resistor on/off

to determine state of pin.Off: If input high, then J1-2.On: if low, then J2-3.On: If high, then no jumper.

Page 8: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

Input example: Photo-detector

Input example: Photo-detector

Schmitt trigger inputs on all lines.

No additional signal conditioning needed.

Stable, well defined trip points.

Basic circuit works well for Quadrature encoders.

Page 9: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

Input Example: Variable Input

Input Example: Variable Input

Useful for parts without ADC.Set pin to output, low to

discharge capacitor.Set pin to input, no pull-up.Increment counter until input

reads 1.Linear conversion.

Page 10: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

Case StudiesCase Studies

BASCOM based multi-tasking Minisumo code in less than 2k

Dilbert II written with GCC in less than 6kGyrobot written with GCC in less than 6k

LCD user interfacePID based motion controlSensor tasks managing tilt, gyro and wheel encoders

R/C Tether uses variable input (PC Joystick)

Page 11: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

ResourcesResources

www.barello.net/ARCwww.barello.net/Paperswww.avrfreaks.netwww.mcselec.com/download_avrwww.atmel.com/

Page 12: AVR  Modern RISC architecture: Compact and FAST.  Tuned for high level languages.  Consistent architecture across entire line.  Small AVR are subsets

Cool projects & pagesCool projects & pages

http://www.mysunrise.ch/users/pfleury/index.htmlhttp://instruct1.cit.cornell.edu/courses/ee476/www.barello.net/Robotswww.egnite.de (ethernet & web software)www.avrfreaks.net (Academy tab, must register)