avid: breaking processors for increased performance & reduced power consumption

AVID: Breaking Processors AVID: Breaking Processors for Increased Performance for Increased Performance

& Reduced Power & Reduced Power ConsumptionConsumption

Douglas Lacy & Daniel LeCheminantDouglas Lacy & Daniel LeCheminant

CS 252CS 252

December 10, 2003December 10, 2003

22AVID: Breaking Processors for Increased Performance & Reduced Power ConsumptionAVID: Breaking Processors for Increased Performance & Reduced Power Consumption

BackgroundBackground

Todd Austin’s DIVA paperTodd Austin’s DIVA paper

DIVA dynamically verifies all instructions, DIVA dynamically verifies all instructions, guarding against transient and permanent guarding against transient and permanent faultsfaults

Austin speculated that DIVA could allow Austin speculated that DIVA could allow throttling of processor clock speedthrottling of processor clock speed


Background / MotivationBackground / Motivation

DIVA: maintains correctness even with DIVA: maintains correctness even with malfunctioning hardwaremalfunctioning hardware

Is there a way to “break” the core Is there a way to “break” the core processor in such a way as to optimize it?processor in such a way as to optimize it? Remove rarely-used components?Remove rarely-used components? Reduce tolerance in clock cycle, voltage, etc?Reduce tolerance in clock cycle, voltage, etc? May be possible to dynamically alter May be possible to dynamically alter

processor to be only as correct as necessaryprocessor to be only as correct as necessary


MotivationMotivation

Some components of processors exist to Some components of processors exist to ensure correctness in rarer casesensure correctness in rarer cases May waste resources and cycles to check May waste resources and cycles to check

these casesthese cases With DIVA, we can ignore them, mostlyWith DIVA, we can ignore them, mostly

““Rare” is variableRare” is variable Could be lazy with some computations, need Could be lazy with some computations, need

to be more strict with othersto be more strict with others Which are possible is dependent on programWhich are possible is dependent on program



cc1cc1 anagramanagram compresscompress

% Loads% Loads 23%23% 24%24% 21%21%

% Stores% Stores 14%14% 10%10% 14%14%

% Loads/% Loads/

StoresStores37%37% 33%33% 36%36%



Specifically, what can we remove/throttle?Specifically, what can we remove/throttle? Memory disambiguationMemory disambiguation Branch predictionBranch prediction

Branch checkingBranch checking ExceptionsExceptions Long-latency operations (multiply & divide)Long-latency operations (multiply & divide) Rare instructions?Rare instructions? PrefetchingPrefetching


Proposal: AVIDProposal: AVID

AVID: Architecture that Varies, Input AVID: Architecture that Varies, Input DependentDependentUse a DIVA unit to provide verification, Use a DIVA unit to provide verification, and also feedback to the core processorand also feedback to the core processorCan dynamically throttle operations from Can dynamically throttle operations from most time/power-consuming and correct to most time/power-consuming and correct to least consuming and sometimes incorrectleast consuming and sometimes incorrectWon’t require much more hardware than Won’t require much more hardware than standard DIVAstandard DIVA


AVID!AVID!


More AVIDMore AVID

Branch predictorsBranch predictors Static, bimodal, 2-level, hybridStatic, bimodal, 2-level, hybrid

Multiply/DivideMultiply/Divide Truncate inputs, run for fewer cyclesTruncate inputs, run for fewer cycles

LoadsLoads Allow them to proceed past unresolved storesAllow them to proceed past unresolved stores

Clock cycle throttlingClock cycle throttling Start fast, reduce speed if errors crop upStart fast, reduce speed if errors crop up


MethodologyMethodology

Simulate in SimpleScalarSimulate in SimpleScalar

Base architecture: Standard DIVABase architecture: Standard DIVA

Modify simple scalar to include a core & Modify simple scalar to include a core & DIVA unitDIVA unit

Modify base architecture into AVIDModify base architecture into AVID

DIVA catches all errors so processor is still DIVA catches all errors so processor is still functional & reliablefunctional & reliable


Run benchmarks on both architectures & Run benchmarks on both architectures & compare performance (SPEC or similar)compare performance (SPEC or similar) CPI: Read from simulator outputCPI: Read from simulator output Exec. Time: Total cycles * cycle timeExec. Time: Total cycles * cycle time

Power ConsumptionPower Consumption Total cycles * constant + Total cycles * constant +

branch predictions * constant for type of pred.branch predictions * constant for type of pred.

Amount of hardwareAmount of hardware

ComparisonComparison


Results: CPI in Best CaseResults: CPI in Best Case

cc1cc1 anagramanagram compresscompress

BaseBase 1.0890 1.0890 0.49850.4985 0.58330.5833

No Load No Load StallsStalls 1.08791.0879 0.49820.4982 0.58150.5815

Reduced Reduced MultiplyMultiply 0.49840.4984

SimpleScalar run with relaxed constraints without producing errors


Results: Power ConsumptionResults: Power Consumption

progprog progprog progprog

BaseBase

BimodalBimodal

2-Level2-Level

DynamicDynamic


ConclusionsConclusions

No long benchmarks successfully runNo long benchmarks successfully run

Preliminary results promising in some Preliminary results promising in some areas, discouraging in othersareas, discouraging in others

AVID may be best for reducing power AVID may be best for reducing power consumptionconsumption

AVID could be extended for further AVID could be extended for further dynamic alteration of processors, limited dynamic alteration of processors, limited reconfigurable computingreconfigurable computing


Future WorkFuture Work

Extension of AVID to throttle other Extension of AVID to throttle other possible componentspossible components

Further static removal of componentsFurther static removal of components

Actual full SPEC benchmark comparisons Actual full SPEC benchmark comparisons of standard, DIVA, and AVID architecturesof standard, DIVA, and AVID architectures

Exploration of speculation in several ways, Exploration of speculation in several ways, using AVID for verification and feedbackusing AVID for verification and feedback


Questions?Questions?

You know you have them! Ask!You know you have them! Ask!

Go on, pick us apart!Go on, pick us apart!

avid: breaking processors for increased performance & reduced power consumption

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