A Pattern Recognition Approach to Transistor Array Parameter Variance

Luciano da F. Costa,1 Filipi N. Silva,1 and Cesar H. Comin1

1São Carlos Institute of Physics, University of São Paulo, São Carlos, SP, Brazil

The properties of bipolar junction transistors (BJTs) are known to vary in terms of their param-eters. In this work, an experimental approach, including pattern recognition concepts and methodssuch as principal component analysis (PCA) and linear discriminant analysis (LDA), was used toexperimentally investigate the variation among BJTs belonging to integrated circuits known as tran-sistor arrays. It was shown that a good deal of the devices variance can be captured using only twoPCA axes. It was also verified that, though substantially small variation of parameters is observedfor BJT from the same array, larger variation arises between BJTs from distinct arrays, suggest-ing the consideration of device characteristics in more critical analog designs. As a consequenceof its supervised nature, LDA was able to provide a substantial separation of the BJT into clus-ters, corresponding to each transistor array. In addition, the LDA mapping into two dimensionsrevealed a clear relationship between the considered measurements. Interestingly, a specific mappingsuggested by the PCA, involving the total harmonic distortion variation expressed in terms of theaverage voltage gain, yielded an even better separation between the transistor array clusters.

I. INTRODUCTION

Bipolar transistors are at the root of modern electron-ics, but the variability of their parameters remains animportant phenomenon with important theoretical andpractical implications. Perhaps as a consequence of theadoption of negative feedback in promoting circuit invari-ance to transistor parameters, the variability of transistorbehavior has received relatively little attention in the lit-erature more recently. There have been several worksaddressing this problem at a larger integration and pro-cessing scales (e.g. [1]), typically considering digital ap-plications, but relatively fewer works have addressed dis-crete device variance in analog electronics. Yet, a betterunderstanding of transistor variability at the individuallevel remains an important issue because it can help, ina number of ways, the design of better electronic circuits(e.g. [2]). Ultimately, all large scale integration systemsare composed by a massive number of individual transis-tors. For instance, the knowledge of the current gain of anindividual (or a lot of) BJT provides valuable subsidiesfor deciding how much gain can be sacrificed to negativefeedback in exchange for circuit improvements. In addi-tion, recent findings [3] suggest that the latter techniquemay have limited effects in ensuring transistor parameterinvariance, motivating further related research, as wellas design procedures that take into account the specificcharacteristic curves and parameters of each individualdevice.

Interestingly, though important issues such as tran-sistor parameter dependency have been addressed insemiconductor physics, it usually does not go to thelevel of probing industrialized devices, so there is sub-stantial space for research aiming at bridging this gap.Fortunately, many advances in instrumentation [4], sig-nal analysis techniques [5, 6], powerful multivariate sta-tistical [7, 8] and pattern recognition [9, 10] methodshave paved the way to devising experimental approachesthat can contribute to our understanding of industri-alized transistor variability. In a recent study [3], we

showed that discrete BJTs variance is relatively con-strained within each transistor type, but much largeramong different types of transistors. These differenti-ating variabilities are such that well-defined clusters oftransistors could be identified, each of such clusters cor-responding to respective transistor types. However, theintra-cluster variance resulted markedly distinct for dif-ferent types, resulting in clusters of different sizes andshapes. One of the important consequence of such find-ings, at least for the considered devices and configura-tions, is that transistor variability is not as large as toprevent statistical methods to be applied to character-ize specific types. It was also shown that the variabil-ity of BJTs is mostly a two-dimensional phenomenon,in the sense that two linear combinations of traditionaltransistor characteristics was found to be enough to ac-count for 88% of the variability of the considered BJTs.Despite such interesting findings, an important ques-tion remained unanswered mainly concerning the possi-ble causes of BJT variability. More specifically, it wouldbe interesting to investigate to what an extent such avariance depends on transistors sharing or not the samesubstrate. After all, devices sharing the same substratehave been exposed to almost identical fabrication condi-tions.

Here, we resort to pattern recognition concepts andmethods, including principal component analysis (PCA)and linear discriminant analysis (LDA), to investigatetransistor arrays, namely integrated circuits containingseveral BJTs in a common substrate, therefore providingan interesting laboratory to study transistor variability.Such types of ICs were produced during the 80’s and 90’sfor several applications, such as buffering, driving, powercontrol, audio, among other possibilities. One of the ad-vantages of such arrays, as indicated in the respectivedatasheets, would be more controlled device characteris-tics as a consequence of the common substrate and fabri-cation conditions shared by the devices. However, to ourknowledge, few (or no) systematic experimental data isavailable in the literature regarding the characteristics of

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transistor arrays.So, transistor arrays constitute an interesting resource

to complement our previous investigations of transistorvariability. More specifically, here we experimentally ob-tain characteristic curves for 6 devices in 50 transistorarrays, totaling 300 BJTs. Voltage and current gains,as well as Total Harmonic Distortion (THD) measure-ments were obtained respectively to a modified commonemitter class A configuration. Several features of eachtransistor were then numerically estimated, and severalmodern pattern recognition concepts and methods — in-cluding PCA and LDA — were used to investigate clus-tering and variability of individual transistors. Severalinteresting results are reported. First, we have that, asexpected, the parameter variability among transistors ina same array is much smaller (by an approximate factor of20 with respect to current gain) compared to the overallvariability among transistors from all arrays. The overalldistribution of parameters was analyzed using PCA andsubsequent density estimation, and found to be possiblydistributed between two main peaks, suggesting the exis-tence of two prototypes, at least for the considered BJTsamples and conditions. The variation among the arrayswas found not to be negligible, indicating that more crit-ical analog projects involving more than one array mayjustify acquiring and taking into account the experimen-tal characteristics of the used devices. Further analysisby using LDA revealed an improved seggregation betweenthe transistor arrays, as well as a clear relationship be-tween the measurements. An even better separation be-tween the transistor arrays was achieved by mapping theTHD in terms of a combination of measurements derivedfrom the PCA. The obtained results indicate that a gooddeal of transistor parameter variation may stem from dif-ferent substrates, probably as a consequence of residualdoping variations or other industrial processing events.

The current article is organized as follows. First, wepresent how the experimental data was obtained and pro-cessed in order to estimate the respective electrical fea-tures. Then, we show the results obtained by using PCAand LDA, leading to the conclusion that the BJTs ineach transistor array are indeed much more similar oneanother than devices devices from distinct ICs.

II. MATERIALS AND METHODS

A customized stimuli generator and data acquisitionwas designed and implemented for the purpose of thereported experiments. It consists of a modular 16-bitmicroprocessor system, with separated digital and ana-log parts. All supplies are thoroughly decoupled. Theanalog inputs are sample-and-holded and buffered into 4channels, while the analog outputs are buffered by volt-age followers. A precision reference source is used forDA conversion, taking place over 4 independent channels.Acquired data is buffered to ensure real-time sampling,and then transferred to SD cards. The characteristics

Ic

IbIe

Rc

RbVbb

Vbb

Vc

Vcc

FIG. 1: The modified, fixed bias, class A common emitterconfiguration adopted in the reported experiments.

curves are obtained by subsequent fixed Vcc scans. Amodified version of the fixed bias, class A common emit-ter configuration [11] (shown in Figure 1) is used for suchpurposes, using Rb = 11900Ω and Rc = 671Ω. By modi-fied we mean the use of the base resistor Rb as a currentlimiter to the input signal, used fixed instead of emitterbiasing.

In order to estimate the properties of the consideredtransistors (please refer to Figure 1), we start by orga-nizing their characteristic curves in terms of isolines withfixed Vbb. Next, we select a representative contiguous setof isolines defined by a range in Ic. This is done so thatthe influence from the saturation region over the tran-sistor parameters is reduced. Figure 2(a) illustrates atypical set of isolines obtained for BJT transistors. Thefigure also shows a possible choice for the region of in-terest corresponding to isolines far away from the satu-ration region as well as from the cutoff. The reportedexperiments adopted Ic,min = 2mA, Ic,max = 4mA andVcc = 6V .

The total current gain β, defined as dIc/dIb, can beestimated directly from the obtained isolines. The insetof Figure 2 illustrates the procedure to obtain β. For achosen Vcc far from the saturation region, and for givenreference Vbb isoline, we estimate β(Vbb) as

β(Vbb) ≈∆Ic∆Ib

(1)

where ∆Ic and ∆Ib corresponds respectively to thechanges of Ic and Ib between two isolines: one sequen-tially before and another after the reference isoline. Sucha procedure yields a distribution of β along Vbb fromwhich we can obtain statistics such as the average, µβ ,and standard deviation, σβ .

3

Vcc Vc(a) (b)

Vbb0

00

0

Ic Vc

Vbb

Vcc

Region of interest

ΔIcVbb

β(Vbb) ≈ ΔIbΔIc ΔIb

Vc ≈ -AV (Vcc) Vbb +Vc (0)~

~

Ic,max

Ic,min

Vcc

Vcc,min

Vcc,max

FIG. 2: A typical set of isolines and definition of the region where our measurements are taken. The inset illustrates theestimation of the current gain β.

The voltage gain A is the ratio between the input volt-age and the resulting output voltage, i.e., A = dVc/dVbb.Observe that such an adopted voltage gain differs fromthe more commonly used Av derived from emitter biasedconfiguration, consider the base voltage directly insteadof the voltage at the incoming lead of Rb in the adoptedconfiguration shown in Figure 1. Such a property canbe estimated by means of the transfer functions Vc(Vb).Such transfer functions can be retrieved from the char-acteristic curves by taking the values of Vb along a loadline, which in turn are defined by Vcc and Rc. Morespecifically, A(Vcc) can be estimated as the negative ofthe slope of each transfer curve corresponding to valuesof Vcc. Figure 2(b) illustrates typical transfer functionsobtained for BJTs. Minimum least squares approxima-tion can be used to fit the transfer curves to straight linesand recover the slope. Similarly to β, we also considereda distribution of the values for the voltage gain, howeverin this case, by varying Vcc. Therefore, we can define theaverage, µA, and standard deviation, σA, of the voltagegain.

Another important characteristic usually expectedfrom transistor and respective circuits is linearity. Thisproperty can be quantified by the so-called total har-monic distortion (THD) [12]. This property is calculatedas follows. A pure sinusoidal function with frequency fis applied to the system. Then, the amplitudes of thefundamental (Vf ) as well as of the harmonics generatedon the output (V2f , V3f , etc) are measured. The THDcan then be calculated as:

THD(f) =

√V 22f + V 2

3f + V 24f + · · ·

Vf(2)

If the system contains only resistive components, theTHD does not depend on the input frequency. For cal-

culating the THD, we consider the range of load lineasas shown in Figure 2. From such a distribution, we es-timate the average, µTHD, and standard deviation, σTHD,of THD.

Throughout the discussion, we also consider the aver-age of the measurements for a given array. Such averagesare indicated by a bar above the respective measurement.For instance, regarding the average, µβ , and standard de-viation, σβ , of individual transistors, the overall averagesof these properties for all transistors in a given array arerespectively represented as µβ and σβ .

Since we consider many properties to characterize thedevices (i.e. the mean and standard deviation of β, A andTHD), it is useful to reduce the complexity of the datain order to aid the interpretation of the results. Sucha task can be accomplished by using Principal Compo-nent Analysis (PCA) [7]. Given a dataset containing mfeatures, PCA can be used to define a new, smaller, setof features PCA1, PCA2, . . . , PCAk providing optimalpreservation of the data variance. The first component(PCA1) contains the largest variance of the data, followedby PCA2 and so on. The amount of variance retained byeach new feature can be calculated from the normalized i-th eigenvalue of the covariance matrix obtained from thedata. This quantity, here represented as Ei for PCAi, isdefined in the range [0%, 100%].

While PCA implements a projection so as to opti-mize the data variability along the first axes, there areother projection schemes that optimize other properties.Linear Discriminant Analysis [13] (LDA) is one of suchschemes, which optimizes the linear separation betweengroups being, therefore (and unlike PCA), a supervisedmethod.

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III. RESULTS AND DISCUSSION

In this section, we present several analysis of the ex-perimentally obtained characteristics of the arrays andrespective BJTs. We follow a progression from a simplermeasurement-by-measurement characterization, to LDA,passing by PCA approaches.

Measurement-by-Measurement Analysis

Figure 3 shows the averages and standard deviations ofthe several considered measurements within each array.The x-axes are organized in monotonically decreasing or-der.

Regarding the average current gain (µβ) values, shownin Figure 3(a), we have that the group average range from50 to 140, which are typical of BJTs. Small variations ofsuch averages are observed, except for a few cases. Thegroup average of σβ , shown in Figure 3(b), range from 3to 8, which is very small considering the respective av-erage values, suggesting that BJTs from a same chip areremarkably coherent regarding β. The averages of thevoltage gain properties, µA and σA, in common-emitterconfiguration are depicted in Figures 3(c) and 3(d). Theformer varies from -0.40 to -0.15. Figures 3(e) and 3(f)show the group average of µTHD and σTHD. The averagesrange from 0.007 to 0.016, while the standard deviationsgo from 0.0005 to 0.0015. All in all, these results sug-gest a remarkably small parameter variation within eacharray.

Figure 4 shows the Pearson correlation coefficients be-tween the several adopted measurements. It is clear fromthis figure that most measurements are cross-correlated,except mainly for the standard deviation of THD andvoltage gain, which are much more independent in thisrespect. The most intense correlation results between thetwo gains, µβ and µA. Observe that the voltage gain isoften negatively correlated with the other measurements.

PCA and Density

In addition to understanding the variability, in abso-lute manner, of the several measurements, it is also inter-esting to infer what is the effective dimensionality of theoverall variability of the measurements after completelyeliminating the correlation between them. This can bereadily achieved by using PCA. Figure 5 shows the PCAprojection of the 300 BJT samples considered in our ex-periments.

Several interesting findings can be derived from sucha result. First, the total variation explanation for thetwo first axes, respectively equal to 64% and 15%, indi-cate that the greatest part of the variation of the transis-tor parameters can be accounted for by nearly just twodegrees of freedom, corresponding to respective randomvariables defined by linear combinations of the adopted

measurements. This result is in agreement with previousexperiments [3] suggesting that BJT variability has a lowdimensionality.

Another important result concerns the fact the BJTsbelonging to the same array tend to appear near one an-other, defining respective groups in the PCA space. Asshown in the projections respective to each of the PCAaxes, the separation between arrays is much more definitealong the first axis than for the second. These projectionswere obtained by normally individually fitting each group(corresponding to each transistor array) and then map-ping into the first and second PCA axes. The dispersionof each group, as indicated in the first axis projection,tends to increase along that axis.

It is also clear that the parameter variance within eachIC is substantially smaller than the variance consideringall devices. Henceforth, we quantify the variance of agroup of individuals by taking the trace of the respectivecovariance matrix, giving rise to the total variation mea-surement. A measurement of how effectively the param-eter variation can be minimized by adopting transistorsfrom a same IC can therefore be expressed in terms of theratio between the total variation for all devices dividedby the total variation averaged among the IC clusters.This value was obtained as being nearly 5 for the firstPCA component.

It is also clear from Figure 5 that the overall distri-bution of BJTs is skewed, with a stronger peak at theleft-hand side and a secondary, less compact, peak to theright. The first peak is characterized by PCA1 ≈ −1.8,and the second by PCA1 ≈ 2.1.

The weights of each considered measurement on eachaxis are given in Table I. The first axis is strongly re-lated to the average THD, voltage gain, and current gain,as well as the standard deviation of current gain. Ac-tually, we have from Figure 4 that these four variablesare strongly correlated. In the case of the second axis,the major contribution is from the standard deviation ofTHD. Such results suggest to use the average voltage gainand standard deviation of THD in order to summarizethe first and second axes, respectively. The respectivelyobtained scatter plot is shown in Figure 6. Remarkably,the arrays resulted very compact and segregated alongthe average voltage gain, with a gain factor of about 20in parameter variation along the gain axis (observe thatthe current and voltage gain resulted highly correlated).

LDA

The LDA analysis of the 300 BJTs yielded the two-dimensional projection shown in Figure 7. At the ex-pense of a less effective minimization of variance alongthe first two axes, LDA provided a new projection thatmaximizes the separation of groups according to scattermatrices dispersions. At the same time, the dispersionwithin each group became much more uniform and con-strained, to the point of defining a narrow relationship

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FIG. 3: The average (left-hand side) and standard deviation (right-hand side) of the current gain, voltage gain and THDobtained for the considered 300 BJTs.

between the two axes, which can be summarized by thedashed line. In order to try obtaining a functional rela-tionship between the adopted measurements, we appliedgeneralized mean least square fitting [14, 15] while rotat-ing the two-dimensional LDA projection and seeking forthe smallest fitting residual. For this, we used a seconddegree polynomial as the template for the fitting. In or-der to avoid the effect of the varying density of samples inthe LDA space, windowed weighting of one axis in terms

of the other was applied for each rotating configuration.Figure 8 shows the obtained optimal fitting.

The obtained fitting coefficients for the first two LDAcomponents resulted in the following approximate rela-tionship between LDA1 and LDA2:

LDA12 + LDA1(−2.723 − 1.961 × LDA2)

+ (40.93 + 0.9612 × LDA2) × LDA2 = 138.2, (3)

which can also be written approximately in terms of the

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µTHD σTHD µA σA µβ σβ

µ TH

Dσ

TH

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σA

µ βσβ

1.00 0.22 0.76 -0.36 0.78 0.74

0.22 1.00 0.34 -0.09 0.34 0.29

0.76 0.34 1.00 -0.41 0.97 0.87

-0.36 -0.09 -0.41 1.00 -0.38 -0.35

0.78 0.34 0.97 -0.38 1.00 0.89

0.74 0.29 0.87 -0.35 0.89 1.00

−1

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Pea

rson

corr

elat

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FIG. 4: The Pearson correlation coefficients between the 6considered BJT measurements. Most measurements are cor-related one another, except mainly for the standard deviationof the voltage gain

TABLE I: The weights (or strengths) of each of the consideredmeasurements on the first and second axes of the PCA andLDA. The larger the magnitude of such weights, the larger itseffect in defining the respective axis, which are linear combi-nations of the original measurements.Axis µβ σβ µA σA µTHD σTHD

PCA1 0.49 0.47 0.49 -0.26 0.44 0.21PCA2 0.01 -0.01 0.00 0.52 -0.11 0.85LDA1 -6.86 0.19 17.81 0.22 0.03 0.00LDA2 -12.92 0.1 11.77 -0.13 0.39 -0.17

considered transistor parameters as

11µA + µ2A − 0.112µAµTHD − 13µβ

+ 1.85µAµβ − 0.104µTHDµβ + 0.857µ2β

+ 0.111µAσA + 0.103µβσA − 0.177σTHD

= 3.516 (4)

IV. CONCLUSIONS

Although at the core of modern electronics, the issueof transistor variability has received relatively little at-tention as a consequence of the effectiveness of negativefeedback in controlling such an effect. However, recentstudies [3] have suggested revisions of such a perspectivein the sense that BJTs of a given type can have relativelyconsistent features (small variations), capable of defin-ing clusters by transistor type. In other words, BJTsfrom the type can cluster in characteristic, distinctivegroups. The current work has investigated BJT variabil-ity further, now considering transistor arrays, where the

devices share the substrate and other fabrication effects.As it could be expected, the variability of BJTs inside thesame IC was found to be much smaller (by a factor of 20in the case of current gain, for the considered devices andconfiguration) than between BJTs from different arrays.This confirms the improved control of transistor proper-ties when built into the same IC. At the same time, largervariations were observed among BJTs from different ar-rays.

It should be emphasized that, though in principle ex-pected, the reduced variability of industrially producedBJTs inside a same chip has been rarely (if ever) system-atically quantified in the literature. The obtained resultsmake it clear, at least for the considered array samples,that a substantial gain in standardization of BJT param-eters can be achieved by using transistor arrays. How-ever, critical projects large enough to involve multiple ar-rays may require the consideration of the individual char-acteristics of the used devices, as a consequence of thelarger variation of parameters among BJTs from distinctarrays. The obtained results corroborated the potentialof integrated analog design for increasing parameter uni-formity. In addition, when the data was mapped in termsof the scatterplot defined by the THD variation and thevoltage gain (as suggested by the strength of these mea-surements respectively to the two PCA axes), an evenbetter separation was obtained between the transistor ar-rays, showing most of the clusters clearly seggregated oneanother along the latter axis, while similar distributionswere observe in the former axis.

Further analyses by using LDA showed an even betterseparation between the clusters corresponding to respec-tive transistor arrays. Interestingly, the LDA mappingrevealed a clearly defined relationship between the con-sidered measurements, probably related to the Early ef-fect [11, 16]. This result, as well as all the others in thecurrent work, are respective to the considered transistorarrays samples and circuit configuration, so that furtherinvestigations are required in order to validate and fur-ther generalize them.

Perhaps as a consequence of well-established designpractices, some important issues in analog electronicshave been somewhat overlooked. It is, therefore, inter-esting to revisit such issues in the light of state-of-the-artpattern recognition and statistical analysis concepts andmethods. It would be particularly interesting, for in-stance, to complement the currently reported study byconsidering other IC families (e.g. FET, MOSFET) andalternative circuit configurations, as well as to compareparameter variability between NPN and PNP devices.

Acknowledgements

L. da F. Costa thanks CNPq (Grant no. 307333/2013-2) for support. F. N. Silva acknowledges FAPESP (GrantNo. 15/08003-4). C. H. Comin thanks FAPESP (GrantNo. 15/18942-8) for financial support. This work has

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FIG. 5: PCA obtained from the experimental measurements of the 50 samples of transistor arrays, as well as the individualclusters normally fitted and projected along both axes. BJTs from a same array are shown by the same color. The estimateddensity of cases is shown as a cloud, from which two peaks can be observed: a more compact group to the left-hand side, anda less compact to the right-hand side.

been supported also by FAPESP grant 11/50761-2.

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σT

HD

FIG. 6: Scatterplot obtained by plotting the variation of the THD in terms of the average of the voltage gain, also showingnormally fitted individual clusters along both axes. Such a mapping, defined by two measurements suggested by the PCA,yielded a remarkable separation between the transistor arrays, especially along the average voltage gain axis. The averagevariation of such individual clusters was verified to be nearly 20 times smaller than the overall BJT variance considering all theclusters.

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FIG. 7: LDA of the 300 BJTs, as well as normally fitted individual clusters along each axis. A good separation of the groupsis obtained, and the mapping also revealed a clear functional relationship between the two respective axes.

−10 −5 0 5 10 15 20[R44.5(LDA)]x

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FIG. 8: Generalized (quadratic) least mean square fitting ofthe LDA results, after rotation optimizing the fitting residue.