area fill generation with inherent data volume reduction
DESCRIPTION
Supported by Cadence Design Systems, Inc., NSF, the Packard Foundation, and State of Georgia’s Yamacraw Initiative. Area Fill Generation With Inherent Data Volume Reduction. Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky and Yuhong Zheng (UCLA, UCSD, UVA, GSU) - PowerPoint PPT PresentationTRANSCRIPT
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Area Fill Generation With
Inherent Data Volume Reduction
Yu Chen, Andrew B. Kahng, Gabriel Robins, Yu Chen, Andrew B. Kahng, Gabriel Robins,
Alexander Zelikovsky and Yuhong ZhengAlexander Zelikovsky and Yuhong Zheng
(UCLA, UCSD, UVA, GSU)(UCLA, UCSD, UVA, GSU)
http://vlsicad.ucsd.edu/http://vlsicad.ucsd.edu/
Supported by Cadence Design Systems, Inc.,Supported by Cadence Design Systems, Inc.,NSF, the Packard Foundation, and NSF, the Packard Foundation, and
State of Georgia’s Yamacraw InitiativeState of Georgia’s Yamacraw Initiative
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CMP and Interlevel Dielectric Thickness
Chemical-Mechanical Planarization (CMP) = wafer surface planarization
Uneven features cause polishing pad to deform
Interlevel-dielectric (ILD) thickness feature density Insert dummy features to decrease variation
Post-CMP ILD thicknessFeatures
Area fillfeatures
Post-CMP ILD thickness
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Fill Compression Problem
Compressible Fill Generation Problem (CFGP)
Given a design rule-correct layout, create the minimum number of GDSII AREFs to represent area fill features such that the window density variation is within the given bounds (L,U)
Original layout Filled layout with 82 area features
Filled layout with area features in 9 AREFs
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Fill Compression in Fixed-Dissection Regime
Original layout infixed-dissection regime
windows
tile
Tile with original featuresGrid the tile with feature size Satisfy fixed fill requirement (e.g., 56fill features) with minimum number of AREFs (e.g., 4 AREFs)
Fixed CFGP in Fixed-Dissection Regime Given a design rule-correct layout consisting of tiles, the
site arrays for each tile, and fill requirement for each tile, create the minimum number of AREFs to represent area fill features such that each tile contains exactly area fill features
nm
ijT ijF
ijF
Tile with original featuresGrid the tile with feature size Satisfy ranged fill requirement (e.g., 50 ~ 60 fill features) with minimum number of AREFs (e.g., 3 AREFs)
),( ijij UBLBnm
),( ijij UBLBijT
Ranged CFGP in Fixed-Dissection Regime Given a design rule-correct layout consisting of tiles, the
site arrays for each tile, and fill requirement range for each tile, create the minimum number of AREFs to represent area fill features such that each tile contains a number of area fill features in the range
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Linear Programming Based Methods
Main idea: Find minimum #AREFs in free sites for given fill requirements
Single-Tile Integer LP Formulations
0
1pqs
0
1a
pqijS , site in position (p,q) in tile (i,j) A feasible AREF in layout
is covered by AREFpqijS ,
otherwise otherwiseAREF is chosen A
AREFsfeasibleall
a
1
0
1
0
k
p
l
qpqij sF
pqseringAREFsall
pq ascov
0pqs pqijS ,if is occupied by original features
pqseringAREFsall
pqpq asncov
Minimize:
# covered slack sites = given # fill features
all sites covered by AREF are filled
only the sites covered by AREF can be filled
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Compressible Fill Generation with AREF
Multiple-Tile Integer LP Formulations Ideally consider fill compression on entire layout at one time Multiple-tile compression as a tradeoff
1)1(
'
1)1(
''' 1,,1;1,,0
ki
kip
lj
Bjqqpij BjAisF for tilesBA
Ranged Fill Compression Exploit allowed range of fill features for each tile
Single-Tile
Multiple-Tile
1
0
1
0
k
p
l
qijpqij UBsLB
1)1(
'
1)1(
''' 1,,1;1,,0
ki
kipij
lj
Bjqqpij BjAiUBsLB for tilesBA
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Greedy Speedup Approaches
Greedy Speedup Approach 1 (GS-1) Find the largest AREFs originating from each free site Pick the AREF that fills the maximum number of free sites but
does not overfill the tiles if such an AREF exists Otherwise, select the maximum AREF from the largest AREFs,
and take one of its sub-AREFs which do not overfill the tiles
Time complexity of the algorithm is reduced to O(n3)
Motivation of Speedup Strict greedy heuristic
- O(n4) time complexity
- Provide good solutions but is impractical Greedy speedup schemes
- Trade-off between time complexity and compression performance
- Pick acceptable AREFs instead of maximal AREFs
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Greedy Speedup Approaches (cont’d)
Greedy Speedup Approach 2 (GS-2) Pick the acceptable AREFs originating from each free site Criteria of an acceptable AREF:
- Size is smaller than K L
- Fill maximum free sites but does not overfill the tiles Time complexity of the algorithm is reduced to O(KLn2)
GS-1 vs. GS-2 Compared to GS-1, GS-2 achieves better tradeoff between
compression results and time complexity. While K·L << n, GS-2 results are just ~4% worse but ~39× faster than GS-1 based on our experiments.
GS-1 cannot guarantee better behavior with multiple-tile option than with single-tile option because the sets of the largest AREFs are different for the single-tile option and the multiple-tile option
GS-2 does guarantee better behavior with multiple-tile option
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Experiments: Greedy Speedup Approaches Compression Ratios: GS-1 vs. GS-2
0
5
10
15
20
25
30
35
Testcases
Co
mp
res
sio
n R
ati
oGS-1 Ranged Single-Tile GS-2 Ranged Single-Tile GS-1 Ranged Multiple-Tile GS-2 Ranged Multiple-Tile
Greedy approach can achieves very large compression ratios, especially when the fill features are small
GS-1 gets better results for single-tile than for multiple-tile
GS-2 results are always better for multiple-tile than for single-tile
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Experiments: Greedy Speedup Approaches
GS-2 achieves better tradeoff between performance and runtime
GS-2 is much faster than GS-1, with only small quality degradation
Run Time: GS-1 vs. GS-2
1
10
100
1000
10000
100000
T1/1500 T1/1000 T1/500 T1/250 T2/1500 T2/1000 T2/500 T2/250 T3/1500 T3/1000 T3/500 T3/250
Test cases
Ru
n T
ime
GS-1 Ranged Single-Tile GS-2 Ranged Single-Tile GS-1 Ranged Multiple-Tile GS-2 Ranged Multiple-Tile
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Comparison of fill compression methodsPerformance of the fill compression methods
0
1000
2000
3000
4000
5000
6000
7000
T1/80K/4/1500 T2/80K/4/1500 T3/80K/4/1500 T4/12K/4/200 T5/12K/4/200 T6/12K/4/200
Testcases
# o
f A
RE
Fs
Fixed Fill: ILP Fixed Fill: GS-1 Fixed Fill: GS-2 Ranged Fill: ILP Ranged Fill: GS-1 Ranged Fill: GS-2
Performance of GS-1 is very close to optimal ILP method
GS-1 is more efficient in run time than ILP method
Run time of the fill compression methods
1
10
100
1000
10000
100000
T1/80K/4/1500 T2/80K/4/1500 T3/80K/4/1500 T4/12K/4/200 T5/12K/4/200 T6/12K/4/200
Test cases
Ru
n t
ime
Fixed Fill: ILP Fixed Fill: GS-1 Fixed Fill: GS-2 Ranged Fill: ILP Ranged Fill: GS-1 Ranged Fill: GS-2
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Conclusions & Future Works
Contributions: New compressed fill strategies with AREF to reduce data volume
Linear programming based methods
Greedy based optimization methods
Future Works Improve compression ratios and scalability
Exploit new standard layout format
- Open Artwork System Interchange Standard (OASIS)
Compressible fill generation problem with underlying layout hierarchy
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Thank You!Thank You!