architecture of 8051 microcontroller))

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BY :- GANESH RAM NITTTR, KOLKATA

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Page 1: Architecture of 8051 microcontroller))

BY :-GANESH RAM

NITTTR, KOLKATA

Page 2: Architecture of 8051 microcontroller))

**** A MICROCONTROLLER IS A SINGLE CHIP MICROPROCESSOR SYSTEM WHICH CONSISTS OF CPU, DATA AND PROGRAM MEMORY, SERIAL AND PARALLEL I/O PORTS, TIMERS AND EXTERNAL AS WELL AS INTERNAL INTERRUPTS.

** IT CAN ALSO BE CALLED AS A ENTIRE COMPUTER MANUFACTURED ON A SINGLE CHIP.

Page 3: Architecture of 8051 microcontroller))

Microcontroller 8051 was first developed by INTEL, for use in embedded systems.

it consisted of standard on chip peripherals i.e. timers, counters, 4k bytes of on chip program memory and 128 bytes of data memory.

It has separate spaces for program memory and data memory.

It has 128 byte of data memory that are accessible directly by its instructions.

Page 4: Architecture of 8051 microcontroller))

8051 CENTRAL PROCESSING UNITS 4k *8 ROM 128*8 RAM Three 16 bit counters/timers. Full duplex serial channels Boolean processor full static operation

MEMORY ADDRESSING CAPABILITY 64k ROM and 64k RAM

Page 5: Architecture of 8051 microcontroller))

POWER CONTROL MODES:- - idle mode - power-down mode

CMOS and TTL compatible Frequency range of 0 to 33 MHz 4 level priority interrupts 6 interrupt services Four 8 bit i/o ports.

Page 6: Architecture of 8051 microcontroller))
Page 7: Architecture of 8051 microcontroller))

ACCUMULATOR(ACC):- it is used for data transfer and arithmetic operations. After any operation result is stored in ACC and can be accessed through its SFR address of 0E0H.

B REGISTER:- it is used to store the upper 8 bit result of multiplication and divisions. It is used as temporary register and can be accessed through its SFR address of 0F0H.

Page 8: Architecture of 8051 microcontroller))

PROGRAM STATUS WORD(PSW):- This special function register and consists of different status bits that reflect the current state of microcontroller. It contains carry (CY), the auxiliary carry(AC), the two registors bank select bits(RS1 and RS0), the overflow flag(OV), a parity bit(P), and two user defined status flags.

CY AC FO RS1 RS0 OV P

Page 9: Architecture of 8051 microcontroller))

STACK POINTER(SP):- This is an 8 bit register. SP is incremented before the data is stored onto the stack using PUSH/CALL instructions execution. During PUSH, first SP is incremented and then copy the data. In the POP operation, initially copy the data and then decrement the SP.

DATA POINTER(DTPR):- DTPR is a 16 bit register. It consists of higher byte (DPH) and a lower byte (DPL). DPTR is very useful for string operations and look up table operations. With a 16 bit DPTR, a maximum of 64K of off chip data memory and 64k of off chip memory can be addressed.

Page 10: Architecture of 8051 microcontroller))

PORT0, PORT1, PORT2, PORT3 LATCHES AND DRIVERS:- Each latch and corresponding drivers of port 0-3 is allotted to the corresponding on chip I/O port.