application example
DESCRIPTION
Core. Circuit. Analog Boundary Module (ABM). Digital Boundary Module (DBM). V H. V L. ANALOG I/O PINS. V G. DIGITAL. V H. I/O PINS. Internal Test Bus (AB1, AB2 ). V L. V G. Boundary Scan Path. Analog Test Access Port ATAP. AT1. V TH. V H. V L. V G. DS. AT2. - PowerPoint PPT PresentationTRANSCRIPT
Application Example
Analog Boundary Module (ABM)
IEEE 1149.4 Standard for a Mixed-Signal Test Bus
Benefits
Present Working Group members:Bambang Suparjo Heiko Ehrenberg Adam CronStephen Sunter Kenneth P Parker Adam LeyKeith Lofstrom Zafar Quadri Marc Hunter
Scope and PurposeDefines a mixed-signal test bus architecture that provides access to analog and digital test points for:
• Interconnect test• Parametric test• Internal test
Potential Applications
Further Information
For further information, contact:IEEE 1149.4 Mixed-Signal Test Bus Working Group at http://grouper.ieee.org/groups/1149/4/index.html
Examples
BSDL Extension(2010 Revised Version)
• Describes 1149.4 test circuitry in a device• Compatible with 1149.1 BSDL• To support test pattern generation process
Top Level Architecture
Extended interconnect test – measuring R value
• First measurement
• Second measurement
SCAN PATH B1
7 689CELL number
ABMAB1AB2
SCAN PATH
A2 (ANALOG FUNC. PIN)
TO/FROM CORE
B2DC
CoCaSCAN PATH D2aD1a D2bD1b
(IATB1)(IATB0)TBIC
AB2bAB1bAB1a AB2a
SCAN PATH
AT1AT2
3 01245CELL number
B2D
ABMABM
B1CD B2B1C
678910111213
SCAN PATH SCAN PATH
AB1b AB2b
CELL number
A2A1 AB1a AB2a
AB
M
AB
M
CHIP_A
1213
1011
B2B1
CD
B2B1
CD 9
8
1110
A1 A5R
AB2
CHIP_B
AB1AB2AB1
attribute BOUNDARY_REGISTER of comp_name : entity is
…..“9 (BC_1, *, control, 0), ” & -- C“8 (BC_7, A2, bidir, 0, 9, 0, Z), ” & -- D“7 (BC_1, *, internal, 0), ” & -- B1“6 (BC_1, *, internal, 0), ” & -- B2
attribute MST_TBIC of comp_name : entity is“ATI, AT2 : ” & -- pin1, pin2“5, 4 ” & -- Ca, Co“(IATB0 (3, 2), ” & -- D1a, D1b (Base)“(IATB1 (1, 0) ” ; -- D2a, D2b (Partition)
attribute MST_ABM of comp_name : entity is-- port TBIC_partition_name C D B1 B2“A1: IATB0 (13, 12, 11, 10), ” & “A2: IATB1 (9, 8, 7, 6) ” ;-- AB1a/AB2a from IATB0, AB1b/AB2b from IATB1
attribute MST_ABM of CHIP_A : entity is“A1 ( IATB0_A: 13, 12, 11, 10 ),” & -- C, D, B1, B2
Attribute MST_ABM of CHIP_B : entity is“A5 ( IATB0_B: 8, 9, 10, 11 ),” & -- C, D, B1, B2
• Provides interconnect test for high-density surface-mount assembled boards.
• Bridge and open faults detection test for both digital and analog nets can be performed simultaneously.
• Passive analog components between chips are able to be measured.
• Parametric test and internal analog test can also be performed.
• BSDL extension allows mixed-signal chip vendors to provide description of their device’s test circuitry in the datasheet.
• Third party tools will be able to generate interconnect test patterns automatically using the provided BSDL from each device.
R A5A1
AB1
AB2
AT1
AT2
VGITVF1
CHIP_A CHIP_B
V
R A5A1
AB1
AT1
VG
CHIP_A CHIP_B
AB2
VVF2
AT2
IT
• If Voltmeter impedance >> impedance of the switches
• R = (VF1-VF2) / IT
TMS
TDI TDO
TCK
AT2
AT1
DIGITAL
I/O PINS
ANALOGI/O PINS
TBIC (Test Bus Interface Circuit)
Analog TestAccess PortATAP
VH
VL
VG
VH
VL
VG
Internal Test Bus(AB1, AB2 )
Core
Circuit
Analog BoundaryModule(ABM)
Test Control CircuitryTAP Controller
Instruction register and decoder
Digital TestAccess Port(TAP ) as in IEEE 1149.1
Digital TestAccess Port(TAP) as in
IEEE 1149.1
BoundaryScan Path
Digital Boundary
Module(DBM)
Core
VTH VH VL VG
-+
SB2SB1
AB1
AB2
Analogfunction
pin
AT1
AT2
SD
Coredisconnect
Internal analog
test bus
From TDI To TDO
SH SL SG
TBIC
DS
ABM Switch Control
• Mixed-signal devices can be used in a system which is tested regularly in the field such as in safety critical applications.
• Examples of safety critical applications include medical, security, transportation and process control.
• Mixed-signal devices for commercial applications.
• Description of boundary registers of an ABM
• TBIC Statement
• ABM Statement
• Describing cells associated to each ABM