apj abdul kalam technological universitystudoob.in/app/q/cse/s5/cs305/cs305_model_1.pdf · ·...

APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY

FIFH SEMESTER B.TECH DEGREE MODEL EXAMINATION, NOVEMBER 2017

Department: Computer Science and Engineering

Subject: - CS305: MICROPROCESSORSAND MICROCONTROLLERS

Time: 3 hoursMaxMarks: 100

PART A

(Answer all questions)

1) Explain the following

a) Segment Register

b)Pointer and Index Register

c)Flag Register

2) State the comparison between 8086 and 8088

3) Define Macros and explain passing parameters in macros

4) Explain the use of Stack in 8086.

Total:(12marks)

PART B

(Answer any two full questions)

5) Explain Minimum 8086 and Maximum mode 8086 System and Timing with diagram.

6) Descibe the adressing mode in detail with examples

7) Explain Data/Copy Transfer Instructionsin instruction Set 8086

Total: (18marks)

PART C

(Answer all questions)

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8) Explain types of Interrupts and Interrupt Service Rotine.

9) How will handlle interrupt in 8086

10) Write the Contol Word Format in 8255.

11) Eplain about Programmable Interrupt Controller in 8259

Total: (12marks)

PART D

(Answer any two full questions)

12) Explain architecture of Programmable Interrupt Controller in 8259

13) Describe Keyboard Display Controller 8279

14)Explain DMA Controller 8257

Total: (18marks)

PART E

(Answer any Fourf ull questions)

15) Explain Microcontrollers andTypes of Microcontrollers -with Criteria for selecting a

microcontroller and Example Applications

16) Explin 8051 architecture in detail

17) Explain Organization and design of these resources in a typical microcontroller in 8051.

18) Explain 8051 addressing modes in detail

19) Describe different instuction in 8051.

TOTAL (40marks)


APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY

FIFH SEMESTER B.TECH DEGREE MODEL EXAMINATION, NOVEMBER 2017

Department: Computer Science and Engineering

Subject: - CS305: MICROPROCESSORSAND MICROCONTROLLERS

PART A

1) a. Segment Register:

CS (Code Segment) :

Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor

instructions. The processor uses CS segment for all accesses to instructions referenced by

instruction pointer (IP) register. CS register cannot be changed directly. The CS register is

automatically updated during far jump, far call and far return instructions. (1mark)

b)Pointer and Index Register

The pointers contain offset within the particular segment. The pointers Ip, Bp and SP usually

contain offsets within the code, data and stack segments. The index registers are used as general

purpose registers as well as for offset storage in case of indexed, base indexed and relative based

indexed addressing modes

(1 mark)

c)Flag Register

FLAGS register. The FLAGS register is the status register in Intel x86 microprocessors that

contains the current state of the processor. This register is 16 bits wide. ... The fixed bits at bit

positions 1, 3 and 5, and carry, parity, adjust, zero and sign flags are inherited from an even earlier

architecture, 8080. (1mark)

2)It has differences in the Bus Interface Unit (BIU). The differences between the two are as follows:

8086 has 16-bit data bus whereas 8088 has 8-bit data bus. ... The Instruction Queue of 8086 is 6-bit

long and that of 8088 is 4-bit long. (3marks)

3) Macro can be defined as a group of repetitive instructions in a program that are codified only

once but can be repeated n number of times.

Syntax

Macro_name MACRO argument1, argument2,…..argumentn

Statement 1

Statement 2

Statement k

EndM (1mark)

Passingparameter ( 2mark)

4)Stack is used to store and retrieve return addresses during function calls. Its put to good use

during nested function calls or recursive function calls. It is also used to transfer arguments to a

function. On a microprocessor it is also used to store the status register contents before a context

switch. (3mark)


PART B

5) Explanation about minimum and maximum mode (2mark)

Circuit diagram (3mark)

Timing signal (4marks)

6)Description (4marks)

Example (5marks)

7)Instruction to transfer a word

MOV − Used to copy the byte or word from the provided source to the provided destination.

PPUSH − Used to put a word at the top of the stack.

POP − Used to get a word from the top of the stack to the provided location.

PUSHA − Used to put all the registers into the stack.

POPA − Used to get words from the stack to all registers.

XCHG − Used to exchange the data from two locations.

XLAT − Used to translate a byte in AL using a table in the memory.

Instructions for input and output port transfer

IN − Used to read a byte or word from the provided port to the accumulator.

OUT − Used to send out a byte or word from the accumulator to the provided port.

Instructions to transfer the address

LEA − Used to load the address of operand into the provided register.

LDS − Used to load DS register and other provided register from the memory

LES − Used to load ES register and other provided register from the memory.

Instructions to transfer flag registers

LAHF − Used to load AH with the low byte of the flag register.

SAHF − Used to store AH register to low byte of the flag register.

PUSHF − Used to copy the flag register at the top of the stack.

POPF − Used to copy a word at the top of the stack to the flag register. (9marks)

PART C


8) types of Interrupts

External Interrupt (1.5mark)

Internal Interrupt (1.5mark)

explanation abt ISR (1mark)

9)Hardware interrupt is caused by any peripheral device by sending a signal through a specified pin

to the microprocessor. The 8086 has two hardware interrupt pins, i.e. NMI and INTR. NMI is a non-

maskable interrupt and INTR is a maskable interrupt having lower priority.(3marks)

10)control word format

(3mark)

11)Programmable Interrupt Controller in 8259


(1mark)

PART DExplanation (2mark)

12) architecture of programmable interrupt controller 8259

The Intel 8259 is a Programmable Interrupt Controller (PIC) designed for the Intel 8085 and Intel

8086 microprocessors. The initial part was 8259, a later A suffix version was upward compatible

and usable with the 8086 or 8088 processor. (4marks)

(5marks)


13)8279 programmable keyboard/display controller is designed by Intel that interfaces a keyboard

with the CPU. The keyboard first scans the keyboard and identifies if any key has been pressed. It

then sends their relative response of the pressed key to the CPU and vice-a-versa.

How Many Ways the Keyboard is Interfaced with the CPU?

The Keyboard can be interfaced either in the interrupt or the polled mode. In the Interrupt mode, the

processor is requested service only if any key is pressed, otherwise the CPU will continue with its

main task.

In the Polled mode, the CPU periodically reads an internal flag of 8279 to check whether any key is

pressed or not with key pressure.

How Does 8279 Keyboard Work?

The keyboard consists of maximum 64 keys, which are interfaced with the CPU by using the key-

codes. These key-codes are de-bounced and stored in an 8-byte FIFORAM, which can be accessed

by the CPU. If more than 8 characters are entered in the FIFO, then it means more than eight keys

are pressed at a time. This is when the overrun status is set.

If a FIFO contains a valid key entry, then the CPU is interrupted in an interrupt mode else the CPU

checks the status in polling to read the entry. Once the CPU reads a key entry, then FIFO is updated,

and the key entry is pushed out of the FIFO to generate space for new entries.

14)

Initially, when any device has to send data between the device and the memory, the device has to

send DMA request (DRQ) to DMA controller.

The DMA controller sends Hold request (HRQ) to the CPU and waits for the CPU to assert the


HLDA.

Then the microprocessor tri-states all the data bus, address bus, and control bus. The CPU leaves

the control over bus and acknowledges the HOLD request through HLDA signal.

Now the CPU is in HOLD state and the DMA controller has to manage the operations over buses

between the CPU, memory, and I/O devices.

Features of 8257

Here is a list of some of the prominent features of 8257 −

It has four channels which can be used over four I/O devices.

Each channel has 16-bit address and 14-bit counter.

Each channel can transfer data up to 64kb.

Each channel can be programmed independently.

Each channel can perform read transfer, write transfer and verify transfer operations.

It generates MARK signal to the peripheral device that 128 bytes have been transferred.

It requires a single phase clock.

Its frequency ranges from 250Hz to 3MHz.

It operates in 2 modes, i.e., Master mode and Slave mode

Features 4 marks

Diagram 5 marks

PART E

15)MicroMicrocontrollers. Microcontroller has a CPU, in addition with a fixed amount of RAM,

ROM and other peripherals all embedded on a single chip.controllers (10 marks)

Types of Microcontrollers A microcontroller is a small, low-cost and self contained computer-on-a-

chip that can be used as an embedded system. A few microcontrollers may utilize four-bit

expressions and work at clock rate frequencies, which usually include:

An 8 or 16 bit microprocessor.

A little measure of RAM.

Programmable ROM and flash memory.

Parallel and serial I/O.

Timers and signal generators.

Analog to Digital and Digital to Analog conversion

Microcontrollers usually must have low-power requirements since many devices they control are

battery-operated. Microcontrollers are used in many consumer electronics, car engines, computer

peripherals and test or measurement equipment. And these are well suited for long lasting battery

applications. The dominant part of microcontrollers being used now a days are implanted in other

apparatus. (10marks)


Criteria for selecting a microcontroller

Step 1: Make a list of required hardware interfaces. ...

Step 2: Examine the software architecture. ...

Step 3: Select the architecture. ...

Step 4: Identify Memory Needs. ...

Step 5: Start searching for microcontrollers. (10marks)

Application of Microcontroller 8051 in Medical Applications. The application of microcontroller

8051 in medical applications made revolutionary changes in the medical field. ... If the temperature

of the patient's body increases beyond the preset temperature, then the temperature sensor sends

signal to the microcontroller.Jul 10, 2015 (10marks)

16 )8051 microcontroller is designed by Intel in 1981. It is an 8-bit microcontroller. It is built with

40 pins DIP (dual inline package), 4kb of ROM storage and 128 bytes of RAM storage, 2 16-bit

timers. It consists of are four parallel 8-bit ports, which are programmable as well as addressable as

per the requirement. An on-chip crystal oscillator is integrated in the microcontroller having crystal

frequency of 12 MHz.

Let us now discuss the architecture of 8051 Microcontroller.

In the following diagram, the system bus connects all the support devices to the CPU. The system

bus consists of an 8-bit data bus, a 16-bit address bus and bus control signals. All other devices like

program memory, ports, data memory, serial interface, interrupt control, timers, and the CPU are all

interfaced together through the system bus.


17) A microcontroller is a structure that integrates in a single chip a microprocessor,

a certain amount of memory, and a number of peripheral interfaces.

The Central Processing Unit (CPU) is connected to the other subsystems of

the microcontroller by means of the address and data buses. Depending on how

the CPU accesses the program memory, there are two possible architectures for

microcontrollers, called Von Neumann, and Harvard.

Figure 1.1 shows the structure of a computer with Von Neumann architecture,

where all the resources, including program memory, data memory, and I/O registers,

are connected to the CPU by means of a unique address and data bus. 20marks

DIAGRAM 20marks

18)Addressing modes of 8051. 2. Addressing modes Definition:- The different ways in which a

source operand in an instruction are known as the addressing modes. ... Continue… The

immediate data must be preceded by '#' sign. This addressing mode can be used to load

information into any of the register, including the DPTR.J


19) Arithmetic Instructions

Branch Instructions

Data Transfer Instructions

Logic Instructions

Bit-oriented Instructions

Exmples 20 marks


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