A Next-GenerationHybrid ComputerSystemG. F. Graber and E. J. FaddenApplied Dynamics International

Introduction

In introducing the concept of an advanced hy-brid computer system it is appropriate todescribe briefly the current-generation hybrid sys-tem from which the advance is being made. Thetrue significance of the advanced system can thenbe appreciated-namely that it retains all the ad-vantages and at the same time removes the short-comings of the present generation of hybrid com-puters.A typical modern hybrid computer system con-

sists of a general-purpose analog computer anda general-purpose digital computer. These twovery different computers are interconnectedthrough a hybrid interface that provides a com-munications path for both data and control sig-nals. In general, the very fast analog computeris programmed to solve the equations of the prob-lem under study. This very high solution speedis the key factor in the cost effectiveness thatjustifies the hybrid computer's existence. Theparallel functional modules of the analog computerare interconnected to represent the equations of theproblem under study by patching on a removablepanel.The digital computer was originally introduced

into the hybrid system to provide the pre-run-timefunctions of problem preparation, and analog com-puter setup and checkout. It is also used tocontrol the analog computer at run time and tostore and process results. To assist in the problempreparation process, extensive software has beendeveloped which simplifies the problem statement,

assists in scaling, produces patching lists, auto-mates the setup of parameters in the analog, andverifies the accuracy of the analog representation.The operator is still required to patch the analogcomputer manually; however, he is helped a greatdeal with this task by the digital computer.

In the above applications advantage is taken ofthe best characteristics of both types of computers-the speed of the analog and the memory of thedigital. However, the applications of hybrids do notstop with this tidy division of roles. The parallelnature of the analog computer, which constitutesits principal advantage, is also its principal limi-tation. When the size of a problem exceeds the sizeof the analog computer, you are in trouble. Insome applications the size of certain parts of theproblem does exceed the practical size of analogcomputers. The representation of multivariable ar--bitrary functions is a particularly salient exampleof this. Coordinate transformation is another. Inboth cases the digital computer is capable of per-forming these operations. The appropriate analogvariables are converted to digital form, the digitalcomputer makes the required calculations, and theresults are then converted back to analog form.

In this type of hybrid application the digitalcomputer is used in the problem loop at run time,and the speed of the required iterative calculationsbecomes important. The effect of this is to reducedrastically the overall problem solution speed bytwo to three orders of magnitude over the speed ofthe analog system alone. This then reduces theadvantage of the hybrid system. More will be saidabout this in a later section.

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Disadvantages of present hybrids

Despite the speed advantage enjoyed by hybridcomputers over all-digital computers, the aboveintroduction points to some of the weaknesses ofpresent hybrid systems. The manual step of patch-ing the analog problem and physically inserting a

patch panel is the most obvious. This clearlylimits accessibility of the computer system tolocal users.Although some attempts have been made to allow

remote access, the requirement for an operatormanually to change problems or make programchanges has greatly hampered remote hybrid opera-

tions. Therefore, the hybrid system is restricted toone user with one problem at a time, resultingin an increased cost per problem.The demands on. the programmer are another

weakness of present hybrid systems. In general,a highly skilled programmer is required. In orderto reduce the frame time of the digital computerin its run-time program, special computing tech-niques and machine language programming are

often used. Programs are very machine- and some-

times problem-dependent and are thus not trans-ferrable. Although considerable progress has beenmade in-developing problem preparation software,this has not reached the level of sophistication ofthe higher-level languages for digital systems. Theprogrammer must typically be involved in thecomputer mechanization of the problem and haveknowledge of the hardware characteristics. Thisrequirement is unattractive to the customer who is.interested in the problem area but does not care tobecome a specialist in the computing process. Thisis perhaps the single biggest disadvantage of presenthybrid systems.

An advanced hybrid system

In 1974, the U.S. Army Materiel Command af-forded the hybrid industry a unique opportunitywhen it sponsored the definition of an advancedhybrid computer system.As background for the reason behind this AMC

sponsorship, it is important to realize that in compari-son with digital computers, hybrids represent only a

very small fraction of the computer industry as

a whole. The multibillion dollar digital market hasyielded research and development funds in amountsthat are several orders of magnitude greater thanthose provided by the $25 to 50 million annualhybrid market. For this reason, dramatic new

developments in digital systems have producedtruly new generations of computers.Meanwhile, the hybrid industry has taken much

smaller steps in product development, resulting inmuch more gradual evolution through the additionof new features and periodically updated hardwaredesigns. The hybrid manufacturers' have been even

more modest in their investments in software,leaving much of this to the larger users. Thus,the AMC study was significant in that it allowed

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the hybrid designer a free rein in looking at howtoday's technology could be best brought to bearon a next-generation hybrid system with the expec-tation that governmental funding would be avail-able to assist in the required hardware and soft-ware development.As one of the participants in the AMC study,

Applied Dynamics proposed a new-generation hy-brid computer, the "advanced hybrid computer sys-tem." This version of the AHCS, described indetail in ADI's final report,' entailed developmentin five major areas:

Automatic patching. Elimination of the analogcomputer patchpanel is certainly the most obviousrequirement for an advanced system. This has beenundertaken in various ways in the past. In 1970 theUniversity of Michigan Simulation Center2 installedan electronic switch matrix on an AD/Four, PDP-9hybrid system. This matrix of 768 switches al-lows automatic patching of eight integrators, sixmultipliers, and 32 coefficient devices, under controlof the digital computer. Problem changeover is ac-complished in 20 milliseconds, allowing time-shareduse of the system by five remote graphics-equippedterminals. The terminals also permit parametersto be changed in a highly interactive manner.A compiler was developed which, from a simulationlanguage source program, automatically assignsanalog components and generates the necessaryswitch-matrix code. An extensive graphics packagehas also proved very successful. Two other systemsof this type have been delivered.Extension of this electronic switching technique

to a larger system is well within the currentstate-of-the-art, especially with the availability ofLSI analog switch arrays. By associating certainanalog components with others to form somewhathigher-level functional modules, one can reduceto a reasonable number the overall quantity ofswitches required for even a very large system.The AHCS defined by ADI employed completeelectronic patching, allowing changeover from onelarge problem to another in tens of milliseconds.

Updated design of functional modules. Theimpact of integrated circuit technology on analogcomponents, while not as dramatic as it has beenon digital components, has nevertheless been silb-stantial. Cost of analog components are signifi-cantly lower today than they were a few years ago.For instance, the high-performance operational am-plifier is a relatively expensive- item in present-dayanalog computers, since it still uses many dis-crete components. This limits the number of am-plifiers in a system and thereby complicates thepatching rules. Today's technology, however, per-mits the use of relatively low-cost, high-performanceIC operational amplifiers. Such IC amplifiers can beassociated with other computing elements such asswitches, multipliers, and other amplifiers for signinversion. Similarly, with the availability of low-costmonolithic multiplying digital-to-analog convertersthe cost of coefficient devices and function genera-

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tion components can be lowered, power can bereduced, and space can be conserved. Wider band-widths can also be achieved. These are all simplythe benefits of an updated design of the analogmodules using currently available components.

New parallel elements. As pointed out earlier,introduction of the general-purpose digital com-puter into the run-time computing loop dramaticallyreduces the overall speed of the hybrid system.Frame times of 5 to 50 milliseconds are typical.Analysis3 shows that for reasonable dynamic ac-curacy this requires reduction of the computing-loop frequencies to the order of 1 to 10 Hz. Thisso drastically reduces the speed of the analog asto eliminate much of its advantage. Thus, the AHCSconcept was to move the problem loop back onto the parallel analog equipment. A new all-parallel analog function generator module and a newresolver module were defined for the AHCS to ac-complish this.

Parallel, patchable logic has proved to be veryuseful to the hybrid programmer. It is used aspart of the simulation of such phenomena ashysteresis, absolute value, nonlinear friction, etc.The present discrete logic elements do not lendthemselves very well to automatic patching.For this reason a new logic module was defined

for the AHCS which is programmable with respectto its function. This new logic module providesmuch greater flexibility in an electronically patchedsystem.

Remote access/time shared use. The computingpower of the AHCS would be extremely high. Speedadvantages over general-purpose digital systemswould be as high as 500 to 1. The AHCS could pro-duce vast numbers of solutions in very shortperiods of time. It would be most unusual to haveany problem that required more than a fraction ofa minute for a desired set of solutions. Also,with the addition of automatic patching, problemchangeover could be accomplished in fractions of asecond.For these reasons, it is most important to realize

the cost effectiveness of time-shared use. The AHCSincludes a large general-purpose digital computerwhich is used for compiling and control of theparallel computing system. For user access, anadditional digital computer is used as a front-endcommunications controller. Conventional data com-munications equipment associated with the con-troller provides remote access to the system. Thiswell-developed technology allows access throughtelephone circuits with a wide variety of terminaldevices. The AHCS could be shared by local usersand remote users over dedicated or dial-up lines. Allcommunications, graphics, and hardcopy terminalequipment that is currently available can be usedwith the AHCS. This effectively eliminates the pre-vious restriction of one user and one problem at atime. It also opens up the possibility of accom-modating the small user who cannot afford aninvestment in his own hybrid system.

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Software. An extensive software package was de-fined for the AHCS. Most important is the compilerthat allows input statements in a user-orientedlanguage. An augmented version of S/360 CSMPwas selected because of its appropriateness andwidespread use. The compiler produces the switchcode for the interconnection of the parallel system.Coefficient settings are also generated. In addition,the compiler produces an all-digital simulationwhich determines the ranges of the variables forscaling of the parallel system and provides a checksolution to verify the parallel representation of theproblem.Other utility packages include an allocator which

defines the parallel module usage; a scheduler whichmaintains the task queue and assigns peripherals;an updater which controls the run-time code, in-cluding automatic scaling; a setup/checkout modulewhich verifies that the parallel simulation cor-responds to the digital check solution; and dataspooling, file storage, file protection, and com-munications modules.Maintenance programs for the AHCS are of two

distinct types. The first is a system diagnosticwhich inserts a test problem into the queue peri-odically. The problem solution is compared withthe stored reference solution to obtain an overallhardware/software system check on proper opera-tions. Additional diagnostic routines allow test ofall system elements.

Status of AHCS

The cost effectiveness of an AHCS system overpresent methods of simulation can be clearly es-tablished. A survey4 conducted by AMC also clearlyindicates justification for the development of thesystem. A substantial part of the market for sucha system is in government or government-sponsoredprojects. Since the cost of development of an AHCSis also well beyond the resources of the hybridindustry, appeals have been made for governmentsponsorship of such a system. To date, funds havenot been allocated for this purpose.

In lieu of such sponsorship, ADI has proceededon a more modest basis to develop an alternativeconfiguration-one which incorporates the tech-nology and advances that have occured in the twoyears since the AHCS study and which accomplishesmost of the original objectives at substantiallyreduced development and manufacturing cost. Thekey element in this alternative configuration isthe AD-10, which will be described following abrief overview of function generation.

The multivariant function generation problem

As mentioned in the previous sections, manylarge present-day hybrid computer simulations in-volve certain run-time tasks which are far bettersuited to digital computer techniques than toanalog computer techniques. The most significant

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task in this category is that of multivariant func-tion generation-i.e., the generation of functionsof two or more variables. Aircraft and missilesimulations often involve 30-50 functions of threeor more variables. The data base for these func-tions may be quite large (i.e., of the order of100,000 words or more). The difficulty that is con-sistently faced in these large simulations is thattoday's general-purpose digital computers are notnearly fast enough to handle the function genera-tion task in a truly acceptable way. The finiteframe time required by the digital computer toperform its computations is a major source ofdynamic error in a hybrid simulation. It is oftennecessary to simplify the model, modify the database, program the digital computations in assemblylanguage, etc., in order to try to achieve an ac-ceptably short frame time. Even with these extraprogramming efforts, real-time simulation may notbe possible with acceptable dynamic accuracy.Our original concept of an advanced hybrid com-

puter system envisaged in all-analog multivariantfunction generator system as a means of allowingthe full bandwidth capability of the analog com-puter to be used effectively. Another analog com-puter manufacturer is presently marketing a "hy-brid" multivariant function generator in which thefunction data values are stored in a special digitalmemory and analog circuitry (including DAC's) isused to perform the linear interpolation operations.The amount of analog circuitry required in an all-analog or hybrid scheme for multivariant functiongeneration is directly related to the number andcomplexity of functions in the simulation.For many of the large-scale simulations that are

being performed on today's hybrid computer sys-tems, neither of these schemes for handling themultivariant function generator problem is ade-quate or cost-competitive for the complexity offunctions that are encountered. Our answer to theproblem of multivariant function generation is avery high speed, special-purpose digital computer.This digital computer, the AD-10, is described brieflybelow. In addition to multivariant function genera-tion, the AD-10 can also handle other computingtasks, including generation of standard functionssuch as logs, exponentials, and trigonometric func-tions; vector resolution; function storage and play-back; and simulation of time delays.

In addition to its role in hybrid simulations,the AD-10 is useful as a sophisticated peripheralto a general-purpose digital computer for all-digitalsimulations.

The AD-1 0

Multivariant function generation on a digital com-puter involves table lookup and linear interpolationoperations. Sixteen-bit resolution is more than ade-quate for the function values that comprise the database. The data can be scaled so that fixed-pointarithmetic operations can be used for the inter-polation calculations.

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A study of algorithms suitable for multivariantfunction generation shows that the one whichlends itself most readily to special-purpose digitalcomputer implementation is based upon repeatedcomputations of the form

F(x) = fi + (fi+- fi) * Xi'

where Xi = (x -Xi)/(Xi+1 -xi).(1)

The repetitious nature of the interpolation calcula-tions, coupled with the fact that the computationalflow is linear (i.e., the flow does not involve loopsor branches), allows overlapped operations and pipe-lining techniques to be used effectively. Becauseits structure has been optimized for this application,the AD-10 computes multivariant functions 100-500times faster than the rate at which these samecomputations can be performed on today's largegeneral-purpose digital computers.As shown in Figure 1, the AD-10 is a bus-

oriented computer in which all address, control,and data communications are handled via thehigh-speed multibus. All transactions on the multi-bus are synchronous. The 20-MHz bus clock allowsone multibus transaction to be performed every 50nanoseconds. The AD-10 architecture is such thatthe address and control portion of the multibus is in-dependent of the data portion of the multibus.This means that the address and control informa-tion present on the multibus during a bus trans-action may be, and often is, totally independentof the data word present on the multibus duringthat transaction. This allows overlapped or paralleloperations involving the multibus to be performed.The AD-10's multiport data memory consists of

16-bit words expandable in 16K word blocks to atotal of 256K words. Each 16K word block containsfour 4K word pages, and each of these pages hasits own independent port onto the multibus. MOSmemory devices with a cycle time of 450 nano-seconds are used. The multiport nature of thedata memory allows data to be moved into or outof the memory at the 20-MHz multibus rate ifthe data memory has been expanded to 48Kwords or more.Each of the processors shown in Figure 1 is

designed to perform a specific, limited range of func-tions. Emitter coupled logic is used in each of theseprocessors to provide the desired high-speed opera-tion. Each processor contains its own programmemory. Microprogrammed instructions are used tosimplify the circuitry and to minimize instructiondecode time. The number of bits in a programmemory word for a processor varies from processorto processor; the arithmetic processor, for example,has 54 bits in each program memory word.

All processor operations are synchronous. Theinstruction cycle time for each processor is 100nanoseconds.The host interface controller provides the link

between the AD-10 and the host digital computer.All AD-10 setup, data editing, and other off-lineoperations are performed through the HIC. The

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Figure 1. Block diagram of the AD- 0.

HIC is not involved in the AD-10's run-timeoperations unless there is data flow between theAD-10 and the host computer during the run time(e.g., if the AD-10 augments the host computerin an all-digital simulation).The control processor controls all run-time opera-

tions including the analog interface operations. Thedecision processor is used to determine the break-points or values xi and xi+1 for each input, x, sothat xi < x < xi+, [see Eq. (1)]. A binarysearch algorithm is used for determining the ap-propriate pair of breakpoints for each input. Thedecision processor is used in conjunction with thememory address processor and the arithmetic pro-cessor to implement the binary search algorithmfor each input x, and to calculate the necessarypointers to the locations in the multiport datamemory where the appropriate values are stored.The memory address processor controls the tablelookup operations and provides function data to thearithmetic processor, where the interpolation com-putations are performed.

All arithmetic operations in the AD-10 are per-formed in the arithmetic processor, which performscomputations of the general form

R=/(A±B)*C±E

in 175 nanoseconds. The arithmetic processor con-tains a temporary register file for storage ofintermediate results. There are 126 registers inthis file. The values xi in Eq. (1) are stored inthe temporary register file. Within the arithmeticprocessor, an internal bus allows data to be movedat the rate of four moves per instruction cycle or 25nanoseconds per move. These move operations areperformed in parallel with the arithmetic opera-tions, permitting the arithmetic operations to bepipelined. Assuming that the xi's have been com-puted and stored in the arithmetic processor'stemporary register file for each input x, the inter-polations defined by Eq. (1) can be performed atan average rate of one each 100 nanoseconds. Over-all computing speed of the AD-10 is such thatan average of 400 nanoseconds is required togenerate a function of two variables, 800 nano-seconds for a function of three variables, and 1600nanoseconds for a function of four variables.

Scaling, true roundoff, and overrange detectionoperations are performed in the arithmetic processor.The ability to store intermediate results in thetemporary register file provides interesting pro-gramming flexibility. This capability facilitatessuch computations as vector resolutions and the

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calculation of aerodynamic forces and moments inaerospace simulations.The interface between the AD-10 and the analog

computer shown in Figure 1 contains parallel ADCchannels and parallel DAC channels for maximumconversion speed in each direction.

ADI's current concept of the advanced hybridcomputer

At the time ADI performed the study on theadvanced hybrid computer system for the U.S.Army, the AD-10 had not been conceived. Theoriginal AHCS proposed by ADI included analogcircuit modules for multivariant function generation,standard function generation, and vector resolution.The inclusion of these modules represented a sig-nificant part of the development task for theAHCS proposed by ADI. Furthermore, thesemodules would have contributed in a major way tothe cost of the AHCS. The AD-10 has led to amodified version of ADI's original concept of theAHCS-one that is less complex, would be lessexpensive to develop, would cost less, and would bemuch more flexible than ADI's original versionof the AHCS. It is this modified version of theAHCS that is discussed in the following para-graphs.

In a minimum configuration, the AHCS wouldcontain the elements shown in Figure 2. Themodular analog computer is connected to thedigital computer via an interface. This interface con-tains all of the logic circuitry necessary to allow thedigital computer to configure the modular analogcomputer for a problem. In addition, the interfacecontains a high-speed, high-accuracy ADC (100 kHz,15 bits) which permits fast, accurate setup andcheckout of analog programs. This interface mayalso include high-speed, high-accuracy DAC's topermit conventional hybrid operation in which thedigital computer participates in run-time opera-tions. In most cases, however, it is expected that theAD-10 will be able to handle all of the digitalcomputations required during run time. The digitalcomputer is also connected to a communicationscontroller which has the task of communicatingwith a number of terminals. The communicationscontroller must communicate at the appropriateline baud rates and in the correct formats toservice each terminal properly. The terminals maybe of different types with totally different charac-teristics; in general they will be remotely locatedrelative to the computer system. One of the ter-minals serviced by the communications controlleris a local maintenance terminal. Although manymaintenance diagnostics will be performed auto-matically, it is important for a maintenance op-erator to be able to run specialized tests of thesystem or parts of the system.Analog solutions will normally be sampled and

stored digitally for subsequent digital data trans-mission to the remote terminals. As an added fea-ture, provision is made through a separate inter-

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Figure 2. The advanced hybrid computer system. The solid lineshows the digital signals and the dashed line theanalog signals.

face to transmit analog variables to the terminals.This would allow recorders and plotters located atthe terminals to be driven directly if the terminalswere located within a reasonable distance of themodular analog computer. The two major areas ofdevelopment for the system shown in Figure 3 arethe design of the modular analog computer and thedevelopment of the software packages listed earlier.The hardware design task is a significant one.

However, the AD-10 has significantly reduced themagnitude of this task from that which would havebeen required to develop ADI's originally proposedAHCS.The effect of the AD-10 on the software develop-

ment task, on the other hand, is mixed. Certainaspects are simplified, but other complexities areadded. The software development required for atruly viable and effective AHCS would undoubtedlybe much more costly than the hardware develop-ment.A simulation which involves the use of the AD-10

might require a somewhat longer solution timethan would have been required with ADI'soriginal version of the AHCS. For example, alarge problem requiring many functions of three

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or more variables will require a frame time onthe AD-10 of 30 to 100 microseconds. This willlimit problem frequencies in any hybrid loops to 150to 500 Hz for acceptable dynamic accuracy asopposed to the 1000-Hz limit for the all-analogapproach. However, the greater programming flexi-bility and computing capacity provided by theAD-10 far outweigh the reduction in solution speed.There is little difference if any in problem setuptime between this version of the AHCS and ADI'soriginal version for any problem which could havebeen run on the original version. Problems in-volving a large number of multivariant functionswith a data base of the order of 200,000 wordsrequire a setup time of about 1 second, most ofwhich is required to load the AD-lO's multiportdata memory.

The modular analog computer

As noted earlier, the elimination of the analogcomputer patch panel is mandatory in the designof an advanced hybrid computer system if theanticipated advantages of such a system are to berealized. Elimination of the patchpanel requiresthat switches be provided to interconnect theanalog components. The patchpanel in a present-day analog computer provides the programmer withgreat flexibility in interconnecting the various com-puting elements. It is totally impractical in anautopatch system to provide enough switches toduplicate the interconnection flexibility inherent ina patchpanel system. Thus, one of the designchallenges has been to d?fine a structure for anautomatically patched analog computer that wouldpreserve a sufficient degree of component inter-connection flexibility to handle a broad range ofsimulation requirements without being impracticalor economically unfeasible from the standpoint ofthe number of interconnection switches required.Every study of automatic patching in recent years

has recognized the necessity of organizing theanalog computer into modules in order to reducethe number of switches required to allow inter-connection of components. In defining the modularbreakdown and the switch matrix within and be-tween modules, it is necessary to take into accountthe types of problems which will be solved, thecomponent and switch hardware cost and per-formance requirements, and the complexity of soft-ware needed for the compiler which converts thesimulation language source program into componentassignments and a scaled circuit.Experience with the prototype autopatch AD/

Four, PDP-9 hybrid system at the University ofMichigan Simulation Center has provided valuableinsight into the hardware-software compromiserequired for the configuration of a practical auto-patch system. The configuration of the modularanalog computer is based Qn this experience. Thereare two basic types of computing modules in themodular analog computer: the amplifier module andthe logic module. Most of the modules in a

July 1976

typical installation would be amplifier modules.Each amplifier module contains:

8 summer-integrators,32 multiplying digital-to-analog converters,12 reference or nonmultiplying DAC's,8 multipliers, and2 hard limiters.

The configuration of the amplifier module is dis-cussed in detail in ADI's final report on theAHCS.'Each logic module contains:16 comparators,16 logic function generator units,4 sequencer/timer/counter units, and1 module output controller.

Detailed discussions of the logic module are pro-vided elsewhere."96

Since the modular analog computer involvesparallel mechanization, it is clear that there mustbe enough analog and logic components to solvethe largest problem envisioned for the system.The modular analog computer in a typical AHCSmight have 30 modules consisting of 26 amplifiermodules and 4 logic modules. Such a system wouldinclude the following impressive component count:208 summer-integrators,208 multipliers,832 MDAC's,312 RDAC's,52 hard limiters,64 comparators,64 logic function generators, and16 sequencer/timer/counterunits.

A real key to the development of the AHCSis a low-cost, high-reliability switch matrix-suchas would be possible through use of LSI circuitryfor the analog switches and switch setting registers.It appears that it will be feasible to mount a16 X 8 voltage-switch matrix plus associated digitalregisters on a single chip. The effect of finiteswitch "on" resistance (approximately 50Q Q)will be eliminated by terminating each of the eightmatrix outputs with voltage-following amplifiers.The 16 matrix inputs come from low-impedanceoperational amplifier outputs. Leakage current from"off" switches as well as capacitive coupling across"off" switches will cause negligible crosstalk be-cause of the low-impedance voltage sources drivingthe switch inputs. Normal range of the input andoutput voltages for the switch matrix will be±10 volts. The development of this switch matrixLSI circuit represents one of the major design tasksin the development of the modular analog computer.The switch matrix will be used for both inter-

module and intramodule switching. By providingflexible interconnection capability among computingcomponents within a module, it is possible to minni-mize the number of switches (and hence also thewiring) required for interconneetions between oramong modules. This is important in reducingsystem cost and complexity.

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The intermodule switching scheme in the modularanalog computer provides convenient interconnec-tion to external analog and logic signal trunks. Thisis important for tie-in to both the AD-10 andexternal hardware.

Conclusions

Many simulations necessitate the use of a hybridcomputer, because of real-time requirements (e.g.,man in the loop studies, etc.). Many other simula-tions presently being performed in an all-digitalfashion could be performed on a hybrid system ata substantial savings in cost per solutions. The ad-vanced hybrid computer system defined herein willfurther increase the cost effectiveness of this ap-proach through the addition of automatic patching,remote timeshared access, and improved software. M

References

1. "Advanced Hybrid Computer Systems," Final Report,Army Contract DAAG39-74-C-0076, by Applied DynamicsComputer Systems Division, Reliance Electric Co., AnnArbor, Michigan, May 1974.

2. R. M. Howe, R. A. Moran, and T. D. Berge, "Time Sharingof Hybrid Computers Using Electronic Patching," 1970Fall Joint Computer Conf., AFIPS Conf. Proc., Vol. 37,1970, pp. 377-386.

3. R. M. Howe, "Frame-Rate Requirements for DigitalFunction Generation in Hybrid Computing Loops,"Applied Dynamics International Application Report,October 1975.

4. D. C. Peak, "A Survey of Requirements for PresentDay and Fourth-Generation Hybrid Computer Systemsin the United States," Proc. Special Symp. AdvancedHybrid Computing (USAMC), San Francisco, July 23-24,1975, pp. 161-166.

5. E. J. Fadden, "Programmable Parallel Logic for an Ad-vanced Hybrid Computing System," Proc. Special Symp.Advanced Hybrid Computing (USAMC), San Francisco,July 23-24, 1975, pp. 115-120.

G. F. Graber is president of AppliedDynamics International. Before joining ADIin 1962, he was engineering sales managerfor Electronic Associates, Inc. His experiencein hybrid computers includes applications,systems design, and market analysis. Graberreceived a BSEE from Rutgers Universityand has attended graduate school at Prince-

s " M:_ ton University.

Edward J. Fadden, vice-president of marketingfor Applied Dynanics International, has heldvarious positions in engineering, quality as-surance, and marketing since joining ADI in1964. He has been involved in the conceptual

-1, development, detailed design, and applicationsof ADI's analog and hybrid products. He re-ceived his BS and MS from Case Institute ofTechnology and his Ph.D from the Universityof Michigan.

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INCARDIOLOGY"Let us identify those problems in cardiologywhich, with the help of computers, can yield asolution that improves medical care and reducescosts. The time is past when we can reportwork on such problems with only the assertionthat results look promising. Thus, let us alsocontinue the traditions of scientific inquiry andshow how our results can be independentlyreplicated and how these results are relevantto the clinical practice of cardiology."

Jerome R. Cox, Jr., Sc. D.Paul G. Hugenholtz, M.D.

Preface, Proceedings of the 1975 InternationalConference on Computers in Cardiology

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