ECE223, Final Review Tutorial, Winter 2009 [aTabibiazar@uwaterloo.ca]

[Q1-W2008F-M] Consider the following state diagram for a circuit with one input X and one output Z.Analyze this state diagram and draw its circuit implementation using

• Synchronous JK flip-flop (state Q0) and T flip-flop (state Q1) and MUX-4x1 for Z• Asynchronous SR latches with feedback• Synchronous ROM

[Q2-F2002F] Consider the following flow table for an asynchronous circuit with two inputs T and C and oneoutput Q. Obtain a minimized flow table. Is there a race-free assignment in your minimized flow table? If so,what is it? If not, Why not?

[Q3-W2009A] Make a proper assignment of internal state variables for the flow table below.

QQ+

X = ”00” X = ”01” X = ”11” X = ”10”1 1 1 4 52 1 2 2 53 3 1 2 34 3 2 4 55 4 5 2 5

[Q4-F2006M-M] What are three different ways of representing a signed number? Assume 7 bit numbers andrepresent (-15) in each of them, then find B-A and A-C for A = “1101010”, B = “0110101” and C = “0010101”in all forms.

[Q5] Use a 3-bit binary counter with active-high load (L) and Increment (I) control inputs (load has higherpriority than increment) and implement a circuit (draw) to generate and repeat the following sequence at theoutput of the counter. Initial counter value is “000”. Check that you have implemented a self-correcting logic.

000 → 001 → 010 → 101 → 110 → 111