IEICE TRANS. COMMUN., VOL.E101–B, NO.9 SEPTEMBER 20181949

PAPERAnalysis and Implementation of a QoS Optimization Method forAccess Networks

Ling ZHENG†,††, Student Member, Zhiliang QIU†, Nonmember, Weitao PAN†a), Member, Yibo MEI†,Shiyong SUN††, and Zhiyi ZHANG††, Nonmembers

SUMMARY High-performance Network Over Coax, or HINOC forshort, is a broadband access technology that can achieve bidirectional trans-mission for high-speed Internet service through a coaxial medium. InHINOC access networks, buffer management scheme can improve the fair-ness of buffer usage among different output ports and the overall loss per-formance. To provide different services to multiple priority classes whilereducing the overall packet loss rate and ensuring fairness among the outputports, this study proposes a QoS optimization method for access networks.A backpressure-based queue threshold control scheme is used to minimizethe weighted average packet loss rate among multiple priorities. A theo-retical analysis is performed to examine the performance of the proposedscheme, and optimal system parameters are provided. Software simulationshows that the proposed method can improve the average packet loss rateby about 20% to 40% compared with existing buffer management schemes.Besides, FPGA evaluation reveals that the proposed method can be imple-mented in practical hardware and performs well in access networks.key words: access network, quality of service, packet switching, buffermanagement, FPGA

1. Introduction

In the last several years, “Triple Play” services, whichcan provide fast Internet access, high-definition television(HDTV) and telephone service in one physical network,have attracted more and more attentions in both industry andacademe. With the development of optical fiber communi-cation in the last decades, the bandwidth in the backbonenetwork is large enough to support high-speed multimediaservices. However, when it comes to the access network, thepredominated last-100-meter access technology remains un-clear and needs further research. High-performance networkover coax (HINOC) [1]–[4] is a broadband access technol-ogy that can achieve bidirectional transmission for high-speed Internet services over coaxial cable medium. Thistechnology provides a practical solution to broadband ac-cess within 100 meters for the “Triple Play” scenario. Byusing the widespread existing coaxial cable in TV networks,users can enjoy IPTV, HDTV, VoIP and the high-speed inter-net service. Without the re-construct of the home networks,

Manuscript received October 30, 2017.Manuscript revised February 7, 2018.Manuscript publicized March 14, 2018.†The authors are with State Key Laboratory of Integrated Ser-

vices Networks (ISN), Xidian University, Xi’an, P.R. China.††The authors are with Science and Technology on Informa-

tion Transmission and Dissemination in Communication NetworksLaboratory, The 54th Research Institute of China Electronics Tech-nology Group Corporation (CETC), Shijiazhuang, P.R. China.

a) E-mail: wtpan@mail.xidian.edu.cnDOI: 10.1587/transcom.2017EBP3405

the HINOC technology has great advantages in reusing thelimited bandwidth resource and reducing the cost of line re-construction, which makes it a promising technology in ac-cess networks. This technology has become an internationalstandard ITU-T J.196.1 [5].

A typical architecture of a HINOC based access net-work is shown in Fig. 1. When fiber-to-the-building (FTTB)installation is present, Ethernet data can be transferred overcoaxial cables that are spread throughout the corridor andthe door. A HINOC Bridge (HB) and a HINOC Modem(HM) are placed between the optical network unit and thehousehold end user. Furthermore, broadband network ex-ports are connected to the backbone network through GPON(Gigabit-Capable Passive Optical Network) or EPON (Eth-ernet Passive Optical Network). In the HINOC network, themedia access layer protocol is called HINOC Media AccessControl (HIMAC). The HB is responsible for the protocolconversion between Ethernet and HINOC network. A userterminal can access the Internet and see the CATV by link-ing an HM device. HINOC makes it possible for PC, smart-phone, VoIP device and TV to communicate with each otherefficiently.

The Quality of Service (QoS) control is mainly imple-mented in HB devices in HINOC access networks. Differ-entiated service levels are provided among different of usersor applications. The users or applications which have higherpriority may receive better services. According to their pri-ority classes, packets are tagged in the protocol headers,and these tags are used for later processing to ensure QoSguarantees. HB is the head-end equipment in the HINOCnetwork. Similar to a switch in the network, it performsa management and switching function for the terminal HMequipment connected to it. The HB receives and stores theEthernet frames and then forwards them to the destinationHM. The HMs also can transmit data to each other throughthe HB. HB maintains a virtual output queue (VOQ) [6] foreach HM, and all of the VOQs share the total memory ofHB. Compared with the crossbar based switching architec-ture, the shared-memory-based switch architecture is easyto implement in a single chip and widely used in today’scommercial switches. However, the QoS control in sharedmemory switches suffer from fairness problems. First, afew VOQs could occupy all of the shared buffers, so thatother output ports are “starved.” Second, in a VOQ, bufferspace may be unfairly shared between low-priority framesand high-priority frames. Low-priority frames could occupy

Copyright c© 2018 The Institute of Electronics, Information and Communication Engineers

1950IEICE TRANS. COMMUN., VOL.E101–B, NO.9 SEPTEMBER 2018

Fig. 1 Typical HINOC based access network architecture.

a large buffer space, and consequently, high-priority framesare “expelled.” In the last several decades, many buffermanagement schemes have been proposed [7]–[12] to ad-dress the unfairness problem among different output ports.In various buffer management policies, the dynamic thresh-old (DT) scheme is widely used by switch vendors becauseof its simplicity and adaptability [13], [14].

This study focuses on the second problem: extendingthe queue threshold scheme to multiple loss priorities to sup-port differentiated services. Reference [15] proposed severalmethods that incorporate loss priorities into the DT schemecalled OWA and AWA schemes. However, the thresholdvalue of each priority queue depends largely on the DT fac-tor. The performance of DT is unstable because it attemptsto use a simple linear model to describe the nonlinear queue-ing system [8]. Reference [16] proposed a method of an-alyzing shared memory priority queues with two discardlevels. But this work only proposed a method of analyz-ing shared memory priority queues with two discard levels.How to get optimal system parameters is not provided.

In this paper, we propose an efficient Quality of Service(QoS) optimization method for the HINOC access network.The main contributions of this paper are as follows.

1. A metric called weighted average packet loss rate isused to measure the overall system QoS performance.Theoretical analysis is performed and the closed-formformulas are derived to quantitatively analyze the influ-ence of different parameters. By solving the optimiza-tion problem, the optimal value of priority thresholdcan be obtained.

2. A QoS optimization method is proposed. The proposedmethod combines the DT scheme with a backpressure-based priority threshold. The advantages of the pro-posed method is that: a) The buffer is shared fairlyamong different VOQs. b) For a specific VOQ, thebuffer space of this VOQ is effectively shared amongflows with different priorities to reduce the overall loss

rate.3. This paper also focus on practical engineering applica-

tions. The proposed method is implemented in State-of-the-art Field Programmable Gate Array (FPGA) de-vice and the design of the FPGA model is explainedin detail. The FPGA verification result shows that theproposed scheme is resource efficient, and is easy tobe applied high-speed switching devices. Experimentalresults show that the proposed method performs well inaccess networks.

The rest of the paper is organized as follows: In Sect. 2,we model the system and derive the closed form formulasfor system analysis and optimization. Section 3 describesthe design of the QoS optimization method. Performancesimulation and FPGA evaluation are present in Sect. 4, andfinally, Sect. 5 concludes the paper.

2. System Model and Analysis

2.1 Overview

Consider the HB device in HINOC access system in Fig. 1.The main function of the HB device is data forwarding andswitching among multiple HINOC modems and the Ether-net. The HB has two types of interface: Ethernet inter-face and HINOC Media Access Control (HIMAC) interface.The Ethernet frames destined to an HM are first assembledinto HIMAC frames, then forwarded to the destination HM.When an HM needs to send data to Ethernet, the HIMACframes are first segmented to Ethernet frames in the HB andthen transferred to Ethernet. Therefore, the HB performslike a shared memory switch supporting QoS differentiationin the network with an additional function of the MAC layerprotocol conversion. Therefore, the priority queueing sys-tem can be used to analyze the HINOC access system.

The structure of a single-stage shared memory switchwith M input ports and M output ports is shown in Fig. 2.

ZHENG et al.: ANALYSIS AND IMPLEMENTATION OF A QOS OPTIMIZATION METHOD FOR ACCESS NETWORKS1951

Fig. 2 System model.

The switch employs a shared memory with a total space ofS . In the shared memory, there are M virtual output portqueues (VOQ) to store the packets destined to each out-put port. All VOQs share the total memory space of theswitch, and the length of each VOQ is constrained by the dy-namic threshold B. The input packets have several classesof services. Packets requiring high performance (e.g., lowdelay and loss) have a high priority. Packets with lowerperformance requirements are assigned to the lower prior-ity classes. For efficiency and simplicity, we assume theinput packets only have two priority classes, high-priorityand low-priority. The service policy is assumed to be gen-eral processor sharing (GPS) [17]. Due to the fact that allthe VOQs have the same threshold B to control their queuelength, so that each VOQ can be regarded as equivalent.Therefore, without loss of generality, we only analyze thebehavior of a certain VOQ. The queueing model for a cer-tain VOQ is drawn in detail in the dashed box in Fig. 2.

As shown in Fig. 2, at a given VOQ, two priorityqueues share a common buffer space B, where B is con-trolled by the DT policy. The packet arrival of priority queuei is modeled as a Poisson process with an arrival rate of λi,and the service time is exponentially distributed with param-eter µi. In addition, each queue i has a weight wi to indicateits importance. The queue length of each priority queue isni. The load of each priority queue i is ρi = λi/µi, and thetotal load of the port is ρu = (λ1 +λ2)/(µ1 +µ2). The ratio oflow-priority load to high-priority load is k = ρ2/ρ1. Thesenotions are summarized in Table 1 for the sake of clearness.

The system above can be modeled as a two-dimensional Markov chain [18], with the states of (n1, n2).The stationary distribution is

Table 1 Summary of notation.

S Total buffer space of the shared memory

B Dynamic threshold for each VOQ,

the queue length of each VOQ is no larger than this threshold

T Priority threshold for the VOQ,

if the queue length of the VOQ is larger than this threshold,

low-priority packets are rejected and dropped

β Priority threshold factor, equals to T/B

λi Packet arrival rate of priority queue i

µi Packet service rate of priority queue i

wi Weight of priority queue i

ni Number of packets of priority queue i

ρi Load of priority queue i, equals to λi/µi

ρu Total load of the output port, equals to

(λ1 + λ2)/(µ1 + µ2)

k The ratio of low-priority load to high-priority load,

equals to ρ2/ρ1

P(n1, n2) =ρn1

1 ρn22

G(1)

where G is a normalization constant guaranteeing thatP(n1, n2) is a probability distribution, that is

G =∑

(n1,n2)∈R

ρn11 ρ

n22 (2)

where R is the state space of the Markov chain.

2.2 Buffer Occupancy without Priority Threshold

In the two-priority queueing model, each priority queue isassigned a weight wi, i = 1, 2, and w1 > w2 (because thehigh-priority packets are always of more importance). Ac-cording to the GPS scheduling policy, the server operatesat a fixed total service rate µ. At all times, priority queuei is allocated service rate w1∑

i wiµ. Therefore, the service rate

of each queue is µ1 = w1w1+w2

µ, µ2 = w2w1+w2

µ. On accountof the condition w1 > w2, we have µ1 > µ2. As a result, thehigh-priority queue will receive a higher service rate. On thecontrary, the low-priority queue has a low service rate anda low dequeue speed. When the two classes of flow have asimilar arrival rate, low-priority packets may occupy morebuffer space, so the high-priority packets are expelled. Nowwe want to analyze the occupancy of low-priority packetswithout any control when the buffer is full. We assume thatn1 + n2 = B, then

P(n1, n2|n1 + n2 = B) =ρn1

1 ρn22∑

n1+n2=Bρn1

1 ρn22

=kn2ρn1+n2

1∑n1+n2=B

kn2ρn1+n21

=(k − 1)kn2

kB+1 − 1

(3)

1952IEICE TRANS. COMMUN., VOL.E101–B, NO.9 SEPTEMBER 2018

Fig. 3 Number of low-priority packets versus the load ratio k. (B = 10)

E(n2|n1 + n2 = B) =

B∑n2=0

n2P(n1, n2|n1 + n2 = B)

=1

Bk+1 − 1

[k

k − 1(1 − kB)+BkB+1

](4)

From Fig. 3, we can see that with the increment of theload ratio k, the low-priority packets will occupy more bufferspace. The total buffer space B is set to 10 packets. If burstytraffic of high-priority flow arrives, the space for storing thepacket would be insufficient. Moreover, although the GPSscheduling algorithm can provide services for each priorityqueue in proportion to weights, it has no control over thepacket loss rate. The high-priority queue will have a similarloss rate as the low-priority queue if no priority control isestablished during the enqueue process. This similarity inloss rate will affect QoS differentiation as a result.

2.3 Analysis of the Priority Threshold Policy

To solve these problems, we use the priority threshold pol-icy. We set a priority threshold with the value of T . Whenthe total queue length is beyond this threshold, the packetsof low-priority traffic are rejected and dropped. If we wantto perform exact analysis of the system, two-dimensionalMarkov chain should be used. However, the expressionsof the loss rate and the numerical computation involved ishighly complex. For simple and efficient analysis and cal-culation, we employ the approximation method described in[16]. 1D Markov chain is used to analyze the system be-havior. State n represents the total number of packets in theshared memory. The packet arrivial rate depends on the sys-tem state, and the service rate is approximated to µ1 + µ2, asshown in Fig. 4. This solution is shown to have negligibleerror but produces compact and easy-to-understand expres-sions for the system behavior.

2.3.1 Steady-State Probabilities

Figure 4 shows the state transition diagram of the priority

queue threshold scheme. The state transition probabilitiesare expressed as

pn,n+1 =

λ1 + λ2, n < Tλ1, T ≤ n < B0, n = B

(5)

pn,n−1 =

µ1 + µ2, 0 < n ≤ B0, n = 0

(6)

With the global balance equations for steady-stateprobabilities (pn), we obtain(λ1 + λ2)pn = (µ1 + µ2)pn+1, 0 ≤ n < T

λ1 pn = (µ1 + µ2)pn+1, T ≤ n < B(7)

Steady-state probability pn is obtained as follows:

pn =

(ρu)n p0, 0 ≤ n ≤ T(ρr)n−T (ρu)T p0, T + 1 ≤ n ≤ B

(8)

where ρu = (λ1 +λ2)/(µ1 +µ2), ρr = λ1/(µ1 +µ2). We calcu-late p0 using (8) and the condition

∑Bn=0 pn = 1 as follows:

p0 =(1 − ρu)(1 − ρr)

(1 − ρr)(1 − ρT+1u ) + ρrρT

u (1 − ρB−Tr )

(9)

2.3.2 Packet Loss Rates

The loss rate of high-priority packets L1 is the probabilitythat the shared memory is full. The loss rate of low-prioritypackets, L2, is the probability that the total queue length islarger than threshold T . From (8) (9), we obtain

L1 = pB = p0ρTu ρ

B−Tr

L2 =

B∑n=T

pn = p0ρTu ρr

1 − ρB−Tr

1 − ρr

(10)

For the sake of clarity, we define the priority thresh-old factor β as the ratio of priority threshold T to the bufferspace B, i.e. β = T/B. In the following analysis, we useβ as an argument instead of T . Figure 5 shows the rela-tionship between priority threshold factor β and packet lossrate for different load ratio k when the total traffic load ρuis set to 0.9. We can see that for all given k, with the incre-ment of β, the loss rate of high-priority packets rises and theloss rate of low-priority packets drops. This is because thesmaller threshold T will block more low-priority packets toenqueue, so that L2 will rise. But the trends of L1 have aninverse relationship with that of low-priority packets. Thatis to say, with a smaller T , more buffer space is reservedfor high-priority packets, leading to lower high-priority lossrate. When β = 0.9, L1 and L2 are almost equal. Thisconfirms the fact that without the priority threshold control,the loss rate of the high-priority packets is similar to low-priority packets.

ZHENG et al.: ANALYSIS AND IMPLEMENTATION OF A QOS OPTIMIZATION METHOD FOR ACCESS NETWORKS1953

Fig. 4 The simplified state transition diagram.

Fig. 5 Packet loss rate of the two kinds of packets versus the prioritythreshold factor β for different k. (ρu = 0.9)

2.3.3 Average Queue Length and Delay

Let the the expectation of total queue length to be N, then

N =

B∑n=0

npn

=

T∑n=0

n(ρu)n p0 +

B∑n=T+1

nρTu ρ

(n−T )r p0

=p0

(1 − ρu)2

[(T (ρu − 1) − 1)ρT+1

u + ρu

]+

ρTu p0

(1 − ρr)2

[(B(ρr − 1) − 1)ρB−T+1

r + (T + 1)ρr − Tρ2r

](11)

Let the average number of high-priority packets is N1,and low-priority packets N2, the average delay of the twokinds of packets is D, the average arrival rate of the twokinds of packets is λ, we obtain

λ = (λ1 + λ2)P(0 ≤ n < T ) + λ1P(T ≤ n < B)= λ1(1 − P(B)) + λ2P(0 ≤ n < T )

= λ1(1 − p0ρTu ρ

B−Tr ) + λ2 p0

1 − ρTu

1 − ρu

(12)

And the average arrival rate of high and low prioritypackets are also obtained:

λ1 = λ1(1 − p0ρTu ρ

B−Tr )

λ2 = λ2 p01 − ρT

u

1 − ρu

(13)

Fig. 6 Normalized number of low-priority packets versus the prioritythreshold factor β for different k. (ρu = 0.9)

Using Little’s theorem, we have

D = N/λ (14)

Together with (13) (14), then we get

N1 = λ1D

N2 = λ2D(15)

Using (15) together with Little’s theorem, we can cal-culate the delay of the high-priority packets D1 = N1/λ1,D2 = N2/λ2.

Figure 6 shows the relationship between prioritythreshold factor β and the normalized number of low-priority packets, i.e. N2

N1+N2, for different load ratio k. It can

be found that for all given k, the ratio of low-priority pack-ets increases with the increasing β. Without the thresholdT (when β = 1), more buffer space will be occupied by thethe low-priority packets. But with a proper value of T , low-priority packets are dropped if the queue length is larger thanT , so the low-priority packets will not occupy much bufferspace, and suitable buffer space is reserved for high-prioritytraffic.

2.4 The Optimal Value of T

The formulas presented above indicate that a large thresholdT causes a large loss rate for high-priority packets and a re-duced loss rate for low-priority packets. We aim to optimizethe overall packet loss rate to make a reasonable trade-off

between L1 and L2.We define the metric called weighted average packet

loss rate, denoted as WL, to measure the overall packet loss

1954IEICE TRANS. COMMUN., VOL.E101–B, NO.9 SEPTEMBER 2018

Fig. 7 Weighted average packet loss rate versus the priority thresholdfactor β for different k. (ρu = 0.9)

probability of the system. Thus, we obtain

WL =w1L1 + w2L2

w1 + w2

=w1 p0ρ

Tu ρ

B−Tr + w2 p0ρ

Tu ρr

1−ρB−Tr

1−ρr

w1 + w2

(16)

where w1 and w2 are the weights of high-priority and low-priority queues, respectively. Through the calculation of theminimum value of WL, the optimal value of T can be ob-tained, i.e. T ∗ = arg min0<T<B WL. The Eq. (16) suggeststhat the minimum of WL may depend on the input trafficload and weight. Then, we will examine the minimum ofWL through numerical results.

First, Fig. 7 shows the weighted average packet lossrate as a function of β for different k when weight w1 isset to 2 and weight w2 is set to 1. The total load ρu is setto 0.9. We can see a smaller k will bring a larger packetloss rate. It indicates that under the same input traffic load,the larger proportion of high-priority flow, the larger overallpacket loss rate. Besides, for all given k, the weighted aver-age loss rate decreases before a certain value of β, and thenincreases after that. Under the condition w1 = 2 and w2 = 1,when β = 0.7, the weighted average loss rate reaches itsminimum value, i.e. the optimal value of T is 0.7B as shownin Fig. 7. Parameter k doesn’t shift the location of the min-imum, so that the optimal value of the priority threshold isinsensitive to the input traffic condition.

Next, the influence of parameters w1 and w2 is alsotaken into account. Figure 8 shows the relationship betweenthe weighted average packet loss rate and the priority thresh-old factor β for different weights when k = 1. The weight w2is set to 1 while w1 is set to 2, 3, 4 and 5 respectively. It canbe seen that under the same input traffic, the higher weightof the high-priority flow, the smaller overall packet loss rate.In addition, the optimal value of β depends on the value ofweight. It can be observed from Fig. 8 that the optimal valueof β decreases with the increment of w1. That is to say, if thehigh-priority flow is of more importance, a smaller priority

Fig. 8 Weighted average packet loss rate versus the priority thresholdfactor β for different weights. (ρu = 0.9)

threshold should be set. In our calculation, when w1 is setfrom 2 to 5 and w2 = 1, the optimal value of β lies in therange 0.55 ≤ β ≤ 0.7, and any β in that range is acceptablein the four cases.

In summary, numerical results show that the optimalvalue of priority threshold T depend on parameter w1 andw2, but insensitive to input traffic conditions. In practical ap-plications, the weight for each flow is normally pre-assignedaccording to the priority field in protocol headers and isknown for us. However, the input traffic condition is timevariant and usually hard to get. According to the analysisabove, without focusing on the input traffic conditions, theoptimal value of T can be obtained by solving the minimumvalue of Eq. (16). This is a significant advantage of the pri-ority threshold scheme.

DISSCUSSION: 1) Although the system model andnumerical study use only two priority classes for theoreti-cal analysis, the priority threshold scheme can be extendedto three or more priority classes. 2) The formulas obtainedin Sect. 2 can also be used for memory space estimating bysolving the total memory space S to obtain an appropriatepacket loss rate.

3. Designing of the QoS Optimization Method

Analysis results indicate that a proper threshold for low-priority packets should be set for each VOQ. When burstytraffic of high-priority arrives, a backpressure [19] should beapplied to the threshold to block the low-priority packets, re-serving buffer space for the incoming high-priority packets.In this section, we introduce the design of QoS optimizationmethod. The proposed method combines the DT schemewith a backpressure-based priority threshold scheme. Thedetailed design of this method is presented as follows.

We consider the switch architecture described inSect. 2.1 and provide the following notations. The queuelength of VOQ i is Qi. The total buffer size of the switchis S . Each VOQ has the same dynamic threshold value B.When Qi ≥ B, no packet is allowed to enter the VOQ. Each

ZHENG et al.: ANALYSIS AND IMPLEMENTATION OF A QOS OPTIMIZATION METHOD FOR ACCESS NETWORKS1955

Fig. 9 State transition diagram of an output port.

VOQ also has an individual priority threshold Ti. WhenQi ≥ Ti, the packets with low-priority are rejected. More-over, if bursty traffic arrives and the port becomes over-loaded, a backpressure is applied to the threshold Ti, leavingmore buffer space for the high-priority packets.

Each output port has two states: underload and back-pressure. Figure 9 depicts the state transition diagram ofeach output port. Initially, each output port is in the under-load state. The occurrence of an enqueue event, a dequeueevent, or a timeout event may cause a state change. Once apacket enqueues and Qi ≥ Ti, the output port is about to con-gest. Then the output port shifts to the backpressure state. Inunderload state, the threshold Ti = βB, where β is the prior-ity threshold factor as described in Sect. 2.3.2. In backpres-sure state, threshold Ti is further reduced by a backpressureintensity. So that more buffer space is reserved for high-priority packet. When Qi < Ti or after a specific amount oftime, the output port returns to the underload state.

We use two parameter α and β to control the thresholdof each priority queue, where α is the DT factor and β isthe priority threshold factor. We set the threshold B of eachVOQ as described by the DT scheme, i.e.,

B = α

S −∑i

Qi

(17)

where α is the DT factor.In each VOQ, the priority queue threshold Ti is

Ti = βB − BPi

= βα

S −∑i

Qi

− BPi(18)

where β is the priority threshold factor, and the the value ofβ can be got by solving the minimum value of Eq. (16), asdescribed in Sect. 2.4. BPi is the backpressure intensity witha initial value of 0. When the output port is in backpressurestate and a new high-priority packet enqueues, BPi increasesby one average packet size. When Qi < Ti or the VOQstays in backpressure state for a specific period, the VOQwill return to underload state. A hardware counter is usedto control the period over which a port stays in backpressurestate.

Given that micro-burst is a common traffic pattern inmodern communication networks [20]–[22], the timeoutvalue is set to a value that is as long as the duration of mostmicro-burst traffic (i.e., a few milliseconds). The timeout

Algorithm 1 Backpressure-based queue threshold controlalgorithmInput: A packet P destined to output port i needs to en-

queue.Output: Whether the packet can enqueue successfully.

1: B = α

(S −

∑i

Qi

);

2: Ti = βB − BPi;/*update state*/

3: if state == Underload && Qi ≥ Ti then4: state = Backpressure;5: else if state == Backpressure && Qi < Ti then6: state = Underload;7: else if state == Backpressure && TIMEOUT then8: state = Underload;9: end if

/*packet enqueue judegment*/

10: if Qi + P.size > B then11: return FALSE;12: else13: if P.priority == 1 then14: if state == Underload then15: enqueue(P);16: BPi = 0;17: else if state == Backpressure then18: enqueue(P);19: BPi = BPi + avg pkt size;20: if BPi > Ti then21: BPi = Ti;22: end if23: end if24: return TRUE;25: else if P.priority == 2 then26: if state == Underload then27: if Qi + P.size > Ti then28: return FALSE;29: else30: enqueue(P);31: return TRUE;32: end if33: else if state == Backpressure then34: return FALSE;35: end if36: end if37: end if

value is much shorter than the duration of long-lived flows(i.e., a few seconds). Therefore, the timeout value would notsignificantly influence the fairness of the low-priority flows.The designing details of the proposed queue threshold con-trol scheme are depicted in Algorithm 1 as follows.

1956IEICE TRANS. COMMUN., VOL.E101–B, NO.9 SEPTEMBER 2018

4. Simulation and Evaluation

4.1 Software Simulation

In this section, we compare the performances of theproposed method and other buffer management schemesthrough software simulations under different traffic condi-tions. The following parameters are assumed throughout thesimulations. We consider a single-stage shared-memory-based switch with 16 input ports and 16 output ports thatrun at an identical rate. The total memory size S is 1,600packets. In the simulation, we assume that the input packetshave a fixed length and time is split into discrete time slots.A time slot is the processing time required for a packet frominput to output. During any given time slot, there is at mostone arrival to each input port, and one departure from eachoutput port. The traffic pattern applied to each input portis bursty traffic with a burst length of 50. The input packetshave two priorities: high and low. For simplicity, we assumethat the load of high-priority traffic is equal to that of low-priority traffic. Each simulation is performed 10 times using105 time slots each time.

In the simulation, ON-OFF model is used to simulatethe bursty traffic applied to each input port. In ON-OFFmodel, the following parameters need to be specified:

• the traffic load ρ;• the average length of burst periods burst length;• and the average length of idle periods idle length.

Let probability p1 denote to the state transition proba-bility from ON to OFF, and p2 denote to the state transitionprobability from OFF to ON. The length of burst periodsand the length of idle periods are geometrical distributed, sowe haveburst length = 1/(1 − p1)

idle length = 1/(1 − p2)(19)

The traffic load ρ is the probability that a packet is gen-erated at a time slot on average, so we obtainp(ON) = ρ

p(OFF) = 1 − ρ(20)

According to the global balance equation, we have

p(ON)p1 = p(OFF)p2 (21)

Together with (19) (20) and (21), we have the followingrelation

idle length = burst length × (1 − ρ)/ρ (22)

In our simulations, the burst length is set to 50, and thetraffic load ρ is set from 0.5 to 1.

First of all, Fig. 10 shows the weighted average packetloss rate as a function of priority threshold factor β for dif-ferent weights in simulation. The weight w2 is fixed to 1

Fig. 10 Weighted average packet loss rate as a function of prioritythreshold factor β for different weights in simulation.

Fig. 11 Weighted average packet loss rate versus traffic load.

while w1 is set to 2, 3 and 4 respectively. The DT factor αis set to 1, and traffic load ρ = 0.8. It is found that in thesimulation, the trend of weighted packet loss rate is similarto the result of the theoretical analysis. We can see the opti-mal value of β falls into the range of 0.55 ≤ β ≤ 0.7, whichagrees with the theoretical analysis well. In the remainingsimulations, we set w1 = 2, w2 = 1, and β = 0.7 to achievebetter performance.

Next, in Fig. 11, ST [7], DT [9], OWA [15], TF [10],and the proposed method are compared under different traf-fic loads. The summaries of ST, DT, OWA and TF schemesare explained as follows.

In the ST scheme, an arriving packet is admitted onlyif the queue length at its destination output port is smallerthan a given static threshold. In the simulation, the thresh-old for each priority queue is set to 50 packets. In theDT scheme, the length of each VOQ is controlled by a dy-namic adjustable threshold. The dynamic threshold is setaccording to Eq. (17). And the DT factor α is set to 1 ac-cording to Ref. [9] to get better performance. In the OWAscheme, each priority queue has its own threshold. De-fine the length of priority queue in VOQ i with priority p

ZHENG et al.: ANALYSIS AND IMPLEMENTATION OF A QOS OPTIMIZATION METHOD FOR ACCESS NETWORKS1957

Fig. 12 Packets loss rate under different queue management schemes.

is Qpi , p = 1, 2. Then the threshold for this priority queue is

αp(S −∑

i∑

p Qpi ). In the simulation, α1 is set to 2 and α2 is

set to 1. The main idea of the TF scheme is to set a thresholdT for the switch, and T = γS , where γ is called TF factor.When

∑i Qi < S − T , all the arriving packets are admitted.

When∑

i Qi ≥ S − T , only the packets destined to VOQ iwith the queue length Qi ≤ S/M are admitted. The arrivingpackets destined to VOQ i where Qi > S/M are filtered. Mis the number of input or output ports of the switch. In thesimulation, the TF factor γ is set to 25% of the total memoryspace inferred from Ref. [10].

It is found in Fig. 11 that ST performs the worst amongthe five schemes. Although this scheme is simple to imple-ment, it suffers from under-utilization of memory becauseit is not adaptive to input traffic. The other four schemesperform better than ST because they can adaptively allocatememory space according to the current queue state. So thatthe under-utilization problem is eliminated. DT and TF ex-hibit comparable performance, but TF is likely to performbetter under extremely high traffic load (ρ > 0.85). How-ever, these two schemes do not have priority control duringthe packet enqueue process. OWA and the proposed schemeperform well in our simulation. The proposed scheme ex-hibits the best performance among the five schemes becausethe optimal priority threshold is set for each VOQ to sup-port QoS differentiation. Besides, the proposed method em-ploys backpressure to reject low-priority packets when aport is overloaded. Therefore, buffer space is reserved forhigh-priority packets, and the overall loss rate is reduced.Compared with the OWA scheme, the proposed scheme canreduce the packet loss rate by about 20% on average, andabout 40% compared with the DT scheme.

Figure 12 illustrates the packet loss rate of the fivequeue management schemes when traffic load ρ is set to 0.8.It can be found that the proposed scheme has the minimumoverall loss rate. This scheme can significantly reduce theloss rate of high-priority packets at the expense of a slightincrement in the low-priority loss rate.

Finally, we evaluate the buffer utilization among dif-ferent queue manage schemes. The buffer utilization U isdefined as follows: U = w1N1+w2N2

(w1+w2)S , where N1 is the num-

Fig. 13 Buffer utilization under different queue management schemes.

Fig. 14 The FPGA verification platform for HINOC system.

ber of high-priority packets and N2 is the number of the lowpriority packets in the shared memory. S denotes to the to-tal buffer space. Figure 13 illustrates the buffer utilizationas a function of time slot, which implies that the proposedscheme can make more use of the buffer space than otherqueue management schemes. The buffer utilization is in-creased by more than 12% on average compared with theOWA scheme, and 24% compared with the DT scheme.

4.2 FPGA Implementation

The Field Programmable Gate Array (FPGA) verificationplatform for HINOC system is established to test the systemperformance. As shown in Fig. 14, the platform consists ofan Ethernet PHY chip, ADC/DAC, embedded CPU, and anFPGA chip. The shared-memory-based switching elementis implemented in the Altera Stratix V 5SGXEABN3F45C3chip. The proposed QoS optimization method is describedby Verilog HDL in the register-transfer level. The softwareQuartus 13.1 is used to synthesize the design. The FPGAresource utilization reported by the design tool is shown inTable 2. It can be found that the proposed scheme is re-source efficient and can be implemented by the State-of-the-art FPGA platform with low resource consumption. As aresult, the proposed scheme can be applied in practical high-speed switching devices.

Figure 15 shows the structure of the switching elementof the HINOC Bridge device. The main function of the

1958IEICE TRANS. COMMUN., VOL.E101–B, NO.9 SEPTEMBER 2018

Table 2 FPGA resource utilization.

Logic(%) DSP(%) Reg(%) Pin(%) RAM(%)

78% 66% 1% 26% 33%

Fig. 15 The structure of the switching element of HB.

switching element is data forwarding and switching amongthe HINOC modems and the Ethernet. The data processingprocedure is described as follows.Input: The switching element has two types of input inter-face: Ethernet interface and HINOC Media Access Control(HIMAC) interface. The Ethernet interface is connected toGigabit Ethernet, and the HIMAC interface is connected toHINOC network. Packets are received from each input portand then stored into the receive RAM in the data processingmodule. The HIMAC frames input from HIMAC interfaceare firstly segmented into Ethernet frames through the HI-MAC segmenter module.Flow classification: The packet header is exacted and sendto the flow classification module. According the flow clas-sification rules, the classification result is then returned, in-dicating which action should be carried out for the packet,such as entering a specified virtual output queue, discarding,or modifying match fields. After the destination output portis found, the packet is sent and stored into the proper virtualoutput queue.Queue Management: The HB maintains a virtual outputqueue for each HM connected to it, and each VOQ has mul-tiple priority queues indicating a specific priority. The queuemanage module manages the pointers and data structures foreach VOQ, and the packet data is stored in the shared mem-ory actually. Each VOQ has a threshold and all packets tobe enqueued are dropped if the queue length is larger thanthe threshold. Each priority queue in a VOQ also has a pri-ority threshold. When the queue length is larger than a spe-cific priority threshold, packets that has a lower priority arerejected and dropped. The proposed scheme is applied tocontrol the thresholds to obtain better QoS performance.Shared Memory: The shared memory is implemented inthe FPGA on-chip RAM, and the total memory space is lim-ited to 4 Mb. The packet data is stored in the share mem-ory, while the packet delivery inside the switching element

Table 3 Ethernet data throughput with static threshold.

Input flow rate (Mbps) Output flow rate (Mbps)High Medium Low High Medium Low Loss

0 0 292 0 0 292 00 292 292 0 190 189 56.14

97 292 194 63 190 126 58.29292 194 97 190 126 63 82.57146 146 146 126 126 126 20194 194 194 126 126 126 68292 292 292 126 126 126 166

Table 4 Ethernet data throughput with proposed scheme.

Input flow rate (Mbps) Output flow rate (Mbps)High Medium Low High Medium Low Loss

0 0 292 0 0 292 00 292 292 0 292 87 29.29

97 292 194 97 240 42 36.57292 194 97 221 107 51 72146 146 146 146 146 86 8.57194 194 194 194 143 42 36.29292 292 292 235 106 38 122

is achieved by packet pointers. Specifically, once a packetenters the switching element, a buffer space of the sharedmemory is allocated for the packet, and a pointer to thepacket is returned. The VOQs are consisted of the linklistsof these pointers.Output: Finally, the queue scheduler module polls eachVOQ and fetch a packet (if any) from it, then delivers thepacket to the associated output port. The switching elementalso has two types of output interface: Ethernet interfaceand HIMAC interface. Note that packets destined to HMsshould be assembled into HIMAC frames through the HI-MAC assembler module before sent to HINOC network.

In the verification platform, we generate Ethernet flowswith different traffic rates. The Ethernet frames have ran-dom sizes. The output port capacity is limited to 380 Mbps.We assume that input data frames have three priority types:high, medium, and low. The ratio of the three priorityweights is 4:2:1. Table 3 shows the Ethernet data through-put with a simple static threshold for different input trafficconditions. The Ethernet data throughput with the proposedscheme is presented in Table 4. Compared with the staticthreshold scheme, the proposed scheme can reduce the av-erage frame loss rate from 12.8% to 57% under differentinput traffic conditions.

5. Conclusion

HINOC is a broadband access technology that can achievebidirectional transmission for high-speed Internet servicethrough a coaxial medium. In HINOC HB devices, buffermanagement scheme can improve the fairness of buffer us-age among different output ports and the overall packetloss performance. To provide different services for multi-ple priority classes while reducing the overall packet lossrate and ensuring fairness among the output ports, we pro-pose a QoS optimization method. This method combines

ZHENG et al.: ANALYSIS AND IMPLEMENTATION OF A QOS OPTIMIZATION METHOD FOR ACCESS NETWORKS1959

the DT scheme with a backpressure-based priority thresholdscheme to minimize the weighted average packet loss rate.Theoretical analysis is performed to study the performanceof the scheme, and optimal value of priority threshold is pro-vided. Software simulation shows that the proposed methodoutperforms other buffer management schemes. Moreover,the proposed scheme is implemented in Altera Stratix VFPGA. The experimental result shows that the proposedscheme works efficiently in access networks.

Acknowledgments

This work is supported in part by the project ofScience and Technology on Information Transmissionand Dissemination in Communication Networks Labora-tory (KX152600010/ITD-U15001), Fundamental ResearchFunds for the Central Universities (JB140112) and NationalNatural Science Foundation (61306047).

References

[1] C. Yang, C. Zhang, H. Sun, X. Cui, S. Zhang, W. Pan, B. Zhang,Z. Qiu, and H. Li, “A novel baseband digital signal processor IC forHINOC,” Proc. IEEE ICSICT, pp.1–3, Xi’an, China, Oct. 2012.

[2] W. Pan and Z. Qiu. “FPGA-based design for a HIMAC coproces-sor,” Chinese Journal of Electron Devices, vol.35, no.2, pp.221–226,April 2012.

[3] X. Cui, J. Long, B. Sun, and D. Yu, “A high performance basebandtransceiver IC for HiNOC communication systems,” Proc. IEEE IC-SICT, pp.442–444, Shanghai, China, Nov. 2010.

[4] D. Chen, W. Pan, J. Zhang, C. Liu, Z. Qiu, S. Zhang, B. Zhang, C.Yang, and C. Zhang, “The design of HIMAC coprocessor based onHINOC 2.0,” Proc. IEEE ICSP, pp.1618–1621, Hangzhou, China,Oct. 2014.

[5] Recommendation ITU-T J.196.1. “Cable networks and transmissionof television, sound programme and other multimedia signals,” In-ternational Telecommunication Union, 2016. [Online]. Available:https://www.itu.int/itu-t/recommendations/rec.aspx?rec=12767

[6] E. Oki, N. Kitsuwan, and R. Rojas-Cessa, “Performance analysisof clos-network packet switch with virtual output queues,” IEICETrans. Commun., vol.E94-B, no.12, pp.3437–3446, Dec. 2011.

[7] A.K. Choudhury and E.L. Hahne, “A new buffer managementscheme for hierarchical shared memory switches,” IEEE/ACMTrans. Netw., vol.5, no.5, pp.728–738, Oct. 1997.

[8] G. Ascia, V. Catania, and D. Panno, “An evolutionary managementscheme in high-performance packet switches,” IEEE/ACM Trans.Netw., vol.13, no.2, pp.262–275, April 2005.

[9] A.K. Choudhury and E.L. Hahne, “Dynamic queue length thresh-olds for shared-memory packet switches,” IEEE/ACM Trans. Netw.,vol.6, no.2, pp.130–140, April 1998.

[10] J. Yang, M. Liang, and Y. Chu, “Threshold-based filtering buffermanagement scheme in a shared buffer packet switch,” J. Commun.Netw., vol.5, no.1, pp.82–89, March 2003.

[11] Y. Wang and S. Yu, “A dual-threshold buffer management scheme inshared memory switch fabric,” Acta Electronica Sinica, vol.37, no.7pp.1400–1406, Sept. 2009.

[12] D. Shan, W. Jiang, and F. Ren, “Absorbing micro-burst traffic byenhancing dynamic threshold policy of data center switches,” Proc.IEEE INFOCOM, pp.118–126, Kowloon, Hong Kong, April 2015.

[13] S. Kumar, “The sliding-window packet switch: A new class ofpacket switch architecture with plural memory modules and decen-tralized control,” IEEE J. Sel. Areas Commun., vol.21, no.4, pp.656–673, May 2003.

[14] S. Das and R. Sankar, “Broadcom smart-buffer technology in data

center switches for cost-effective performance scaling of cloudapplications,” Broadcom White Paper, 2012. [Online]. Available:https://www.broadcom.com/collateral/etp/SBT-ETP100.pdf

[15] E.L. Hahne and A.K. Choudhury, “Dynamic queue length thresholdsfor multiple loss priorities,” IEEE/ACM Trans. Netw., vol.10, no.3,pp.368–380, June 2002.

[16] S. Bergida and Y. Shavitt, “Analysis of shared memory priorityqueues with two discard levels,” IEEE Netw., vol.21, no.4, pp.368–380, July 2007.

[17] A.K. Parekh and R.G. Gallager, “A generalized processor sharingapproach to flow control in integrated services networks: The single-node case,” IEEE/ACM Trans. Netw., vol.1, no.3, pp.344–357, June1994.

[18] Y. Gao, W. Pan, and L. Zheng, “Improved analytical model forperformance evaluation of crosspoint-queued switch under uniformtraffic,” IET Netw., vol.6, no.4, pp.81–86, July 2017.

[19] A.V. Manolova, S. Ruepp, A. Rytlig, M. Berger, H. Wessing, and L.Dittmann, “Internal backpressure for terabit switch fabrics,” IEEECommun. Lett., vol.12, no.3, pp.265–267, Feb. 2012.

[20] T. Benson, A. Anand, A. Akella, and M. Zhang, “Understandingdata center traffic characteristics,” ACM SIGCOMM CCR, vol.40,no.1, pp.65–72, Jan. 2010.

[21] V. Jeyakumar, M. Alizadeh, Y. Geng, C. Kim, and D. Mazieres,“Millions of little minions: Using packets for low latency networkprogramming and visibility,” ACM SIGCOMM CCR, vol.44, no.4,pp.3–14, Oct. 2014.

[22] F. Uyeda, L. Foschini, F. Baker, et al., “Efficiently measuring band-width at all time scales,” Proc. USENIX NSDI, pp.71–84, Boston,USA, April 2011.

Ling Zheng received the B.S. degreein software engineering in 2011, and receivedM.S. degree in computer science and technol-ogy in 2014, respectively, from Xidian Univer-sity, Xi’an, P.R. China, and is currently pursuingPh.D. degree in communication and informa-tion system at Xidian University. His researchinterests include high performance networking,switching and software-defined network.

Zhiliang Qiu is a professor with the StateKey Laboratory of Integrated Services Networks(ISN), Xidian University, Xi’an, P.R. China. Hereceived the B.S. degree in communication engi-neering and the M.S. and Ph.D. degrees in com-munication and information systems from Xid-ian University, in 1986, 1989, and 1999, respec-tively. His research interests include broadbandnetwork and switching technology.

1960IEICE TRANS. COMMUN., VOL.E101–B, NO.9 SEPTEMBER 2018

Weitao Pan is an associate professor withthe State Key Laboratory of Integrated Ser-vices Networks (ISN), Xidian University, Xi’an,P.R. China. He received B.S. degree fromSchool of Technical Physics of Xidian Univer-sity in 2004, and received Ph.D. degree in elec-tronic science and technology from Xidian Uni-versity in 2010. His current research interestsinclude VLSI design methods and post-siliconverification.

Yibo Mei receive the B.S. abd M.S degreesin communication and information system Xi-dian University in 2013 and 2015 respectively.His research interests include broadband accessnetwork and network QoS.

Shiyong Sun is a senior engineer with Sci-ence and Technology on Information Transmis-sion and Dissemination in Communication Net-works Laboratory at the 54th Research Instituteof China Electronics Technology Group Corpo-ration (CETC), Shijiazhuang, P.R. China. He re-ceive M.S. degree in communication and infor-mation system Xidian University in 2010. Hiscurrent research interests include communica-tion system and network.

Zhiyi Zhang is a researcher with Sci-ence and Technology on Information Transmis-sion and Dissemination in Communication Net-works Laboratory at the 54th Research Instituteof China Electronics Technology Group Corpo-ration (CETC), Shijiazhuang, P.R. China. He re-ceive M.S. degree in communication and infor-mation system Xidian University in 1993. Hisresearch interests include communication sys-tem and network.