analysis and design of mosfet based amplifier in different configurations

Analysis and Design of MOSFET basedAmplifier in Different Configurations

Tarun Singh Yadav1, Paritosh Vyas1, Sunil Kumar21 M.Tech Scholar, Department of Electronics and Communication, JIIT, Noida

2 M.Tech Scholar, Department of Electronics and Communication, Mewar University, RajasthanEmail: [email protected], [email protected], [email protected]

Abstract: This paper presents the design of am-plifier in three different configurations. i.e. Com-mon Source, Common Drain, Common Gate. It alsopresents their input output characteristics,time domainanalysis and frequency response of the amplifier. Thevoltage gain of a particular amplifier is defined by choos-ing appropriate value of VGS in saturation region inthe input output voltage characteristics. After choos-ing that value we applied an input sinusoidal signaland check the output waveform and compare it withthe theoretical results.

I. Introduction

Amplification is an essential function in most analog(and many digital) circuits. We amplify an analogor digital signal because it may be too small to drivea load, overcome the noise of a subsequent stage, orprovide logical levels to a digital circuit. Amplificationalso plays a critical role in feedback systems. In thispaper, we study the low-frequency behavior of single-stage CMOS amplifiers. Analyzing both large signaland small signal characteristics of each circuit, we de-velop intuitive techniques and models that prove usefulin understanding more complex systems. An impor-tant part of designers job is to use proper approxima-tions so as to create a simple metal picture of a com-plicated circuit. We describe in this paper three typesof amplifier configurations: Common Source, CommonGate, Common Drain.

II. Common Source Amplifier

Figure 1: Schematic of CS Amplifier.

The Common-source(CS) configuration is the mostwidely used of all MOSFET amplifier circuits. Ob-serve that to establish a signal ground we have con-nected a large capacitor, CS , between the source andground. This capacitor, usually in µF range, is re-quired to provide a very small impedance at signalfrequencies of interest. In this way, the signal currentpasses through CS to ground and thus bypasses theresistance RS , Hence CS is called bypass capacitor. Acommon source amplifier realized using the circuit ofFig. 1.

In order not to disturb dc bias current and voltages,the signal to be amplified, shown as voltage sourceVsig with an internal resistance Rsig, is connected tothe gate through a large capacitor CC1. Similarly, thedrain is also connected to load resistanceRL via a largecapacitor CC2. These two capacitances are called cou-pling capacitors. Note that RL can either be a load re-sistor, to which the amplifier is required to provide itsoutput voltage signal, or it can be the input impedanceof another amplifying stage. The resistances RG1 andRG2 are used to provide a suitable dc bias to the tran-sistor to make it operate in saturation region.

In this paper we will use TSpice tool to computethe voltage gain and frequency response of the CS am-plifier. Here we connected source and body of theMOSFET together to cancel the body effect. Also,we used the 2-µm CMOS technology and Spice level-1parameters.

The expressions for volatage gain(AV ) and InputImpedance Rin of CS amplifier is given by

AV = −gm(rds||RD||RL) (1)

Rin = RG1||RG2 (2)

Firstly, we will draw voltage transfer characteris-tics(VTC) of the amplifier. We will observe the changeoutput voltage with respect to the change in inputvoltage. This will gives us the insight of choosing ap-propriate value of VGS(operating point) so that ourtransistor works in saturation region and gives us max-imum voltage swing.

2nd National Conference in Intelligent Computing & Communication

Organized by Dept. of IT, GCET Greater Noida, INDIA

ISBN: 9788175157538

Figure 2: Voltage Transfer Characteristics(VTC)A ofCS Amplifier.

Now, we will choose VGS as such that our transistorworks in saturation region. Here saturation region ofthe transistor lies between 1V to 1.4V. So, we chooseVGS= 1.3V to ensure that our transistor works in sat-uration region and acts as an amplifier.

We applied an input signal of 1mV and frequency1KHz. Our target is to amplify this signal 10 times, i.eAmplifier Gain should be 10. We assume that powersupply VDD = 3.5V and maximum power consumptionP=1.5mW. We will also assume a signal source resis-tance Rsig = 10kΩ, a load resistance of RL = 50kΩand bypass and coupling capacitors of 10 µF . With a3.5V power supply, drain current of MOSFET is lim-ited to

ID =P

VDD=

1.5mW

3.5V= 0.42mA (3)

The equation of ID in saturation is given by

ID =1

2µnCox

W

LeffV 2ov(1 + λVDS) (4)

µnCox = 3× 10−5 (Spice Level-1 parameter)

Overdrive,Vov=0.3 (Typical Value)

λ=0.02 (Spice Level-1 parameter)

VDS = VDD

3 (For maximum Voltage Swing)

VDS = 1.16V

By solving equation (4) for WLeff

W

Leff=

2IDµnCoxV 2

ov(1 + λVDS)(5)

After putting all the values in eq. (5) we get

W

Leff= 305 (6)

Here, L = 2µm as per 2-µm CMOS technology node.

Leff = L− 2LD = 0.4µm, LD = 0.8 (7)

Therefore,

W = 305× Leff = 305× 0.4µm = 122µm (8)

Now, we will find drain to source resistance rds, whichis given by

rds =1

λID= 119.04KΩ (9)

The transconductance gm of the amplifier is given by

gm =

√2µnCox

W

LID = 2.7mS (10)

By using equation (1) we will find the value of RD, asAV =10 is given

AV = −gm(rds||RD||RL) (11)

Using all the values given, RD calculated as

RD = 4.13KΩ (12)

Output voltage VO is given by

VO = VDD − IDRD = 3.5− (0.42× 4.13) = 1.76V (13)

Source Resistance RS can be written as

RS =VO − VDD

3

ID= 1.42KΩ (14)

For finding Gate voltage VG we apply KVL at the in-put loop which gives

VG = IDRS + VOV + Vth = 1.89V (15)

We use hit and trail method for finding RG1 and RG2

so it can satisfies this equation

VG =RG2

RG1 +RG2VDD (16)

Which gives,

RG1 = 2MΩ (17)

RG2 = 2.35MΩ (18)

2nd National Conference in Intelligent Computing & Communication Organized by Dept. of IT, GCET Greater Noida, INDIA

ISBN: 9788175157538

With the help of above results we design CS ampli-fier on TSpice tool. After doing its transient analysiswe get the output signal waveform with respect to in-put signal. Also the input signal is amplified 10 timesas shown in Fig 2. We have applied the input signal

Figure 3: Output Voltage with respect to InputVoltageB

of 2mV P-P and get the output votage of 20.23mV.i. e

Vin = 2mV (P − P ) (19)

VO = 20.23mV (P − P ) (20)

Therefore, Voltage Gain AV is

AV = 10.11(Practical) (21)

We get our pactical gain of 10.11 as our theoreticalgain is 10. Therefore, % error is given by

%error =AV (Th.)−AV (Pr.)

AV (Th.)× 100 (22)

%error =10− 10.11

10× 100 = −1.1 (23)

Next, to measure the midband gain AM and the 3-dB frequencies fL and fH , we apply a 1-V ac voltageat the input, perform an ac analysis simulation, andplot the output voltage magnitude versus frequency asshown in Fig. 4.

Figure 4: Frequency response of CS amplifier with By-pass capacitorC .

This corresponds to the magnitude response of CSamplifier because we chose a 1-V input signal. Ac-cordingly, the midband gain AM=10.11 and the 3-dBfrequencies are fL = 50.92Hz and fH = 119.68MHz.Therefore, bandwidth(BW) is

BW = fH − fL ≈ 119.68MHz ≈ 120MHz (24)

The effect of bypass capacitor CS is seen clearly fromthe graph. Because gain is flattens at very low fre-quency, i.e 10Hz. This flattening of gain is due tocapacitor CS and resistor RS . Now, we will see theeffect of unbypassed resistor RS , i.e CS=0. This willreduce the gain of the amplifier by a factor of 1 +gmRS and increase the bandwidth(BW) of the ampli-fier. The effective reduction of gain and increment ofbandwidth(BW) is shown in Fig. 5.

AV 1 = −gm(rds||RD||RL)

1 + gmRS(25)

1 + gmRS = 4.834 (26)

AV 1 = −gm(rds||RD||RL)

4.834(27)

AV 1 → Gain without bypass capacitor CS .

Figure 5: Frequency response of CS amplifier withoutBypass capacitorD.

The midband gain in this case is AM = 2.09 andthe 3-dB frequencies are fL = 0.29Hz and fH = 415.86MHz.Therefore, bandwidth(BW) is

BW = fH − fL ≈ 415.86MHz ≈ 416MHz (28)

So, we can see clearly that the bandwidth is increasedby three fold and gain is reduced by a factor of 4.8.Therefore, the source degeneration resistor RS pro-vides negative feedback, which allows us to trade offgain for wider bandwidth.


ISBN: 9788175157538

III. Common Drain Amplifier

A common drain amplifier, also known as a sourcefollower, is one of three basic single-stage field effecttransistor (FET) amplifier topologies, typically used asa voltage buffer. In this circuit the gate terminal of thetransistor serves as the input, the source is the output,and the drain is common to both (input and output),hence its name. In addition, this circuit is used totransform impedances. For example, the Thevenin re-sistance of a combination of a voltage follower drivenby a voltage source with high Thevenin resistance isreduced to only the output resistance of the voltagefollower, a small resistance. That resistance reductionmakes the combination a more ideal voltage source.Conversely, a voltage follower inserted between a driv-ing stage and a high load (ie a low resistance) presentsan infinite resistance (low load) to the driving stage, anadvantage in coupling a voltage signal to a large load.A common drain amplifier realized using the circuit ofFig. 6.

Figure 6: Schematic of CD Amplifier.

In order not to disturb dc bias current and voltages,the signal to be amplified, shown as voltage sourceVsig with an internal resistance Rsig, is connected tothe gate through a large capacitor C1. Similarly, thesource is also connected to load resistance RL via alarge capacitor C2. These two capacitances are calledcoupling capacitors. Note that RL can either be aload resistor, to which the amplifier is required to pro-vide its output voltage signal, or it can be the inputimpedance of another amplifying stage. The resis-tances R1 and R2 are used to provide a suitable dcbias to the transistor to make it operate in saturationregion.

In this paper we will use TSpice tool to computethe voltage gain and frequency response of the CDamplifier. Here we connected source and body of theMOSFET together to cancel the body effect. Also, weused the 2-µm CMOS technology and Spice level-1 pa-rameters.

The expressions for volatage gain(AV ) and InputImpedance Rin of CD amplifier is given by

AV =gm(rds||RL||RS)

1 + gm(rds||RL||RS)(29)

Rin = R1||R2 (30)


Figure 7: Voltage Transfer Characteristics(VTC)E ofCD Amplifier.

Now, we will choose VGS as such that our transistorworks in saturation region. Here saturation region ofthe transistor lies between 1V to 2.9V. So, we chooseVGS= 1.5V to ensure that our transistor works in sat-uration region and acts as an amplifier.

We applied an input signal of 1mV and frequency1KHz. This is a CD amplifier or Source follower, i.eAmplifier Gain should be approximately 1. We assumethat power supply VDD = 3.5V and maximum powerconsumption P=1.5mW. We will also assume a signalsource resistance Rsig = 10kΩ, a load resistance ofRL = 50kΩ and bypass and coupling capacitors of10 µF . With a 3.5V power supply, drain current ofMOSFET is limited to

ID =P

VDD=

1.5mW

3.5V= 0.42mA (31)


ID =1

2µnCox

W






ISBN: 9788175157538

VDS = VDD


VDS = 1.16V

By solving equation (32) for WLeff

W

Leff=

2IDµnCoxV 2

ov(1 + λVDS)(33)


W

Leff= 305 (34)


Leff = L− 2LD = 0.4µm, LD = 0.8 (35)

Therefore,

W = 305× Leff = 305× 0.4µm = 122µm (36)


rds =1

λID= 119.04KΩ (37)


gm =

√2µnCox

W

LID = 2.7mS (38)

By using equation (29) we will find the value of RS ,as AV =1

AV =gm(rds||RL||RS)

1 + gm(rds||RL||RS)(39)

Using all the values given, RS calculated as

RS ≈ 5KΩ (40)


VG = IDRS + VOV + Vth = 2.8V (41)

We use hit and trail method for finding RG1 and RG2

so it can satisfies this equation

VG =RG2

RG1 +RG2VDD (42)

Which gives,

RG1 = 2MΩ (43)

RG2 = 2.6MΩ (44)

With the help of above results we design CD ampli-fier on TSpice tool. After doing its transient analysiswe get the output signal waveform with respect to in-put signal as shown in Fig 8.

Figure 8: Output Voltage with respect to InputVoltageF

We have applied the input signal of 2mV P-P andget the output votage of 20.23mV.i. e

Vin = 2mV (P − P ) (45)

VO = 1.57mV (P − P ) (46)



We get our pactical gain of 0.785 as our theoreticalgain is 1. Therefore, % error is given by


AV (Th.)× 100 (48)

%error =1− 0.785

1× 100 = 21.5 (49)


Figure 9: Frequency response of CD amplifierG.


ISBN: 9788175157538

This corresponds to the magnitude response of CDamplifier because we chose a 1-V input signal. Accord-ingly, the midband gain AM=0.78 and the 3-dB fre-quencies are fL = 0.32Hz and fH = 1.27GHz. There-fore, bandwidth(BW) is

BW = fH − fL ≈ 1.27GHz (50)

IV. Common Gate Amplifier

A Common-Gate Amplifier typically used as a cur-rent buffer or voltage amplifier. In this circuit thesource terminal of the transistor serves as the input,the drain is the output and the gate is common toboth, hence its name. It is useful in, for example,CMOS RF receivers, especially when operating nearthe frequency limitations of the FETs, it is desirablebecause of the ease of impedance matching and po-tentially has lower noise. A common gate amplifierrealized using the circuit of Fig. 10.

Figure 10: Schematic of CG Amplifier.

In order not to disturb dc bias current and voltages,the signal to be amplified, shown as voltage sourceVin is connected to the source through a large capac-itor C3. Similarly, the drain is also connected to loadresistance RL via a large capacitor C2. These two ca-pacitances are called coupling capacitors. Note thatRL can either be a load resistor, to which the ampli-fier is required to provide its output voltage signal, orit can be the input impedance of another amplifyingstage. The resistances R1 and R2 are used to providea suitable dc bias to the transistor to make it operatein saturation region.

In this paper we will use TSpice tool to computethe voltage gain and frequency response of the CGamplifier. Here we connected source and body of theMOSFET together to cancel the body effect. Also, weused the 2-µm CMOS technology and Spice level-1 pa-rameters.

The expression for volatage gain(AV ) of CG am-plifier is given by

AV =(1 + gmrds)(RD||RL)

rds + (RD||RL)(51)


Figure 11: Voltage Transfer Characteristics(VTC)H ofCG Amplifier.

Now, we will choose Vin as such that our transistorworks in saturation region. Here saturation region ofthe transistor lies between 0.5V to 0.8V. So, we chooseVin= 0.6V to ensure that our transistor works in sat-uration region and acts as an amplifier.

We applied an input signal of 1mV and frequency1KHz. Our target is to amplify this signal 10 times, i.eAmplifier Gain should be 10. We assume that powersupply VDD = 5V and maximum power consumptionP=1.5mW. We will also assume a load resistance ofRL = 50kΩ is connected at the output and bypass andcoupling capacitors are of 10 µF . With a 5V powersupply, drain current of MOSFET is limited to

ID =P

VDD=

1.5mW

5V= 0.3mA (52)


ID =1

2µnCox

W





VDS = VDD



ISBN: 9788175157538

VDS = 1.66V

By solving equation (53) for WL

W

L=

2IDµnCoxV 2

ov(1 + λVDS)(54)


W

Leff= 215 (55)


Therefore,

W = 215× L = 305× 2µm = 430µm (56)


rds =1

λID= 166.66KΩ (57)


gm =

√2µnCox

W

LID = 2mS (58)

By using equation (51) we will find the value ofRD, as AV =10

AV =(1 + gmrds)(RD||RL)

rds + (RD||RL)(59)

Using all the values given, RD calculated as

RD = 5.13KΩ (60)

Output voltage VO is given by

VO = VDD − IDRD = 5− (0.3× 5.13) = 3.46V (61)

Source Resistance RS can be written as

RS =VO − VDD

3

ID= 6KΩ (62)


VG = IDRS + VOV + Vth = 3.1V (63)

We use hit and trail method for finding R1 and R2 soit can satisfies this equation

VG =R2

R1 +R2VDD (64)

Which gives,

R1 = 3.3MΩ (65)

R2 = 2MΩ (66)

With the help of above results we design CG amplifieron TSpice tool. After doing its transient analysis weget the output signal waveform with respect to inputsignal as shown in Fig 12.

Figure 12: Output Voltage with respect to InputVoltageI

We have applied the input signal of 2mV P-P andget the output votage of 17.60mV P-P.i. e

Vin = 2mV (P − P ) (67)

VO = 17.60mV (P − P ) (68)



We get our pactical gain of 0.68 as our theoretical gainis 1. Therefore, % error is given by


AV (Th.)× 100 (70)

%error =10− 8.8

10× 100 = 12 (71)


2nd National Conference in Intelligent Computing & Communication

Organized by Dept. of IT, GCET Greater Noida, INDIA

ISBN: 9788175157538

Figure 13: Frequency response of CG amplifierJ .

This corresponds to the magnitude response of CGamplifier because we chose a 1-V input signal. Ac-cordingly, the midband gain AM=8.8 and the 3-dBfrequencies are fL = 31.84Hz and fH = 946.41MHz.Therefore, bandwidth(BW) is

BW = fH − fL ≈ 946.41MHz (72)

V. Conclusion

In this report, we accomplished the goal of learningand designing of the differnt types of amplifiers. i.ecommon source, common drain, common gate usingT-Spice tool. We have seen their frequency responseto check in which frequency range our amplifier givesthe optimal gain. We also seen the effect of differentbiasing and feedback resistors on gain and drawn theirplots.

VI. References

[1] Design of Analog CMOS Integrated Circuits by Be-hzad Razavi, Tata McGraw Hill Publication.

[2] Microelectronic Circuits by Adel S. Sedra & Ken-neth C. Smith, Oxford University Press.

[3] Operation and Modeling of The MOS Transistorby Yannis Tsividis, Oxford University Press.

[4] Analysis and Design Of Analog Integrated Circuitsby Paul R. Gray, Paul J. Hurst, Stephen H. Lewis &Robert G. Meyer, John Wiley & Sons,INC.

[5] MOSFET Modeling For VLSI Design” by NarainArora, World Scientific.

VII. Appendix(A)

A. T-spice code for Fig 2.

CS amplifier

M1 1 4 6 6 csamp w=122u l=2u

.model csamp nmos Level=1

+ Vto=1.0 Kp=3.0E-5 Gamma=0.35

+ Phi=0.65 Lambda=0.02 Tox=0.1u

+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5

+ Cgbo=2.0E-10 Cgdo=4.00E-11 Cgso=4.00E-11

+ Rd=10.0 Rs=10.0 Rsh=30.0

Rd 1 2 4.13k

Rsig 3 5 10k

Rl 7 0 50k

vdd 2 0 3.5v

vgs 4 6

R1 4 2 2Meg

R2 4 0 2.35Meg

Rs 6 0 1.42k

cci 4 3 10u

cco 1 7 10u

.dc vgs 0 5 0.01

.plot v(1,0)

B. T-spice code for Fig 3.

CS amplifier

M1 1 4 6 6 csamp w=122u l=2u


+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rd 1 2 4.13k

Rsig 3 5 10k

Rl 7 0 50k

vdd 2 0 3.5v

vgs 4 6

R1 4 2 2Meg

R2 4 0 2.35Meg

Rs 6 0 1.42k

cci 4 3 10u

cco 1 7 10u

cs 6 0 10u

v1 5 0 SIN (0 1m 1k)

.tran 0.001 2m start=0

.print V(5,0)

.plot v(7,0)

C. T-spice code for Fig 4.

CS amplifier

M1 1 4 6 6 csamp w=122u l=2u


+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5



ISBN: 9788175157538

+ Rd=10.0 Rs=10.0 Rsh=30.0

Rd 1 2 4.13k

Rsig 3 5 10k

Rl 7 0 50k

vdd 2 0 3.5v

vgs 4 6

R1 4 2 2Meg

R2 4 0 2.35Meg

Rs 6 0 1.42k

cci 4 3 10u

cco 1 7 10u

cs 6 0 10u

v1 5 0 AC 1

.ac dec 10 10m 1G

.plot v(7,0)

D. T-spice code for Fig 5.

CS amplifier

M1 1 4 6 6 csamp w=122u l=2u


+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rd 1 2 4.13k

Rsig 3 5 10k

Rl 7 0 50k

vdd 2 0 3.5v

vgs 4 6

R1 4 2 2Meg

R2 4 0 2.35Meg

cci 4 3 10u

cco 1 7 10u

v1 5 0 AC 1

.ac dec 10 10m 1G

.plot v(7,0)

E. T-spice code for Fig 7.

CD amplifier

M1 1 4 2 0 cdamp w=86u l=2u

.model cdamp nmos Level=1

+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rs 2 0 5k

R1 4 1 2Meg

R2 4 0 2.6Meg

Rin 5 3 10k

Rl 6 0 50k

vdd 1 0 5v

c2 2 6 10u

c1 4 5 10u

vgs 4 2

.op

.dc vgs 0 5 0.1

.plot V(1,0)

F. T-spice code for Fig 8.

CD amplifier

M1 1 4 2 0 cdamp w=86u l=2u


+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rs 2 0 5k

R1 4 1 2Meg

R2 4 0 2.6Meg

Rin 5 3 10k

Rl 6 0 50k

vdd 1 0 5v

c2 2 6 10u

c1 4 5 10u

vin 3 0 SIN (0 1m 1k)

.op


.print V(3,0)

.plot V(6,0)

G. T-spice code for Fig 9.

CD amplifier

M1 1 4 2 0 cdamp w=86u l=2u


+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rs 2 0 5k

R1 4 1 2Meg

R2 4 0 2.6Meg

Rin 5 3 10k

Rl 6 0 50k

vdd 1 0 5v

c2 2 6 10u

c1 4 5 10u

v1 3 0 ac 1

.op

.ac dec 10 10m 10G

.plot V(6,0)


ISBN: 9788175157538

H. T-spice code for Fig 11.

CG amplifier

M1 1 4 2 0 cgamp w=430u l=2u

.model cgamp nmos Level=1

+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rd 1 3 5.13k

Rs 2 0 6k

R1 4 3 3.3Meg

R2 4 0 2Meg

Rl 6 0 50k

vdd 3 0 5v

c1 4 0 10u

c2 1 6 10u

cin 2 7 10u

cs 2 0 10u

vin 2 0

.op

.dc vin 0 5 0.001

.plot V(1,0)

I. T-spice code for Fig 12.

CG amplifier

M1 1 4 2 0 cgamp w=430u l=2u


+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rd 1 3 5.13k

Rs 2 0 6k

R1 4 3 3.3Meg

R2 4 0 2Meg

Rl 6 0 50k

vdd 3 0 5v

c1 4 0 10u

c2 1 6 10u

cin 2 7 10u

cs 2 0 10u

vin 7 0 SIN (0 1m 1k)

.op


.print V(7,0)

.plot V(6,0)

J. T-spice code for Fig 13.

CG amplifier

M1 1 4 2 0 cgamp w=430u l=2u


+ Vto=1.0 Kp=3.0E-5 Gamma=0.35


+ Nsub=1.0E+15 Nss=1.0E+10 Ld=0.8u

+ Tpg=1.00 Uo=700.0 Af=1.2

+ Kf=1.0E-26 Is=1.0E-15 Js=1.0E-8

+ Pb=0.75 Cj=2.0E-4 Mj=0.5

+ Cjsw=1.00E-9 Mjsw=0.33 Fc=0.5


+ Rd=10.0 Rs=10.0 Rsh=30.0

Rd 1 3 5.13k

Rs 2 0 6k

R1 4 3 3.3Meg

R2 4 0 2Meg

Rl 6 0 50k

vdd 3 0 5v

c1 4 0 10u

c2 1 6 10u

cin 2 7 10u

cs 2 0 10u

v1 7 0 ac 1

.op

.ac dec 10 1 100G

.plot V(6,0)


ISBN: 9788175157538

analysis and design of mosfet based amplifier in different configurations

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