analog fundamentals of the ecg signal chain · 1 analog fundamentals of the ecg signal chain...
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1
Analog Fundamentals of the ECG
Signal ChainPrepared by
Matthew Hann,
Texas Instruments
Precision Analog Applications Manager
Presented by
Jose Duenas,
Precision Analog Product Marketing Engineer
2
Objectives
• Introduce Basic ECG Concepts
• Motivate the Need for TINA and SPICE
Simulation for ECG Analysis
• Introduce Discrete Analog Functions of
the ECG Signal Chain
• Motivate Need for Low Cost Integrated
ECG Conditioning System
• Introduce the ADS1298 and Its
Embedded ECG Circuitry and Functions
3
Analog Fundamentals of the
ECG Signal Chain
• What is a Biopotential?
• What is ECG?
• The Einthoven Triangle
• Analog Lead Definitions, Derivations, and Purpose
• Modeling the Electrode Interface
• Input Filtering and Defibrillation Protection
• The INA front end
• AC vs. DC coupling
• Right Leg Drive (RLD) Amplifier Selection and Design
• The ECG Shield Drive
• Lead Off Detection
• PACE Detection
• INA post Gain + Analog Filtering
• A/D Conversion Options and Filtering
• ADS129x Introduction, Features, and Advantages
41
What is a Biopotential?
5
What is a BiopotentialAn electric potential measured between living cells
6
What is a BiopotentialEvery cell is like a little battery
Intracellular medium/
Cytoplasmic fluid
Extracellular
medium/fluid Ion channels
(proteins)
Cell membrane
(lipids)
•Resting ion chs.
•Active ion pumps
•Gated ion chs.
7
What is a BiopotentialEvery cell is like a little battery
K+ is 30 to 50x
higher @ rest
Na+ conc. is 10x
higher @ rest Ion channels
(proteins)
Cell membrane
(lipids)
•Resting ion chs.•Active ion pumps
•Gated ion chs.
Diffusional
force
Electrostatic
Force
8
What is a BiopotentialEvery cell is like a little battery
Intracellular medium/
Cytoplasmic fluid
Extracellular
medium/fluid Ion channels
(proteins)
Cell membrane
(lipids)
•Resting ion chs.
•Active ion pumps
•Gated ion chs.
Neurotransmitter are
received at dendrites
9
What is a BiopotentialBiopotentials from cells electrodes
101
What is ECG?
11
What is ECG?A measure of the electrical activity of the heart
12
What is ECG?ECG and blood pressure waves
13
What is ECG?Actual ECG-normal
14
What is ECG?ECG irregular tracings due to external artifacts
15
What is ECG?Modeling the electrode interface
Electrical characteristics include a DYNAMIC resistance,
capacitance, and offset voltage
161
Analog Lead Derivation
17
3 Body Electrodes, 3 Derived Leads = I, II, III
LEAD I = VLA-RL – VRA-RL
LEAD II = VLL-RL – VRA-RL
LEAD III = VLL-RL – VLA-RL
Einthoven’s Law
In electrocardiogram at any
given instant the potential of
any wave in Lead II is equal
to the sum of the potentials
in Lead I and III.
Right Leg
Reference,
RL
Analog Lead DerivationECG Einthoven Triangle, 1907
18
*Drawing Taken From Bioelectromagnetism, Jaako Malmivuo and Robert Plonsey
WCT
RA LA LL
3
Assuming:
3WCT
RRA
RA LA LL
RRA
RRA = RLA = RLL
Then:
Analog Lead DerivationThe Wilson Central (WCT) Provides Chest Lead
Reference at Center of Einthoven Triangle
19
The Wilson Central
is used to derive a
reference potential
for the Chest Leads,
V1 – V6
RRA
RLA
RLL
VOUT = V(1-6) - VWCT
Analog Lead DerivationThe Wilson Central is the AVERAGE potential
between RA, LA, and LL
20
Different Chest Leads
Provide:
*Unique ECG Signature
*Enhanced Pattern
Recognition
*Isoelectric Point @ V3-V4
Analog Lead DerivationChest Lead Signals Provide Different Information at
Different Cross-Sectional Angles
21
Each lead provides
unique information about
the ECG Output Signal
Multiple Angles Give a
Better Than 2-D Picture
of the ECG Output
AVR, AVL, AVF derived
via midpoint of 2 limbs
(resistor divider) with
Respect to 3rd limb
Analog Lead DerivationAugmented Leads Derived via WCT to Provide
Enhanced Vector Information
22
Standards Electrodes Needed
1 Lead LA, RA
3 Lead LA, RA, LL
6 Leads LA, RA, LL
12 Leads LA, RA, LL, V1-6
Analog Lead DerivationIEC60601-2-51—Diagnostic
23
Analog Lead DerivationDifferent Lead Combinations Reveal Axis Deviation
+
=
and
QRS in LEAD I QRS in AVF Left Axis
Deviation
(LAD)
Mean QRS Vector Points Toward Area of Infarction (Damage)
24
Analog Lead DerivationDifferent Lead Combinations Reveal Axis Deviation
LAD
Norm
alRAD
Ext
rem
e
RAD
I
AVF
I
AVF
I
AVF
I
AVF
251
ECG Input Filtering, Defibrillation
Protection, and Isolation
26
ECG Input Filtering and ProtectionExample: LEAD I Protection with Input Filtering
+Vs
+Vs
-Vs
-VsCdiff
CCM
CCMCF
CF
Rfilter1
Rfilter1
Rfilter2
Rfilter2
LA
RA
NE2H
NE2H
Protection
Diodes
Zener
Diode
Cdiff = 10 x CcmNe2H Lamps/TVS Protect
Against Defibrillation
Voltages
Series Resistance
Limits Input Current
CF, Ccm, and Cdiff +
Rfilter form LPF
RPatient
RPatient
Patient
Protection 10
-20k ohms
271
System Block Diagram
28
System Block Diagram
RA
LA
LL
RL
V1
V2
V3
V4
V5
V6
WilsonI
II
III
aVR
aVL
aVF
INA MUX
INA
WCT
Filter MUX
A/D
Isolation
dV/dt
QRS and PACE
Detect
DIO
291
The INA Front End
30
Input Bias Current
Input Impedance
Input Current Noise
Input Voltage Noise
Power Consumption
DC/AC CMRR
*Important*
Input Offset Voltage
Input Offset Voltage Drift
Gain Error
Nonlinearity
PSRR
Less Important
*DC Errors such as VOS are swamped out by the
Offsets Introduced by the Skin-Electrode Contacts
The INA Front EndKey Features of the INA Front End
31
VrefVref
R21 1k
R25 1k
C6 100p
R14 100k
R19 1k
C7 47n
R20 1k
V4 0
C8 100p
R22 100k
R23 1k
C9 47n
R24 1k
V5 0
R1 63.4k R3 63.4k
C18 3
3p
C19 3
3p
R4 63.4k R5 63.4k
C10 3
3p
C12 3
3p
C20 3
30p
+
ECGp
-
+
-
+
INA 1
Vout
nV Vn12 Vnoise
fAIn12 In_fA
ECG + Skin
Impedance
Electrode
Impedance +
Offset
Input CM +
Differential
Filtering
Ideal INA
Front End
The INA Front EndIdeal Simulation Circuit with Current and Voltage Noise
Sources
32
T
Frequency (Hz)
1.00 10.00 100.00 1.00k
To
tal
no
ise (
V)
0.00
4.00u
8.00u
12.00u
16.00u
20.00u
24.00u
28.00u
32.00u
The INA Front EndSimulation Showing Output-Referred Total RMS Noise
vs. Bandwidth (G = 1-10)
Noise may NOT necessarily
increase linearly with gain
(INA or PGA topology
dependent)50k
50k
150k
150k
Vout
Va1
Va2
-
+
A1
-
+ A2
Vin-
Vin+
Rg
1k
-
+
A3
+
+
+
VCM
-Vdif
2
Vdif
2
150k
150k
33
T
Time (s)
8.37m 366.11m 723.85m
Voltage (
V)
2.50
2.50
2.51
Snapshot of R
Wave from
ECG Waveform
ECG Signal Varies
LINEARLY with
Increase in Gain
The INA Front EndTINA Simulations Showing Output-Referred ECG Signal
(G = 1-10)
34
(1) (2)
(3)
(1) Electrode Offset MAX = +/- 300mV
(2) Swing of INA = V(+) – 50mV
(3) Integrator Compliance = (ECGp + ECGn +VOS + VOSelectrode)* Gain < VCC - Vref
Vref
Integrator Removes
Gained up DC offsets and
servos INA output to Vref
The INA Front EndWhat is the MAX gain on the INA When Using a DC
Removal Circuit?
35
Vref
Vref
VCC
1k
1k
47n
52k
150m
47n
52k
-150m
63.4k 63.4k
33p
33p
63.4k 63.4k 33p 3
3p
330p
+
ECGp
Vout
100k
100n
+
ECGn +-
+
OPA333
-
+
-
+
VCVS1 1
OPA333 Used as Integrator
to Remove DC and Simulate
Real Response During
Saturation
The INA Front EndSimulation Circuit with Ideal INA and Vref = 2.5V as
Integrator Input
36Time (s)
0.00 750.00m 1.50
Vout[G = 1]
2.50
2.50
Vout[G = 3]
2.50
2.50
Vout[G = 6]
2.50
2.50
Vout[G = 8]
2.49
2.50
Vout[G=9]
2.70
2.71
Vout[G=10]
3.00
3.01
As the output of the
Integrator Saturates from
Increased Gain, Vout of the
INA pulls away from Vref
The INA Front EndECG + Integrator Output of INA vs. Gain for Vref = 2.5V
37
*AC Coupling Removes Electrode
Offsets so that Higher Gain Can Be
Used for Potentially Better SNR in the
Signal Chain Path
VCM + ECGp +
VOSelectrode1
VCM + ECGn +
VOSelectrode2
ECGp
ECGn
(ECGp –ECGn)*Gain
The INA Front EndIf it is Advantageous to Maximize Gain with a Low Noise
INA up Front, Why not AC Couple?
38
Vref
Vref
Vref
Vref
R13 10M
CCn 1u
C9 3
30p
C8 3
3p
C7 3
3p
R11 63.4kR10 63.4kC
6 3
3p
C5 3
3p
R9 63.4kR8 63.4k
V4 0
R7 52k
C4 47n
V3 0
R4 52k
C2 47n R14 10M
CCp 1u
+
ECGp
+
ECGn
-
+
-
+
INA 1
-
+
Vout
The INA Front EndTINA Simulation Circuit to Show AC-Coupled INA Gain
Sweep
39Time (s)
723.18m 969.60m 1.22
Vo
lta
ge
(V
)
1.71
1.98
2.25
2.52
2.79
3.06
The INA Front EndINA Gain = 1-1000 with VREF = 2.5V AC Coupled
40
ECGp
ECGn
VCM
Vout VOS Gain
CMRR 20 log10
V CM
V OS
20V CM Gain
V out
Vout ECGp ECGn VOSelectrode VOSOPAV CM
10
CMRR
20
Gain
Lower CMRR = More
Unwanted Output Signal
The INA Front EndWhat is CMRR? Why is it Important in ECG?
41
The INA includes the
R and C and must be
considered in the
overall CMRR Analysis
Vdiff_actual Vinp
Rp12
Rp12 j
Cc1
2
Vinn
Rp22
Rp22 j
Cc2
2
•Mismatch in Rp and Cc
causes a differential
signal error
•Even a 1% tolerance
on Cc cause a 20dB
attenuation in CMRR
AmpAmp
The INA Front EndWhat is CMRR? Why is it Important in ECG?
CC1
CC2
RP1
RP2
ECGp
ECGn
VCM
42
VCCVref
Vref
Vref
R13 10M
C12 1u
Vout
R14 10M
+
VCM
R1 2
0k
C2 47n
R4 52k
V3 0
C4 47n
R7 52k
V4 0
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4kC
7 3
3pC8 3
3p
C9 3
30p
C1 1u
RG
+
-V-
RefOut
V+RG
U1 INA333_C
CMR TINA Circuit Test By
Sweep of Mismatch of Input
Coupling Capacitors
The INA Front End50/60Hz Common Mode Simulation Circuit with 1µF
Coupling Capacitors Mismatched
43
T
Frequency (Hz)
100.00m 1.00 10.00 100.00
Voltage (
V)
-100.00
-80.00
-60.00
-40.00
0% Mismatch
.5% Mismatch
The INA Front EndPlot of CMRR vs. Frequency for .01 - .5% Coupling
Capacitor Mismatch
44
T
Time (s)
0.00 400.00m 800.00m
Voltage (
V)
2.50
2.51
Lower Frequency
Signals Couple
Directly Into the ECG
Signal to the Output
The INA Front EndPlot of ECG Response to 5Hz CM Input Signal (0%-
.5%) CC Mismatch
45
T
Time (s)
0.00 400.00m 800.00m
Vout
2.50
2.51 •50/60Hz Noise Rejection is
Virtually Unaffected by AC
Coupling
•Dependent Primarily on the
Noise Magnitude and the
CMRR of the Front End INA
The INA Front EndPlot of ECG Response to 50/60 Hz CM Input Signal
461
The Right Leg Drive Amplifier
47
Average VCM is
Inverted and Fed
Back to RL;
Cancels 50/60Hz
noise
*Tapping off center of split gain
resistor feeds the following
voltage to the RL Drive Circuit
[(Vcm+ ECGP )+ (Vcm+ ECGn )]/ 2
= Vcm + (ECGp + ECGn )/2
CMnoise
CMnoise
ECGp
ECGn
The RL Drive AmplifierThe RL Drive Amplifier Serves 2 Purposes: (1)
Common Mode Bias (2) Noise Cancellation
48
Vre
f
VCC
VCC
Vref
VCC
VC
C
Vref
Vout
RG
+
-V-
RefOut
V+RG
U3 INA333
RG1 10k
RG2 10k
R3 10k
R5 1M
R6 1kNS
NS1 2.5
R13 1
M
R14 1
M
NS
NS2 2.5
+
ECGn
+
ECGp
R15 1M
R12 1
M
NS
NS3 2.5
C10 1u
+
-
+
U1 OPA333
R2 1k
R1 1k
R7 1k
C4 47n
R4 1k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
+N
ois
e
+
-
+
U2 OPA333
+
-
+
U4 OPA333
R16 1
M
= Included for
TINA spice
Convergence
The RL Drive Amplifier Simulation Circuit for Response to 50/60 Hz CM Noise
Injection Source
49
T
Time (s)
0.00 665.73m 1.33
ECGn
-150.00u
750.00u
ECGp
-150.00u
750.00u
Noise
-1.00
1.00
Vout
2.50
2.51
The RL Drive Amplifier TINA
Simulation with NO RL Drive; CM Noise is Coupled to
Output
50
T
Time (s)
5.46m 282.16m 558.86m
ECGn
-150.00u
750.00u
ECGp
-150.00u
750.00u
Noise
-1.00
1.00
Vout
2.50
2.51
The RL Drive Amplifier TINA Simulation with RL Drive; Output Noise is
Reduced
51
VoutA1
Vcm VECGp Vep Vcm VECGn Ven
RG
RG
2
VOSA1
ECGn
ECGp
Vep
Ven
VREF
RF
RI
RG/2
RG/2
RA
RA
VECGp + Vep + VCM
VECGn + Ven + VCM
VRL
Vref VoutA1 RI
RF Vref
•More Gain = Better CMRR
•Loop Corrects for
Electrode Offset, VOSA1,
and VOSRLD
The RL Drive Amplifier Analyzing the RLD Amplifier Loop
52
The RL Drive Amplifier Simulation Circuit for CMRR of RLD Loop
Vre
f
VCC
VCC
Vref
VCC
VC
C
VCC
Vref
RG1 25k
RG2 25k
R3 10k
R14 1
00k
R7 52k
C4 47n
R4 52k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
+
-
+
U2 OPA333
+
-
+
U4 OPA333
RG
+
-V-
RefOut
V+RG
U3 INA333
R12 1
MC10 1u
+
-
+
U1 OPA333R15 1M
R13 1
00k
V3 0
V4 0
R2 100k
R16 1
0M
R_R
LD
52k
C_R
LD
47n R
17 1
M
V1 2.5
V2 2.5
NS
NS1 2.5
+
Vcm
Vout
RF 10k
Sweep Feedback
Resistor Gain to
show Effects of
CMRR @ 50/60Hz
53
The RL Drive Amplifier CMRR Plots vs. Gain in RLD Loop
T
Frequency (Hz)
10.00 100.00
CM
RR
(d
B)
-120.00
-100.00
-80.00
RF = 10k
RF = 1M
RF = 100k
RF = 10M
54
Electrode
Resistance Varies
With Contact and
Moisture, Presents
Problems for RLD
Stability
The RL Drive Amplifier RL Drive Stability Simulation Circuit
Local RLD Loop is
Broken to Ensure
Proper Phase Margin
Over Range of
Electrode Resistance
Vre
f
VCC
VCC
VrefVCC
VC
C
VCC
Vref
RG1 25k
RG2 25k
R3 10k
R14 1
00k
R7 52k
C4 47n
R4 52k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
+
-
+
U2 OPA333
+
-
+
U4 OPA333
RG
+
-V-
RefOut
V+RG
U3 INA333
+
Vin
C1 1
G
VoA
R12 1
MC10 1u
+
-
+
U1 OPA333R15 1M
V3 0
V4 0
R2 100kL1 1G
R_R
LD
52k
C_R
LD
47n
Vloop
R17 1
M
V1 2.5
V2 2.5
R5 10M
55
T
Frequency (Hz)
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M
Gain
(dB
)
-20.00
0.00
20.00
40.00
60.00
80.00
100.00
120.00
1/Beta
AOL
The RL Drive Amplifier RL Drive Simulation Showing Instability in the RLD
Feedback Loop
> 20dB/dec ROC (Rate of
Closure) = INSTABILITY
56
T
Frequency (Hz)
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M
Gain
(dB
)
-20.00
0.00
20.00
40.00
60.00
80.00
100.00
120.00
Feedback Comp
Placed vs. Worst
Case Electrode
Resistance and
RLD AOL
Intersection
of 1/ß and
AOL curve > -
40dB/dec
The RL Drive Amplifier Using RLD Simulation to Compensate for 1/Beta
Variation With Electrode Resistance
57
Vre
f
VCC
VCC
Vref
VCC
VC
C
VCC
Vref
RG1 25k
RG2 25k
R3 10k
R14 1
00k
R7 52k
C4 47n
R4 52k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
+
-
+
U2 OPA333
+
-
+
U4 OPA333
RG
+
-V-
RefOut
V+RG
U3 INA333
+
Vin
C1 1
G
VoA
R12 1
MC10 1u
+
-
+
U1 OPA333R15 1M
R13 1
00k
V3 0
V4 0
R2 100k
R16 1
0M
L1 1GR_R
LD
52k
C_R
LD
47n
Vloop
R17 1
M
R18 1
0M
R19 10M
V1 2.5
V2 2.5
The RL Drive Amplifier RL Drive Stability Simulation Circuit of Feedback #1
58
The RL Drive Amplifier RL Drive Stability Simulation Circuit of Feedback #2
Vre
f
VCC
VCC
Vref
VCC
VC
C
VCC
Vref
Vref
RG1 25k
RG2 25k
R3 10k
R14 1
00k
R7 52k
C4 47n
R4 52k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
+
-
+
U2 OPA333
+
-
+
U4 OPA333
RG
+
-V-
RefOut
V+RG
U3 INA333
+
Vin
C1 1
G
VoA
R12 1
MC10 1u
+
-
+
U1 OPA333R15 1M
R13 1
00k
V3 0
V4 0
R2 100k
R16 1
0M
L1 1GR_R
LD
52k
C_R
LD
47n
Vloop
R17 1
M
V1 2.5
V2 2.5
R1 10M
59
Vre
f
VCC
VCC
Vref
VCC
VC
C
VCC
Vref
RG1 25k
RG2 25k
R3 10k
R14 1
00k
R7 52k
C4 47n
R4 52k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
+
-
+
U2 OPA333
+
-
+
U4 OPA333
RG
+
-V-
RefOut
V+RG
U3 INA333
R12 1
MC10 1u
+
-
+
U1 OPA333R15 1M
R13 1
00k
V3 0
V4 0
R2 100k
R16 1
0M
R_R
LD
52k
C_R
LD
47n R
17 1
M
V1 2.5
V2 2.5
C3 3.3nR1 10k
NS
NS1 2.5
+
Vcm
Vout
R5 10M
The RL Drive Amplifier RLD Stability Circuit with Compensated Amplifier
60
T
Frequency (Hz)
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M
Gain
(dB
)
-20.00
0.00
20.00
40.00
60.00
80.00
100.00
120.00
RLD Local R
Feedback
AOL INA+ Electrode
Loop Feedback
Composite
Feedback
1/ß
The RL Drive Amplifier RL Drive Stability Simulation of Separate Feedback
Paths
Compensation
Feedback
61
T
Frequency (Hz)
1.00 3.16k 10.00M
Gain
(dB
)
-20.00
0.00
20.00
40.00
60.00
80.00
100.00
120.00
The RL Drive Amplifier Compensated RLD Circuit Simulation of 1/Beta and
AOL Intersection
Intersection of 1/Beta and
AOL curve is 20dB/dec =
STABLE
62
T
Ga
in (
dB
)
0.00
20.00
40.00
60.00
80.00
100.00
120.00
Frequency (Hz)
1.00 3.16k 10.00M
Ph
as
e [
de
g]
0.00
45.00
90.00
135.00
180.00
The RL Drive Amplifier Gain and Phase Margin Plots of Compensated RLD
Amplifier
Loop Gain Phase Margin
@ 0dB = 70 degrees
63
The RL Drive Amplifier Step Response of RLD Amplifier and ECG Output
T
Time (s)
0.00 5.00m 10.00m
Vin
-100.00m
100.00m
VoA
2.45
2.55
Vout
2.20
2.80
641
The ECG Shield Drive
65
The ECG Shield DriveShield drive eliminates leakage to ECG Inputs
• Capacitance of cable can be 500 pF to 1.5 nF
• Isolation resistor Necessary for improved EMI/RFI filtering
• Shield is driven to
(VIN(+) — VIN(–)) /2
• Eliminates Leakage
from CP1 and CP2
+
–+
–
+
–
+
–
ECGP
ECGN
CP1
CP2
VCC/2
66
Vref
Vre
f
VCC
VC
C
VC
C
VF1R1 10k
R2 10k
R15 1M
R12 1
M
NS
NS3 2.5
C10 1u
+
-
+
U1 OPA333
RG
+
-V-
RefOut
V+RG
U2 INA333
VF2
VF3
C9 3
30p
C8 3
3p
C7 3
3p
R11 63.4kR10 63.4k
C6 3
3p
C5 3
3p
R9 63.4kR8 63.4kC2 47n
R5 1k
C4 47n
R7 1k
R4 10k
R3 10k
+
-
+
U3 OPA333
C1 1
n
+
VG
1
C3 1
TVout
VinP
VFL1 1T
VinN
Effective
Cable Shield
Capacitance
The ECG Shield DriveAC Stability Simulation Circuit for OPA333 as Shield Driver
67
Frequency (Hz)
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M
Gain
(d
B)
-20.00
0.00
20.00
40.00
60.00
80.00
100.00
120.00
The ECG Shield DriveAOL + 1/Beta Response of OPA333 Shield Drive and 1nF
Cable Capacitance
-40dB/decade Intersection
of AOL and 1/Beta =
UNSTABLE
68
Vref
Vre
f
VCC
VC
C
VC
C
VF1R1 10k
R2 10k
R15 1M
R12 1
M
NS
NS3 2.5
C10 1u
+
-
+
U1 OPA333
RG
+
-V-
RefOut
V+RG
U2 INA333
VF2
VF3
C9 3
30p
C8 3
3p
C7 3
3p
R11 63.4kR10 63.4k
C6 3
3p
C5 3
3p
R9 63.4kR8 63.4kC2 47n
R5 1k
C4 47n
R7 1k
R4 10k
R3 10k
+
-
+
U3 OPA333
C1 1
n +
VG1
C3 1T
Vout
VinP
VFL1 1T
R6 2k
R13 10k
C11 1nShield Drive
Compensation
Network
The ECG Shield DriveTINA Simulation Circuit for Stabilized OPA333 Shield Driver
69
Ga
in (
dB
)
0.00
20.00
40.00
60.00
80.00
100.00
120.00
Frequency (Hz)
1.00 1.00k 1.00M
Ph
ase
[d
eg
]
-180.00
-135.00
-90.00
-45.00
0.00
The ECG Shield DriveTINA Simulation Shows > 45 Degrees Phase Margin for
OPA333 Shield Driver
701
Lead Off Detection
71
•Pull up Resistors Force +IN to Comparator High When Lead is Removed
•Comparator Voltage triggers ALERT
•Lead Off Indicative of ―Weak Lead‖
Lead Off DetectionLead Off Differentiates a Bad Lead from an Arrythmia
VTH
VTH
VCC
VREF
Body-Electrode
Model
72
Lead Off DetectionTINA Simulation Circuit for Lead Off Detect
VCC Vref
VCC
VCC
VCC
VCC
VCC
VR
VR
VCC
VCC Vref
VS
VS
VS2
VS2
VoutRG1 10k
RG2 10k
R2 1k
R1 1k
R7 52k
C4 47n
R4 52k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
RG
+
-V-
RefOut
V+RG
U3 INA333
VF1
VF2
R15 1
0M
R12 1
M
R3 1
0M
+
-
+
U1 TLV3701R13 1
0M
R14 1
3.5
M
VF3
-
+
VM1
+
-
+
U2 TLV3701
-
+
VM2 R5 1
M
R6 1
M
+
-
+
U4 OPA348
+
-
+
U5 OPA348 R16 10k
R17 1M
C1 10nR
19 1
M
R20 1
M
R18 100kR21 52k
C3 47n R22 10k
NS
NS1 2.5
- +
SW
1 1
+
VG1
-+
SW
2 1
+
VG2
Voltage-Controlled
Switches Simulate
Disconnected Lead
73
Lead Off DetectionTINA Simulation Results for Lead Off Detect
T
Time (s)
401.55u 559.69u 717.83u
Vswitch
0.00
2.00
VComparator
0.00
4.99
741
Pace Detection
75
ap = Amplitude (2-700mV)
ao = Overshoot
dp = Pulse Width (.1-100us)
t0 = Overshoot Time Constant (4-100ms)
Rise Time = 100us
ap
ao
t0
dp
Pace DetectPace Maker Pulse Specifications
76
VCC
VCC
VCCVCC
VCC
VCC
VCC Vref
VCC
VCC Vref
Vref
+
-
+
OPA348
10n
R1 1
00k
R2 1k
+
-
+
OPA348
R3 1
M
R4 100k
C2 100p
+
-
+
TLV3701
+
-
+
TLV3701
R5 2
MR
6 2
MR
7 2
MR
8 4
00k
Vout 1
0k
+
ECGn
+
ECGp
52k
47n
52k
47n
63.4k 3
3p
63.4k 33p
C9 3
30p
RG
+
-V-
RefOut
V+RG
U5 INA333
R17 1
M
+
-
+
U6 OPA348+
-
+
U7 OPA348 R18 10k
R20 100k
10n
100k
R22 1
M
R23 1
M
+
Vpace Pos
-
+
Vpace1
-
+Vpace2
VPDetect
VECG_block
+
Vpace Neg
10k
Pace DetectPace Detect Circuitry in Parallel with ECG Signal Path
•AC Coupled Input Blocks ECG
Signal and Retains the PACER
Pulse
•Window Comparator Triggers if
PACER Signal Detected
•Separate PACER Processing
Circuitry
77
Time (s)
153.93m 209.78m 265.62m
Vout
2.50
2.51
Vpace Pos
0.00
1.00m
Pace DetectPACE Signal Extracted From PACE + ECG Waveform
781
INA Post Gain and Filtering
79
At
electrode
High Gain
with low noise
amplifiers
ADC
Noise
At
ADC
Amp
noise
Noise free
Dynamic range
Am
plitu
de
Signal Chain
At
electrode
Low gain At
ADC
Noise free
Dynamic range
Am
plitu
de
Signal Chain
a) Using a low resolution ADC b) Using a high resolution ADC
At
electrode
High Gain
with low noise
amplifiers
ADC
Noise
At
ADC
Amp
noise
Noise free
Dynamic range
Am
plitu
de
Signal Chain
At
electrode
Low gain At
ADC
Noise free
Dynamic range
Am
plitu
de
Signal Chain
a) Using a low resolution ADC b) Using a high resolution ADC
x200 x5
SAR + filter Option Results in Same Input-Referred Noise as
the DC Coupled Delta-Sigma, but at what COST?
INA Post Gain and FilteringChoice of High Gain + SAR ADC OR Low Gain + 24 bit Delta
Sigma ADC
80
VCC
Vref
VCC
VCC
Vref
VCC
Vre
fVC
C
VoutRG1 10k
RG2 10k
R3 10k
R5 1M
R6 1kNS
NS1 2.5
R13 1
M
R14 1
MNS
NS2 2.5
+
ECGn
+
ECGp
R2 1k
R1 1k
R7 1k
C4 47n
R4 1k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4kC
7 3
3pC8 3
3p
C9 3
30p
+
-
+
U2 OPA333
+
-
+
U4 OPA333
R16 1
M
+
-
+
U5 OPA333
R18 2M
R19 10k
VF1
R17 1
0M
NS
NS
4 2
.5
R12 1
M
+Noise
R15 2
M
R20 2
M
C1 1
0p
R21 2M
R22 1M
R23 1
M
NS
NS5 2.5
C10 1u
+
-
+
U1 OPA333
RG
+
-V-
RefOut
V+RG
U3 INA333
INA Post Gain and FilteringINA + Post Gain Amp With Differential Noise Source
81
Time (s)
0.00 187.93m 375.86m
50/60Hz
-1.00
1.00
Vout
2.16
4.33
INA Post Gain and FilteringNoise Coupled Differentially Translates to Output
50/60 Hz Couples Differentially;
How Do We Get Rid of It?
82
INA Post Gain and FilteringUse Filter Pro to Design a 50/60 Hz Notch
83
VCC
Vref
VCC
VCC
Vref
VCC
VCC
VCC
Vref
VC
C
Vref
Vout
RG1 10k
RG2 10k
R3 10k
R5 1M
R6 1k
NS
NS1 2.5
R13 1
M
R14 1
M
+
ECGn
+
ECGp
R2 1k
R1 1k
R7 52k
C4 47n
R4 52k
C2 47n
R8 63.4k R9 63.4k
C5 3
3p
C6 3
3p
R10 63.4k R11 63.4k
C7 3
3pC8 3
3p
C9 3
30p
R16 1
M
R18 1MR19 10k
VF1
NS
NS
4 2
.5
R12 1
M
+Noise
R15 2
M
R20 2
M
C1 10p
R21 2M
C3 330n
R27 8
.06k
R28 8.06k
R24 64.9k
R25 6
4.9
k
R29 8
.06k
C12 330n
NS
NS3 2.5
R22 1
M
R23 1
M
VF2
+
-
+U6 OPA348
+
-
+U2 OPA348
C10 1n
+
-
+U1 OPA348
RG
+
-V-
RefOut
V+RG
U5 INA333_C
+
-
+
U4 OPA348
R26 8.06k
R17 1
M
+
-
+
U7 OPA378
+
-
+
U3 OPA333
C11 1u
R30 1
M
INA Post Gain and FilteringECG Circuit with Added 50/60Hz Notch + Post Gain
84Time (s)
94.83m 237.76m 380.69m
Noise
-1.00
968.42m
Vout_Filter
2.37
3.40
Vout_PostGain
2.50
2.51
Vout_INA
2.50
2.51
INA Post Gain and FilteringPlots of ECG Output with Gain and 60Hz Notch
85
Time (s)
400m 417m 433m 450m 467m 483m 500m 517m 533m 550m
EC
G (
V)
0.00
123.63m
247.25m
370.88m
494.51m
Time (s)
400m 417m 433m 450m 467m 483m 500m 517m 533m 550m
EC
G (
V)
0.00
123.63m
247.25m
370.88m
494.51m
Fsample (Hz) = n*(1/50Hz + 1/60Hz)-1 = n*(27.27) Hz
INA Post Gain and FilteringLine Cycle Sampling with SAR converter on ‘T’ Wave at
Common Frequency Multiples of 50/60Hz
86
`
Patient
Protection,
Lead
selection
INA
Elec 1
Elec 9
RL
x5 x320.05 Hz 100 Hz
ADCMUX
Elec 2
Elec 8 INA
High order
Anti aliasing
filter
16 bit,100KSps
DC blocking
HPF
Additional
gain DOUT
`
Patient
Protection,
Lead
selection
INA
Elec 1
Elec 9
RL
x5
ADCMUX
Elec 2
Elec 8INA
24 bit,100KSps
DOUTSimple RC filter
100 Hz
ADS1258
Using a low resolution ADC00
Using a high resolution ADC
INA Post Gain and FilteringComparison of Delta Sigma ADC vs. Lower
Resolution SAR ADC
•Reduced Hardware
•Filter Requirements Relaxed
•Lower Power
•Lower System Cost
•Electrode Offset Info
Retained
87
`
Patient
Protection,
Lead
selection
INA
Elec 1
Elec 9
RL
x5
ADCMUX
Elec 2
Elec 8 INA
24 bit,
100KSps
DOUTSimple RC filter
100 Hz
ADS1258
`
Patient
Protection,
Lead
selection
INA
Elec 1
Elec 9
RL
x5
ADCMUX
Elec 2
Elec 8 INA
24 bit,
100KSps
DOUTSimple RC filter
100 Hz
ADS1258
INA Post Gain and FilteringBlock Diagram of INA Gain, Simple RC Filter, and ADS1258
A single ADC in the MUX approach does not
necessarily mean lower power due to the higher
speed needed to perform MUX switching
881
ADS1298 Introduction
89
The ADS129xThe All-In-One ECG Chip
90
CMOS input PGA
High input impedance
Low input current noise
Rail to rail input
24-bit
Delta-Sigma
ADC
+
-
+
-
+
-
+
-
RLD
CH1P
CH1MPGA
PGA
BUF
BUF
ADS129xInput Amplifier Specifications for Single Channel AFE
•Low Input Voltage Noise
•Current Noise = 0.1pA√Hz Over Bandwidth
•No Output Phase Reversal
•100dB AOL @ 50/60 Hz
•90dB CMR @ 50/60 Hz
•IB = 150pA MAX vs. Temperature
•ZIN >100MΩ, CIN = 100pF max
91
• Noise is optimized with amplifier gain=4
• The 4uV p-p includes the crest factor of 6.6 to convert rms to pk-pk
• Noise is referred to the input
CH1P
CH1M
AFE
+
ADC
ADS129xNoise Model for ECG AFE
92
ADS129xProgrammable Data Rates for Low Power and High
Resolution Modes
93
ADS129xMUX Selects Inputs to Front End PGA
• Normal Electrode
• Input Shorted
• RLD Input
• VDD
• TMP Sensor
• Input Test Signal
94
0.333(RA+LA+LL)
0.5(RA+LA)
0.5(LA+LL)
0.5(RA+LL)
Wilson Central
Voltage
Augmented Lead
Voltages
*The Same Amplifiers Used to Derive the WCT Voltage Can be
Switched to Obtain the Augmented Leads
ADS129xWilson Central Terminal
95
+/-VCM2 + VS
+/-VCM2 + VS
VO = VS(1+R2/R1) + VCM1 + (VCM2 – VCM1) x (R2/R1)
VCM1 = AVDD/2
+
-
AVDD
+
-
AVDD
+
-
AVDD
VO2
R1 R2
R1 R2
VO1
RLD Sum(Register set)
Right leg drive
Lead I configuration
RS
RS
RS
External R-C
ADC2
200K
200K100K
5M
ADS129xInput Amplifier and RLD Selection
*Compensation of RLD Amplifier is Based on the Gain Selected
and the Number of Amplifiers in the Loop
96
All switches can be controlled
by register settings
CH1P
CH1N
CH3P
CH3N
CH2N
CH2N
CH4P
CH4N
50K
50K
50K
50K
50K
50K
50K
50K
220K
220K
220K
220K
220K
220K
220K
220K
RLDINV
RLDOUT
RLDREF
RLD
AMP
Rext10MCext
264pF
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-CH5P
CH5N
CH7P
CH7N
CH6P
CH6N
CH8P
CH8N
50K
50K
50K
50K
50K
50K
50K
50K
220K
220K
220K
220K
220K
220K
220K
220K
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
20K
20K
+
-
RLDP1
RLDP3
RLDP5
RLDP7
RLDP2
RLDP4
RLDP6
RLDP8
RLDM8
RLDM6
RLDM4
RLDM2
RLDM1
RLDM3
RLDM5
RLDM7
20K
20K
20K
20K
20K
20K
RLDREF_INT
ADS129x
RLD_INV
RLD_OUT
RLD_REF
RLD
AMP
REXT
2M
CEXT
264pF
+
-
/RLDREF_INT
RLDREF_INT
RLD
Electrode
220K
220K
CH1P
CH8M
RLIM
R1
R2
AVDD - AVSS2
AVDD - AVSS2
WCTWCT_TO_RLD
AVDD - AVSS2
AVDD - AVSS2
RLDREF_INTRLDREF_INT
ADS129xRLD Selection—8 Channel Case
*Multiple PGA Outputs Can Be Switched to
Derive Inverting RLD
97
ADS129xRLD with Multiple Devices
Device 2
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
Power Down
Device 1
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
Device n
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
Power Down
Device 2
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
+
-
+
-
+
-
Power Down
Device 1
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
+
-
+
-
+
-
Device n
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
+
-
+
-
+
-
Power Down
To
Input
Mux
To
Input
Mux
To
Input
Mux
Device 1
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
Device 1
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
+
-
+
-
+
-
Device 2
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
Device 1
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
Power Down
Device 2
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
+
-
+
-
+
-
Device 1
RLDINV
RLD OUT
VA1-8
RLD REF
RLD IN
+
-
+
-
+
-
+
-
Power Down
To
Input
Mux
To
Input
Mux
To
Input
Mux
*With Multiple Devices the RLD Output Becomes the
Amplified Difference Between RLD REF and the
Summation of Multiple Lead Outputs
98
>From CH1P
>From CH1N
>From CH3P
>From CH3N
From CH2P<
From CH2N<
From CH4P<
From CH4N<
50K
50K
50K
50K
50K
50K
50K
50K
500K
500K
500K
500K
500K
500K
500K
500K
TESTN_PACE_OUT2PACEAMP
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
->From CH5P
>From CH5N
>From CH7P
>From CH7N
From CH6P<
From CH6N<
From CH8P<
From CH8N<
50K
50K
50K
50K
50K
50K
50K
50K
500K
500K
500K
500K
500K
500K
500K
+
-+
-
+
-
+
-
+
-
+
-
+
-
+
-
20K
20K-+
00xx
01xx
10xx
11xx
xx00
xx01
xx10
xx11
xx11
xx10
xx01
xx00
00xx
01xx
10xx
11xx
20K
20K
20K
20K
20K
20K
PDB_PACE
PACE_ODD [4:1]
100K
100K
VREFCM
PACE_IN(GPIO1)GPIO1
TESTP_PACE_OUT1 PACEAMP
-+PDB_PACE
200K
200K
(AVDD-AVSS)/2
500K
*Separate Pace Amplifiers Allow
External Processing of Pace
Signal; All Channels do Not Have
to Operate at Higher Data Rates
ADS129xPace Detect
PACE_OUT2PACE_OUT2
PACE_OUT1PACE_OUT1
1
x
0
x
1
x
0
x
PACEO0
1
x
1
x
0
x
0
x
PACEO1
PACE ODD
x
1
x
1
x
0
x
0
PACEE1
PACE EVEN
x
1
x
0
x
1
x
0
PACEE0
Channel #8
Channel #7
Channel #6
Channel #5
Channel #4
Channel #3
Channel #2
Channel #1
CHANNEL
SELECTED
1
x
0
x
1
x
0
x
PACEO0
1
x
1
x
0
x
0
x
PACEO1
PACE ODD
x
1
x
1
x
0
x
0
PACEE1
PACE EVEN
x
1
x
0
x
1
x
0
PACEE0
Channel #8
Channel #7
Channel #6
Channel #5
Channel #4
Channel #3
Channel #2
Channel #1
CHANNEL
SELECTED
PACE
AMP -
+
250K
250K
CH2P
CH2M
PDB_PACE_EVEN
PACE_EVEN[0:1]
100K
CH8P
CH8M250K
250K
100K
VREFCM
PACE
AMP -
+
250K
250K
CH2P
CH2M
PDB_PACE_EVEN
PACE_EVEN[0:1]
100K
CH8P
CH8M250K
250K
100K
VREFCM
ADS129x
PACE
AMP -
+
250K
250K
CH1P
CH1M
PDB_PACE_ODD
PACE_ODD[0:1]
100K
CH7P
CH7M250K
250K
100K
VREFCM
PACE
AMP -
+
250K
250K
CH1P
CH1M
PDB_PACE_ODD
PACE_ODD[0:1]
100K
CH7P
CH7M250K
250K
100K
VREFCM
99
AVDDAVDD
R2
AVSSAVSS
AVDDAVDD AVSSAVSS
+
-
+
-
LOFF_STATP
LOFF_STATM
To ADCR2
R3
Z1
Z2
Z3
51K
25, 17.275, 12.5, &
6.25nA
51K
47nF
51K
47nF
100K
100K
100KRLD OUT
Patient Skin – Electrode
Contact Model
Patient
Protection
ResistorAnti-Aliasing Filter
<512KHz
FREQ = DC, FDR/2 or FDR/4
< R
1 ~
10M
>
4-bit
DACCOMP_TH[2:0]
VINP
VINM
VX
LOFF_SENSP
& VLEAD_OFF_EN
LOFF_SENSP
& VLEAD_OFF_EN
LOFF_SENSP
& VLEAD_OFF_ENLOFF_SENSM
& VLEAD_OFF_EN
LOFF_SENSM
& VLEAD_OFF_EN
LOFF_SENSM
& VLEAD_OFF_EN
LOFF_FLIPLOFF_FLIP
ILEAD_OFF[0:1]
FLEAD_OFF[0:1]
FLEAD_OFF[[1:0]FLEAD_OFF[[1:0]
LOFF_FLIPLOFF_FLIP
EMI
Filter
EMI
Filter
ADS129xLead Off Detection
100
V
RPROTEC
T
RPROTEC
T
RPROTEC
T
RPROTEC
T
ADS129x
RT
HO
RA
X
100K
100K
100K
100K
E1
E2
E3
E4
PATIENT’
S CHEST
64KHz
V
RPROTEC
T
RPROTEC
T
ADS129x
RT
HO
RA
X
100K
100KE1
E2
PATIENT’
S CHEST
64KHz
*AC Current is injected into the
Patient’s Thorax and the Change
in Voltage is Measured to
Calculate Change in Impedance
ADS129x Respiration Testing Measures the Change in Thoracic
Impedance with Inhalation of O2
101
ADS129x
GPIO3/
RESP_OUT
RESP_MODE
RESP_PH [4:2]
GPIO4/
RESP_PH_OUT RE
SP
IRA
TIO
NG
PIO
GPIO1
GPIO2
180 Deg111
157.5 Deg011
135 Deg101
112.5 Deg001
90 Deg110
67.5 Deg010
45 Deg100
22.5 Deg000
PHASE
SELECTEDRESP_P
H0
RESP_
PH1
RESP_
PH2
RESP_PH[4:2] bit CODE
ADS129xRespiration Functions
Changing Phase Allows
Measurement/Compensation for
Complex Impedance Phase Shifts
Between Modulator and
Demodulator
102
Simplified ADS129x internal reference block diagram
ADS129xInternal Voltage Reference
The Internal Band Gap Accuracy = 1%
Internal REF can be Powered Down
VREFP Can Be Supplied Externally
1041
Questions?
105
Acknowledgements
• Beraducci, Mark and Soundarapandian, Karthik. Sbaa160, Application Report: Analog Front End Design of ECG Systems Using Delta-Sigma ADCs. March 2009.
• Brown, John --Burr Brown Strategic Marketer, general information
• Brown, John and Joseph Carr. Introduction to Biomedical Equipment Technology. Prentice Hall Inc. New Jersey. 1981, 1993.
• Dubin, Dale. Rapid Interpretation of EKG’s. Cover Publishing Company. Fort Myers. 2000.
• Fraden, Jacob. Handbook of Modern Sensors—Physics, Designs, and Applications.Advanced Monitors Corporation. San Diego. 2004.
• Franco, Sergio. Design with Operational Amplifiers. McGraw-Hill Inc. NY. 1988.
• Fredericksen, Thomas M. Intuitive Operational Amplifiers. McGraw-Hill Inc. 1988.
• Graeme, Toby, Huelsman. Operational Amplifiers—Design and Applications. McGraw-Hill Publishing Company. New York. 1971.
• Gray, Paul R. and Meyer, Robert G. Analysis and Design of Analog Integrated Circuits. John Wiley & Sons. New York. 1977
• Green, Timothy - Linear Applications Manager, general information
• Kuehl, Thomas--Linear Applications Engineer, general information
• Norton, Harry N. Sensor and Analyzer Handbook. Prentice Hall Inc. New Jersey. 1982.
• Soundarapandian, Karthik--Over sampling Manager, general information