vance anderson department of defense defense microelectronics activity mcclellan, ca 95652...
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Anderson 1
Vance AndersonDepartment of DefenseDefense Microelectronics ActivityMcClellan, CA 95652anderson@dmea.osd.mil(916)231-1646
A185 / MAPLD 2004
Improved Long-term Reliability Evaluations for DoD
Microelectronics
7th MAPLD International ConferenceRonald Reagan Building and
International Trade CenterWashington, DC
September 8-10, 2004
Anderson 2 A185 / MAPLD 2004
Outline
Blame it on Moore?DoD Reliability ConcernsKey Failure MechanismsDMEA’s Improved Reliability EffortsSummary
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Moore’s Law
“IC complexity roughly doubles every 2 years” Gordon Moore, 1965
•Creativity has overcame technical barriers
•Lithography•Cu•Low-k dielectrics
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Effects of Scaling
Scaling results in many factors leading to infant mortality
Higher densityMore layersThinner gate oxidesUnproven materials
and processes
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DoD Reliability concerns
COTS ICs in a MIL environment FPGA, uP, memory, ASICs
Need for extended temperature range VERY long service life (relative to consumer) Use of parts outside intended markets Less manufacturer support and data on parts
DoD “small player” – little data/supportCompetition and proprietary processes
Uncertainty of new materials and processes Reduced margins
“Margin is performance left on the table” Steve Huber, Intel, DMSMS 2001
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Some Key Failure Mechanisms
Design and Manufacturing DefectsLayoutMetalizationOxideBonding
Semiconductor “Wearout”ElectromigrationHot Carrier DamageGate Oxide Failure – TDDB
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Manufacturing Defects
Scaling pushes the limits of manufacturing
Defects lead to infant mortality
Design rule violations Current density Layout
Fabrication defects Voids in conductors Pinhole defects in oxide Non-uniformity Stress voiding
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Electromigration
Metal formation or voids in/between interconnects
Diffusion of metal atoms along a conductor in the direction of electron flow
Increases with: Increased current densityHigher temperature Interconnect density
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Hot Carrier Degradation
High electric field for carriers in depletion region Carriers at drain end of depletion region gain
sufficient energy to inject into the gate oxide and cause fundamental parameter shifts transconductanceThreshold voltage
Decreased dimensions increase electric fields
Temperature has little effect Higher operating voltage increases field thus
increasing hot carrier effects
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Gate Oxide Failure
Time dependent dielectric breakdown (TDDB)
Gate oxide fails when conductive path forms in the dielectric—shorting the device Lifetime decreases exponentially with increasing electric fieldThin oxides result in shorter lifetimes
Nigam1 suggests lifetimes of 8-9 years (Gox=33A, 3.3V) Unknowns relative to high-k dielectrics Unknowns for thin gate oxides (<40A)Pin hole oxide defects increase failures
1. Nigam, T. (1999). A fast and simple methodology for lifetime prediction of ultra-thin oxides. IRPS Proceedings, pp. 381-388.
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DMEA Reliability Efforts
MIL-HDBK-217
Failure Rate-based reliability models (UofMD)
OIM and EBSD inspections
Better manufacturer data – AQEC
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MIL-HDBK-217F
Outdated and unsupported since Perry memorandum in 1994
Still required by many MIL contracts Appendix B does address EM,
TDDB, Hot Carrier effects (limited) Based on RADC VHSIC Reliability
Prediction report But, still based on 1990s parameters
Sample tables range from 0.8um to 1.2um feature size
No provisions for gate oxide thickness or material
GEIA G-12 and DMPG will discuss MIL-HDBK-217 with OSD/DSPO at upcoming September meeting
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MIL-HDBK-217F
Many users and tools do not incorporate Appendix B
Item SW has recently incorporated App B into it’s reliability tool
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Failure Rate-based Reliability Models
Consortium effort with AVSIMembers include Boeing, DoD, FAA, Goodrich,
Honeywell, SmithsPrinciple research by U of MD (Dr. Joseph Bernstein)
Addresses semiconductor reliability (wearout) in an aerospace application
Failure based reliability modelsvs. industry degradation models (BERT et. al.)
Model operating parameters of ICApply custom POF models to each component at the
modeled operating parameters Validate POF model parameters with actual
testing
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OIM and EBSD
Orientational Imaging Microscopy (OIM) Electron BackScatter Diffraction (EBSD) 3 dimensional evaluation of
metal interconnects Grain evaluations of
conductors
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Electron backscatter diffraction pattern (EBSD) is a method to measure orientation of crystalline material from a small area
The sample is tilted in SEM to approximately 70 degrees. The diffraction pattern is imaged on a phosphor screen. The bands in the pattern represent the reflecting planes in the diffracting crystal volume. Thus, it shows the orientation of the diffraction crystal lattice.
Electron Backscatter Diffraction Pattern
Example of EBSDSpecimen in SEM
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Prediction Using EBSD
Prior work evaluated COTS ICs using traditional methods Cross sections Top down X-ray
Either of the physical analysis methods is “hit or miss” due to circuit complexity; but EBSD is quantitative
Conductors carrying current can act as micro beams These conductors, under DC conditions, exhibit migration of metal ions Additionally, for Cu damascene interconnects, deposition process is
critical and not always reproduced from lot-to-lot Hence, grain size distribution is not the same from lot-to-lot Does this make a difference? Probably yes. Grain size and distribution will be a key area of investigation Twins and misorientation will also be evaluated
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Interconnect Isolation
Area cut with FIB to expose lower layer metal for probe contact and probe clearance
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Current Work
Investigate EBSD as key identifier of IC quality Grain size and distribution Strain distribution Misorientation and twins formation Analysis before and after stress
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AQEC
Aerospace Qualified Electronic Component (AQEC)AIA/GEIA G-12/Aerospace Process Management
Committee(APMC) initiativeISSUE: Fewer and fewer MIL parts offerings Cost IS and issue Designers need better parts and more data Upscreening COTS is risky at bestSTATUS: Draft AQEC specification in work by AQEC WG
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AQEC goals
Manufacturer qualified components for aerospace applicationsExtended temperatureReliability and qualification data
Product Change NoticesDesign stability
Little or no increase in cost over COTS offerings
IC manufacturers are best suited to specify their components
operating capabilities
Anderson 22 A185 / MAPLD 2004
AQEC - Who’s Involved ?
DoD:
NAVAIR, DSPO, AWACS, AMCOM, JCAA, DUSD(L&MR)
DoD:
NAVAIR, DSPO, AWACS, AMCOM, JCAA, DUSD(L&MR)
Airframe Integrators:
Boeing, Lockheed Martin, Northrop Grumman
Airframe Integrators:
Boeing, Lockheed Martin, Northrop Grumman
Avionics OEMs:
Honeywell, BAE, Smiths, Rockwell Collins, Goodrich
Avionics OEMs:
Honeywell, BAE, Smiths, Rockwell Collins, Goodrich
Part Manufacturers:
Motorola, AMI, Micron, Texas Instruments, IBM, Intel, Xilinx, National, LSI Logic, Vishay-Siliconix, Linear Technology, Altera, Philips, Analog Devices
Part Manufacturers:
Motorola, AMI, Micron, Texas Instruments, IBM, Intel, Xilinx, National, LSI Logic, Vishay-Siliconix, Linear Technology, Altera, Philips, Analog Devices
Others:
NASA, FAA, COG, G-12, EIA, SIA, JEDEC, AIA, AVSI, DSCC
Others:
NASA, FAA, COG, G-12, EIA, SIA, JEDEC, AIA, AVSI, DSCC
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Summary
DoD is concerned about long-term reliability for fine feature size microelectronics
FPGA Microprocessors Memory
Update and support for MIL-HDBK-217 or replacement Investigating failure rate-based modeling of IC reliability for
various design and foundry processes Investigating novel metal reliability evaluation methods using OIM
and EBSD Support of AQEC to provide availability of “better” parts and data
for designers
At this time there are many more questions than answers…
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