system on chip (soc)system-on-chip the microprocessor is itself a logic circuit, so it is also...
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International semester
2019-2020
Vahid MEGHDADI
System on Chip (SoC)
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Course objectifs
Learning how to make cohabit a microprocessor and a logic
circuit.
How to create interface circuit around a µP
Create a simple microprocessor
Add to it input/output ports
Implement all in an FPGA
Assembler PicoBlaze Circuit µP + peripherals
Microprocessor and its peripherals
Some times there are two separate
buses, one from µP to peripherals and
another one from peripherals to µP.
Introduction
System on chip
PicoBlaze a simple soft microprocessor
Declaration et instantiation
Connexion of the memory containing the µP program
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Introduction
Typical microprocessor system including some logical circuits around
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All on the same integrated circuit (SoC)
System-on-Chip
The microprocessor is itself a logic circuit, so it is also implemented on the
FPGA
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FPGA Evolution At the beginning the FPGA contains just some programmable logic,
everything is constructed using them
Memory was then embedded (block RAM)
Hard multipliers are added
Hard core microprocessor was added
« Power PC » for Virtex series,
« Dual-core ARM Cortex » for more recents (7 series)
ADC and DAC are also added
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Embedded Microprocessor
Two types of microprocessor
Hard, the µP is burned directly in FPGA
Soft, the µP is just another VHDL program
In the Xilinx FPGA, MicroBlaze is a 32-bit soft µP
In the Xilinx FPGA, PowerPC is a 32-bit hard µP
In the 7-series Xilinx FPGA, ARM Cortex V7-A
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Advantage: Creation of tailored µP with
new instruction set (co-processor)
A µP has its own instruction set (addition, subtraction,
jumps, etc.)
One can add more complex instruction (read or send
characters on the serial porta)
These new instructions are implemented in the logical part
of the FPGA
A sub-routine sends the operands into external registers
It waits until the results are ready
It read the results from the registers
Example: sin, cos, complex multiplication, convolution, etc.
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Simplified scheme
algorithm
Write the operands to the registers
Wait until the answer is ready
Read the answer
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PicoBlaze, a simple « soft-core » µP In this course we construct ore own SoC
We use a simple 8-bit open source µP called PicoBlaze
The VHDL program of the processor is available
There are computer tools who generates the operational code (object code) from assembly language instructions
There are also a tool who creates the VHDL memory component from the object code.
We download this program memory together with the microprocessor and also other logical circuits into the FPGA (using Vivado)
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How to use PicoBlaze ?
1. Learn its architecture
2. Learn the instruction set
3. Instantiate the µP component into your own CHDL program
4. Create and connect the program memory to the µP
5. Optionally, add some VHDL code for additional required logic
6. Synthesis, placement and routing the whole ciruit
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Architecture of PicoBlaze
Inputs
Outputs
Interface with
program
memory
Inputs Output
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Functional example
00xkk
Object
code
Mnemonic
LOAD Sx,kk
Memory
address
000
00ykk’ LOAD Sy,kk’001
10xy0 ADD Sx,Sy002
22aaa JUMP aaa003
000
PC
Init
F8
S5
then003
PC
F2
Sc
kk=06
kk‘=F2
x=5
y=c
aaa=002
06
S5
then001
PC
if code(17 downto 12)=“000000” then
s(code(11 downto 8)) <= code (7 downto 0)
06
S5
then002
PC
F2
Sc
002
PCif code(17 downto 12)=“100010” then
PC <= code(11 downto 0);
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VHDL Instantiation
You should declare two
components in your
program.
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PicoBlaze declaration in the main
programTwo steps to use the µP: 1) declaration of the component 2) instantiation
Declaration in the declarative zone (before begin)
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Instantiation
Max 105 MHz for
Spartan 6PicoBlaze
ports.The signals that
should be declared in
the main program.
Configuration
parameters
Two steps to use the µP: 1) declaration of the component 2) instantiation
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Memory declaration and instantiation
Configuration
parameters
PicoBlaze
ports.
The signals that
should be declared in
the main program.
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Memory program creation
How to synthesize the program memory and other logical circuit at
the same time?
Write the assembly program in a text file
Create the object codes using the compiler
Create a VHDL program that synthesizes a read-only-memory
(ROM) that contains the object codes
Instantiate the memory and the remaining logic at the same
time
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Example : a whole µP circuit Create a simple application : a chaser (Погоня)
All the circuit is created inside the FPGA
Hardware
Write 0x01 in the register S4
Write S4 on the peripheral bus
Rotate right s4
Temporize
Software
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Entity
entity test_pico6 is
Port ( CLK : in STD_LOGIC;
LED : out STD_LOGIC_VECTOR(7 downto 0));
end test_pico6;
CLK LED8
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PicoBlaze Component Declarationcomponent kcpsm6
generic( hwbuild : std_logic_vector(7 downto 0) := X"00";
interrupt_vector : std_logic_vector(11 downto 0) := X"3FF";
scratch_pad_memory_size : integer := 64);
port ( address : out std_logic_vector(11 downto 0);
instruction : in std_logic_vector(17 downto 0);
bram_enable : out std_logic;
in_port : in std_logic_vector(7 downto 0);
out_port : out std_logic_vector(7 downto 0);
port_id : out std_logic_vector(7 downto 0);
write_strobe : out std_logic;
k_write_strobe : out std_logic;
read_strobe : out std_logic;
interrupt : in std_logic;
interrupt_ack : out std_logic;
sleep : in std_logic;
reset : in std_logic;
clk : in std_logic);
end component;
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Memory Component Declaration
component prog_memo
generic ( C_FAMILY : string := "S6";
C_RAM_SIZE_KWORDS : integer := 1;
C_JTAG_LOADER_ENABLE : integer := 0);
Port ( address : in std_logic_vector(11 downto 0);
instruction : out std_logic_vector(17 downto 0);
enable : in std_logic;
rdl : out std_logic;
clk : in std_logic);
end component;
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µP InstantiationArchitecture ...
...
Begin
processor: kcpsm6
generic map ( hwbuild => X"00",
interrupt_vector => X"3FF",
scratch_pad_memory_size => 64)
port map( address => adr,
instruction => instr,
bram_enable => bram_enable,
port_id => open, --sortie
write_strobe => we,
k_write_strobe => open, --sortie
out_port => data,
read_strobe => open, --sortie
in_port => "00000000", --entrée
interrupt => '0',
interrupt_ack => open, --sortie
sleep => '0',
reset => kcpsm6_reset,
clk => clk);
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Memory Instantiation
program_rom: prog_memo
generic map( C_FAMILY => "S6",
C_RAM_SIZE_KWORDS => 1,
C_JTAG_LOADER_ENABLE => 1)
port map( address => adr,
instruction => instr,
enable => bram_enable,
rdl => kcpsm6_reset,
clk => clk);
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Writing Realization
Chronogram of the write
operation from PicoBlaze
to the peripheral port
using the instruction:
OUTPUT Sx,pp
process(clk)
begin
if clk'event and clk = '1' then
if we= '1' then
LED <= data;
end if;
end if;
end process;
The VHDL process to catch
the data at the right time
and to write it on the LEDs.
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Environnement ISE
Main program
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PicoBlaze instruction set
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Exercise (use the PicoBlaze instruction
set) The object codes below represent a program. Find the assembly
program
Run the code. What is the result?
Adresse Code
000 01102
001 01201
002 10120
003 19101
004 32006
005 22002
006 22006
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