pcb fab wallchart

Head Office :2-12 Harp Street, P.O. Box 196, Campsie,N.S.W., Australia 2194Telephone: (02) Facsimile: (02) Modem: (02) Email : Sales@morris.com.auWeb Site: www.morris.com.au

978962009787252997188671

PCBPRO7A

MANUFACTURING DRAWINGS SHOULD INCLUDE A DESIGN ANDFABRICATION TABLE AS SHOWN BELOW. THE DRAWING SHALLCONTAIN DIMENSIONS REFERENCING NPTH AND PTH HOLESTO AN ORIGIN OR DATUM. FOR FULL DETAILS ON DIMENSIONINGAND TOLERANCING OF PRINTED BOARDS REFER IPC-D-300G.Copies of this table are available from Morris Productions in a DXF file or Protel formats.DESIGN INFORMATIONBOARD TECHNOLOGY : BOARD SIZE :

X(MIN. TRACKS/PADS/CLEARANCE IN 0.025mm (0.001") (REFER ALSO PROFILING INFORMATION)

(MINIMUM ANNULAR RING 0.05mm (0.002") SS DS PTH ML No. OFF _____CIRCUIT TYPE :

VIAS :

ARTWORK :

MATERIAL :

STRUCTURE :

DRILLING :

BOARD FINISH :

TRACK FINISH :

EDGE BOARD CONTACTS :

PROFILING :

ACCEPTABILITY :

AS SHOWN

AS SHOWN

AS SHOWN

AS PER DRAWING

COMPONENT SIDE

ETCHING

WIRING SIDE

REFER PATTERN MASTER LIST

VIEWED FROM :

PTH MINIMUM COPPER THICKNESS :REFERENCE :

LEGEND / SCREEN PRINT :

NPTH :

COLOUR :

COLOUR :SOLDER RESIST :

AS SHOWN

AS SHOWN

TENTED 2nd DRILL

PADS REMOVEDBOTH

NONE

LIQUID PHOTOIMAGEABLE

WHITE YELLOW OTHERCOMP.

GREENMATTE GLOSS

SELECTIVE SOLDER

1.3um HARD GOLD OVER 5.0um NICKELHARD FINISH GOLD PLATE

REFER PATTERN MASTER LISTELECTROLESS Ni/Au - 0.1 / 0.2um GOLD OVER 3.0um NICKEL

REFLOW TIN/LEAD

BLUE YLW/GRN OTHER

OTHER

OTHERREFER

AS DIMENSIONED , MEASURED AND CUT FROM SPECIFIED DATUM.

MATERIALS AND WORKMANSHIP FOR ALL PRINTED WIRING BOARDSMUST MEET OR EXCEED THE REQUIREMENTS OF :

USE PROFILE/ROUT TAPE SUPPLIED REFER PATTERN MASTER LISTREFER PCB BLANK

SQUARE CUT

IPC - 6011, IPC - 6012 U.L CERTIFICATION

ADDITIONAL REQUIREMENTS :MICROSECTION :CERTIFICATION :

ELEC. TEST :MANUFACTURER'S LOGO :MANUFACTURER'S CERTIFICATION :PACKAGING AND HANDLING :

MIL -P- 55110D OTHER __________________

AS/NZS ISO 9001PER ORDER

NONE

NONE

NONEFOIL LEGENDREQUIRED PER ORDER REFER ______

REFER ______

NONEQUALITY RELEASE REPORT

SAMPLE PLAN MIL - P - 55110DMIL - P - 55110D IPC CLASS

CLASS

OTHER __________________

OTHER __________

N.C. ROUT V- GROOVE BLANK

DWG No.

SOLD.

SCREEN PRINT

REMOVE PADSAS SHOWN

AS SHOWN

NC_DRILL FILES PATTERN MASTER LIST

FINGER CONNECTOR DIM PER : No. OFF TOTAL ONE SIDE

FEED THROUGHUNIQUE DRILL

MANUAL

TENTEDMIXEDNONE

CAD TYPE

LAMINATION SEQUENCE

TWO SIDES

(mm)

LAYER CONSTRUCTION PER :

ARTWORK/PATTERN MASTER LISTISS ISS DESCRIPTION DRAWING No./CAD FILE REF. ARTWORK/FILM REF GERBER FILE REF

GLASS FIBRE EPOXY RESIN NEMA GRADE FR4 (IPC - 4101)OTHER

THICKNESS :TOLERANCE :

OUTER :

INNER PWR :INNER SIG :

COPPER (FINISHED) :BOW AND TWIST :

0.8mm

18um

IN A/W IPC - D - 300G CLASSIN A/W IPC - D - 300G CLASS

1.2mm

35um

1.6mm

70um

20um OTHER

18um18umSTANDARD 'MORRIS PRODUCTIONS' LAYUP

35um35um

70um70um

2.4mmOTHER + / -

3.2mm

1

1

2

2

3

3

This publication is copyright and all rights are reserved. Other than as permitted under the Copyright Act, no part may be reproduced by anyprocess without the written permission of Morris Productions Pty Limited. The information contained in this publication is based upon IPCstandards. The information is advisory only and its use or adaption is entirely voluntary. Morris Productions Pty Limited and its servants oragents shall not be responsible for continued currency of the information or fo r any errors, omissions or inaccuracies in this publicationarising from negligence or otherwise howsoever or for any consequense arising therefrom.

MORRIS PRODUCTIONS

MD1001 SHEET 1 OF 1

MORRIS CIRCUITS

PRINTED CIRCUIT BOARDDESIGNERS GUIDE

BLOCK DIAGRAM

Copyright Morris Productions Pty. Limited 1998

ORDERMORRIS CIRCUITS &MORRIS GRAPHICSCERTIFIED BY : -

AS/NZS ISO 9001 : 1994

DRAWN CHKD AMENDMENTS EXAM APPD DATE ISS

Morris Productions offer our customers a PCB design service.

The service provides a number of facilities dependent on your requirements : - ** Schematic Capture and laser plots ** Bill of Materials ** Board Layout (From Schematic or Netlist) - Photoplots - Checkplots - Photoplot Files - Drill Files - Shape Based Routing ** Manufacturing Drawings ** Arrangement of Production ** Design advice ** Up to date information on current trends in manufacturing and specifications ** Extract gerber files from Protel generated PCB files and amend

VISUALGeneral AppearanceCleanlinessPlating AppearanceEtched line widthsand Spacings.

PHYSICALPlating adhesionConductor Peel StrengthSolderabilityThermal Stress (solder float test)

ELECTRICALContinuityCurrent Carrying CapacityCo-Planer and layer tolayer insulation. Dielectricwithstanding voltage test to IPC -6011, IPC-6012 class 3 (1 KV DC for 30

MICROSECTIONPlating ThicknessPlating QualityInterconnectionhole/inner layerHole QualityAnnular Ring (internal)Layer RegistrationCopper thickness (inner)Dielectric SeparationsBoard Integrity following

We recommend customers approve production tooling generated from their own information. This may reveal errors in design, manufacturability or potential design improvements. For large production runs, we also recommend that pre-production samples be obtained. Both Morris and our customers are then assured of the boards suitability for manufacture, and can see at first hand the quality expected. If either option is not requested the customer must accept responsibility for errors due to incorrect data supplied.

Aging and storage of your PCB's impacts upon solderability and flatness therefore the following general guidelines should be applied: - clean, tidy environment, - avoid allowing the board to come into contact with silicones (hand creams, etc), sulphur -containing material which may degrade solderability. - avoid abrasive materials,moisture and handling edge contacts. - boards should be left in sealed and dessicated bags - should be stoved flat for a min. 6 hrs at 115 - 120 deg C in an air circulating oven immediately prior to assembly to remove moisture wicking (ingress of moisture absorbed by epoxy glass at board edge). Failure to perform this function and applying rapid heating (eg. hand soldering) can result in localised separation of the inner layer surfaces(delamination)..

Specific inspection, acceptability, packaging and handling methods are detailed in IPC-2221,

Note - phototools and their condition are vital to PCB manufacture. For example, the maximum layer to layer misregistration of pattern features should not exceed 0.003" (0.075mm) at full size. In this way MorrisPre-production engineers can perform a comprehensive design rule check, step and repeat artwork to a standard format size, add venting (to aid in the flow of prepreg for multilayer boards, and to give mechanical strength and stability) and most importantly, ensure the accuracy and stability of the diazo's (phototools) used in manufacture.

- separate file per artwork and layer sequence is specified..- Gerber files, aperture file & drill file formats eg.2,4 inch format or 3,3 metric - Gerber 274X (Embedded Apertures) preferred- Gerber files are registered to one another ( has the same offset).- files should be viewed from the "component side " (primary side).- use design standards (such as IPC-2221, IPC-2222) and adequate allowances for processing.- each corner should have corner delineation marks.- NPTH less than 6.5mm dia should have pads removed to allow tenting of the hole during processing. - ensure that legend markings are 0.25mm (0.010") from lands and/or holes.- if you require gold edge connectors add a plating bar 5mm away from the fingers and extend the length of the connector. The thickness of the bar and connections to the fingers to be 0.5mm (0.020").- to aid in routing, at least two(2) diagonally opposite NPTH holes should be provided at the board extremities, the diameter of which should be between 2.5 - 6.0mm. Preferred size is 3.175mm (1/8").

Morris Productions produce PCB'S to 24 layers . Unless there is a need to specify certain dielectric separations(eg. ControlledImpedence), the thickness of core material or quantity of prepreg used between each successive conductive layer is best left to the manufacturer. Most boards should have a minimum of 0.09mm separation between conductive layers. The layup should be kept balanced i.e. the distribution of layers, copper thickness, and layer separations shou ld be symmetrical to prevent warping, however some designs require large copper areas on the outside layers. Ensure these areas are cross- hatched to reduce the possibility of blistering or warping in the soldering process. Listed below are Morris' most common multilayer layups using materials generally kept in stock. Other layups are available on request.

The fibreglass core thickness does not include the foil (copper thickness). The required board thickness should be stated as the finished size (after plating and addition of solder resist), however, in critical areas, such as edge connectors, the thickness tolerance may be more stringent . Overall board thickness tolerances in general, (including double and single boards) should be in as per IPC - D - 300G, and typically + / - 0.2mm.

ARTWORK ALLOWANCESCONDUCTOR WIDTH : - To obtain minimum design conductor width refer tables such as those in IPC - 2221, IPC-2222 for the relevant current ratings. To allow for processing effects such as pits, nicks, undercut etc, artwork track width should be drawn 0.05mm (0.002") wider for 35um (1oz) foil.

CONDUCTOR SPACING : - Refer electrical conductor spacing table as published in IPC -2221, IPC-2222 . To ensure minimum spacing allow 0.05mm (0.002") on artworks with 35um (1oz) copper.

R 1

LEGEND TO PAD

TEXT HEIGHT

THICKNESS LINES AND TEXT

LEGEND TO BOARD EDGE

Typical colours available are white, yellow and black ; and made

VIA (MASKED)

VIA (TENTED)

PAD TO RESIST

MASK TO MASK BLOCKOUTVias which are to be tented &/or filled with resist must be specified in your documentation. Note also, vias which are to be tented (covered) with solder resist, must have a maximum finished hole size no greater than 0.6mm. A unique hole size should be used for these vias so that they can be identified during manufacture.

Morris Productions uses solder resist that complies withMIL-I-46058 and meets the requirements of IPC-SM-840.Available in both liquid imageable and screen print, typicalthickness is 15-20um and 20-25 um respectively. Photoimageable solder resists are preferred for surface mountapplications. UL approved resists are also available. Typicalcolours available are green, green / yellow, and blue : other

* For further details on land size calculations refer IPC -2221 IPC-2222. This standard is also endorsed as Military Standard. Typically, web size is determined by dividing 60% of the minimum land size by the number of webs required. If a larger land size is used, the web size is reduced to allow adequate soldering dwell time. (Ensure that the web size is not thinner than the minimum

** Min. distance between conductive area and the edge of a board is calculated by adding 0.4mm to the minimum electrical clearance as determined in IPC-2221, IPC-2222. Table 6-1. For 0-100 Volts a spacing of 0.1mm is required for a PCB with internal conductors. (Thus 0.4mm + 0.1mm = 0.5mm). However, for PWR/GND to board edge a clearance of 1.27mm is preferred. It is not necessary to have a land around a pin which does not make connection to anything on that plane. If a land is placed around a component lead, it increases the chance of a short occuring if a small slither of copper bridges the land and a plane

GND AND PWRCLEARANCE PAD

PWR AND GND TO NPTH

PWR/GND TOBOARD EDGE

FIN HOLE SIZE (D) WEB

FIN HOLESIZE (D)

LANDSIZE

AIRGAP

AIRGAP

LANDSIZE

NPTH

EXTERNAL SIGNAL LAYERSFEATURE STANDARD SPECIAL* PTH - LAND SIZE * NPTH - LAND SIZE TRACK WIDTHTRK/PAD TO PAD/TRKTRK TO EDGE (min) **TRK TO NPTH (min) **

+0.50mm+0.70mm0.20mm0.20mm0.53mm0.53mm

ONAPPLICATION

0.125mm0.125mm0.53mm0.53mm

* Land-to-hole relationship is established by the following equation:

Refer to IPC-2221 Section 9.0 - Holes/Interconnections. This standard is also endorsed as Military Standard. Land size, minimum = a + 2b +c where: a = Maximum diameter of the finished hole b = Minimum annular ring requirements ( see 9.1.2)

** Min. distance between conductive area and the edge of a board is calculated by adding 0.4mm to the minimum electrical clearance as determined in IPC-2221, IPC-2222. Table 6-1. For 0-100 Volts a spacing of 0.13mm is required for a PCB with external conductors. (Thus 0.4mm + 0.13mm = 0.53mm). For 0-100 Volts a spacing of 0.10mm is required for a PCB with internal conductors. (Thus 0.4mm + 0.1mm= 0.5mm). Lands for surface mounting are covered extensively in this Standard and IPC - SM - 782A, as well as the various recommendations laid down by component manufacturers.

C

GRGR

REDRAWNREDRAWN

JFJF

GEGE

GE6.3.9510.7.98

23

125.5.92JFPL PLPLPL

A1

H

mm0

H

G

F

E E

D D

C C

B B

A A

1 2 3 4 5 6 7 8 9 10 11 12

1 2 3 4 5 6 7 8 9 10 11 12

DO NOT SCALEDIMENSIONS IN MILLIMETRES

Quality, service and fast turn around have made us leaders in the Australian Marketfor Chemically milled Solder Paste and Glue Stencils. These are available with a shim thickness range of 0.010", .008" , .006", .005" and .004"..It is strongly recommended that you contact your printed circuit board assembler to determine the desired aperture size opening, fiducial marks, mounting position and the thickness of the stencil. Morris prefers to work from Gerber Files and aperture table. The ap erture size should be the same as for the lands used on your track artwork. There is no need to reduce the size of the lands on the solder paste artwork, as Morris must reduce your artwork to allow for etch factors. If the assembler requires a smaller aperture opening than the land size used, then Morris will allow for this as well. For Gerber files, it is preferred if you create your pads as flashes ( rather than as shape fills).

Morris can provide you with the stencil only, the stencil mounted in your frame, or, the stencil mounted in a frame by us. The frame will be custom designed to your

.25

.25

.18

.18

.18

.25

35/35

35/35

18/00

18/00

35/35

35/35

35/3535/35

35/35

.25

1 x B

2 x A

1 x B

2 x A

2 x A

2 x A2 x A

8 LAYER BOARD

Foil

Foil

* SHEETSPREPREG

SHEETSPREPREG

CORETHK(mm)

CORETHK(mm)

Cu (um)PER SIDE

Cu (um)PER SIDE

.15.15

.15

.15.15

.15.15

35/35

35/35

35/35

35/35

35/3535/35

35/3535/35

35/35

.15.15

1 x B

2 x A1 x B

2 x A1 x B

2 x A2 x A

2 x A2 x A

10 LAYER BOARD

Foil

Foil

2 x A

2 x A.38 .25

.1518/00 18/00

35/35 35/35

35/35 35/35

18/00 18/00

.38 .25

.15

1 x B

6 LAYER BOARD

Foil

Foil

Conventional Build Conventional Build

Conventional Build

F

BLIND LAYER SEQ ____________BURIED LAYER SEQ ____________

These layups are for 1.6mm nominal thickness. For thicker or thinner PCB's, please contact our Sales Engineer or PCB Designer. Foil lamination uses a 0.05mm maximum thickness resin backed foil.

HOLE SIZE

PAD TO

PAD

TRACK TO PAD

TRACK WIDTH

LAND SIZE

NPTH

TRACK TO NPTHTRACK TO BOARD EDGE

TRACK TO TRACK

2.4mm +/- 0.1mm TYP ROUTER DIA

STANDARD BRIDGE METHOD

2.0 +/- 0.2mm

* Overall thickness of the board can be altered by varying the quantity & type of prepreg. Morris standard prepreg types are as follows: A = 1 piece of 1080 prepreg with an approximate finished thickness of 0.07mm B = 1 piece of 7628 prepreg with an approximate finished thickness of 0.175mm. Note - approximate finished thickness can vary with the amount of copper area.

2 x A

2 x A

4 x A

1.6mm = 0.50mm 2.4mm = 0.80mm 0.8mm = 0.16mm

V -Groove Width

BoardThickness

0.8mm

= 0.

4 +/-0

.11.6

mm =

0.5 +

/-0.1

2.4mm

= 0.

6 +/-0

.1

3.5 mm Min

0.5 mm Min

Track or Pad

0.1 max deviation

45 +/- 5

V - Groove Detail

PRINTED CIRCUIT BOARD MANUFACTURING PROCESS

FR4 SUBSTRATE(TYP. 0.71mm)

TRACK PAD

PHOTORESIST

BASE COPPERTYP. 18/35um

TRACK PAD

PHOTORESIST

REMOVE UNWANTEDCOPPER

TRACK PAD

REFER TO MORRIS' STANDARD MULTI-LAYER COMBINATIONSFOR DETAILS ON TYPICAL LAYUPS USING MATERIALS COMMONLY HELD IN STOCK.

AFTER PRESSING AND TRIMMING OF THE BOARD, THE MANUFACTURING PROCESS IS THE SAME AS FOR DOUBLE SIDED BOARDS.

4 LAYER BOARDAS EXAMPLE

FR4 SUBSTRATE(TYP. 0.71mm)

18um Foil

18um Foil

PREPREG (0.35mm)

PREPREG (0.35mm)

ELECTRICAL TEST

- LAMINATE DRY FILM (PHOTO SENSITIVE RESIST)

- PUNCH REGISTRATION HOLES

- IMAGE (EXPOSE WITH NEGATIVE PHOTOTOOL)

- DEVELOP

- REMOVE UNWANTED COPPER

- INSPECT ( Q.C)

- REMOVE PHOTO RESIST

- VISUAL INSPECTION

- BLACK OXIDE (IMPROVES ADHESION AT BONDING STAGE)

- CONDITION ( REMOVE MOISTURE)

- ALL LAYERS LAID TOGETHER, INTER- LEAVED WITH PREPREG, MOULD RELEASE FILM AND PRESS PLATES.

- HIGH PRESSURE/ TEMPERATURE VACUUM CURING CYCLE - CONTROLLED COOLING CYCLE

IMAGEINNER LAYER(S)

ETCHINNER LAYER(S)

STRIP DRY FILMINNER LAYER(S) LAY-UPPRESSING

PREPARATION

MULTI- LAYER BOARDS ONLYCUSTOMER

PREFERRED INPUTS NEEDED

- GERBER FILES

- PROTEL PCB FILE

- 1:1 PHOTOPLOTS - MANUFACTURING DRAWINGS SHOWING ALL DIMENSIONS & SPECIFICATIONS - DIMENSIONED OUTLINE DRAWING

- NC DRILL AND ROUT FILES

- TECHNICAL STANDARDS (DESIGN RULES USED)

ACCOUNTS SUPPLIERSSTORE

MATERIAL ISSUE

MATERIALCUT

PRODUCTIONTOOLING NORMALISE

MATERIALSPURCHASING

ENGINEERINGPLANNING

ORDER ACCEPTANCE

PCB DESIGN

- CHECK CUSTOMER DOCUMENTATION, DATA, GERBER FILES / ARTWORK SPECIFICATIONS

- PERFORM DESIGN RULE CHECKS

- STEP UP ARTWORK TO DESIRED FORMAT SIZE

- PRODUCE DRILL AND ROUT FILES

- PRODUCE ELECTRICAL TEST JIG FILES - PREPARE WORK INSTRUCTIONS

- CHECK REGISTRATION

- ENSURE DRILL PATTERN ON TEST BOARD MATCHES ARTWORK

- ADD VENTING, LOGOS CODING ETC.

- PREPARE FINAL NC TOOLING FILES

- ENSURE ARTWORK MEETS MANUFACTURING REQUIREMENTS

- GENERATE PRODUCTION

- PROVIDES STRESS RELIEF AND AIDS DIMENSIONAL STABILITY

- SPECIFIED MATERIAL CUT TO REQUIRED FORMAT SIZE

- EG. BURIED VIAS

SCREEN PRINTLEGEND

ELECTRICAL TEST

PROFILING DESPATCHFINAL

ACCEPTANCETESTING

- Q.C

- LAB TEST

HOT AIR LEVEL (SMOBC) PROCESS

COMPONENT HOLE0R VIA

NPTH (LANDLESSOTHERWISE 2ND DRILLING)

DEPOSITION OFELECTROLESS COPPER NOM. THK 2.0 um

PHOTO RESIST

DRY FILMTENTS(COVER) NPTH

TIN/LEAD OVER COPPER

PHOTO RESIST AND UNWANTED COPPERREMOVED

DRILLING HOLE PREPARATION

- HIGH PRESSURE WATER RINSE

- VISUAL CHECK

- DESMEAR/ ETCHBACK

FIRST COPPERPLATE

- CHEMICAL DEPOSITION OF COPPER TO ALL DRILLED HOLES

- 1ST COPPER PLATE

- LAB TEST

IMAGE

- LAMINATE DRY FILM (PHOTO SENSITIVE RESIST)

- IMAGE (EXPOSE WITH POSITIVE PHOTOTOOL)

- DEVELOP

- INSPECT (Q.C)

SECOND PLATE

- 2ND COPPER PLATE (BUILD UP COPPER TO FINAL THICKNESS)

- TIN/LEAD PLATE

- LAB TEST

STRIP DRYFILM

- REMOVE PHOTO RESIST

- VISUAL INSPECTION

ETCH

- REMOVE UNWANTED COPPER (TIN/LEAD PROTECTS COPPER PATTERN)

NOTES. 1: LAB TEST INCLUDES ALL TESTS THAT ARE REQUIRED TO PROVE PROCESS CAPABILITIES, BUT ALSO THOSE TESTS (SUCH AS MICROSECTIONS), AND DOCUMENTATION NEEDED TO MEET CUSTOMER REQUIREMENTS INCLUDING IPC CERTIFICATION LEVELS AND MILITARY SPECIFICATIONS.

2 : THE PROCESSES SHOWN IN THIS DIAGRAM ARE TYPICAL OF MOST PCB MANUFACTURERS. PLEASE CHECK WITH YOUR MANUFACTURER WITH REGARD TO SPECIAL REQUIREMENTS.

CLEAN REFLOW SOLDER SOLDER MASK

STRIP SOLDEREDGE CONTACTS

INSPECT

NI/GOLD PLATE EDGE CONTACTS

- LAB TEST

REFLOW SOLDER PROCESS

LEGEND

PHOTO RESIST

SOLDER RESIST

ELECTROLESS NICKEL / GOLD

TIN/LEAD

COPPER

DOUBLE SIDED AND MULTI-LAYER BOARDS

SOLDER REMOVED

SOLDER RESIST

SELECTIVE SOLDER

NI/GOLD PLATE EDGE CONTACTS

SCREEN PRINTLEGEND

STRIP SOLDEREDGE CONTACTSHOT AIR LEVEL

- SOLDER APPLIED TO BARE COPPER (PADS, VIAS ETC) - Q.C

- LAB TEST

STRIP SOLDER SOLDER MASKINSPECT CLEAN

- PHOTOIMAGEABLE SOLDER MASK

- LAB TEST

NICKEL / GOLD

ELECTROLESSNICKEL / IMMERSION

GOLD

SOLDER REMOVED

SOLDER RESIST

STRIP SOLDER SOLDER MASKINSPECT CLEAN

- PHOTOIMAGEABLE SOLDER MASK

ELECTROLESS NICKEL / IMMERSION GOLD PROCESS

Morris Productions employs advanced, flexible and fully integrated Bare Board testing systems.

Viking Digital Bed of Nails Testing Probot - Flying Probe Testing

To aid our Pre-production Engineers the designer should ensure that the following is adhered to : - - finished hole size should be specified rather than drill size- via hole size typically fall in the range of 0.3 to 0.7mm( via holes < 0.2mm should be avoided to ensure hole integrity)- if via hole size is < 0.2mm then land size should equal 0.5mm- aspect ratio should not exceed 1:8 ie. finished hole size divided by board thickness (Refer IPC - 2221, IPC - 2222)- preferred format for drill files is ASCII 2,4 inch leading zero's but will accept other formats (please specify)- separate drill fil es for Plated and Non-plated holes- number of different drill sizes should be minimised, but there are no limits on the number of drill changes

It is common for PCB's to have a mix of Plated(PTH) and Non-plated holes(NPTH). To aid in the positional tolerance of PTH to NPTH, drilling can be done in one operation. It is then necessary to tent (cover) the NPTH with photo- sensitive film during processing. There must be sufficient surface area around the NPTH for the tent to hold so it is important to have no land around the hole nor should there be any copper pattern within 2 x the diameter of the hole. Maximum hole size for tenti ng NPTH is 4.5mm. If these design rules are not met, 2nd drilling will be necessary .

- the smallest rout bit diameter should be equal to or greater than the board thickness- rout bit tolerance(+/-0.1mm) should be taken into consideration when determining finished board size especially panelised boards- if panelised then breakout point positioning and number must taken into consideration to aid in the mechanical strength of the PCB. Typically the distance between breakouts is 50 - 80 mm. Refer to drawing below.- preferred router bit size is 2.0mmMorris stocks a full range of both drill and router bits.Stock drill bit sizes range from : 0.35 to 3.20mm in 0.05 increments and 3.30 to 6.5mm in 0.10 increments.Stock rout bit sizes range from : 0.8, 1.0, 1.2, 1.5, 1.6, 1.8, 2.0, 2.4, 3.0 & 3.175mm.Other sizes available on request.

Holes greater than 6.50mm are either stitched drilled, hand machined or routed, and preferably nonplated.

Morris Productions has a committment to Quality. As a means of continuous improvement in our manufacturing and technical capibilities Morris has gained the following certifications:

Quality Management Systems - AS/NZS ISO9001: 1994 (Certified by LRQA)Scope - "Design and Manufacture of single, double sided and multilayer printed circuit boards".Certification Number : 926131

Laboratory (N.A.T.A certified)Registration Number : 365

Underwriters LaboratoriesUL approval to MP194V-0 and MP-2

Morris can provide customers with a range of Quality Assurance Certifications dependent on need.Certificates of Conformance can be attained to customer's own specification, IPC-6011, IPC -6012or Military Standards such as MIL-P-55110D. Microsectioning is the means by which Quality Assurance can be tested but requires the destruction of a good board. Rather than destroying a good board, Test Coupons (refer IPC-2221, IPC -2222 Section 12.4.3.1) positioned alongside and/orbetween pairs ( or as a "popout" within the board outline) will exhibit all the basic qualities of theproduction board. Tests and Inspections that can be carried out are as follows:-

DESIGN AND FABRICATION TABLE

HOLE SIZE NPTH HOLES PTH HOLES

SYMBOL

QUANTITY

TOLERANCEON HOLESIZE

0 TO 0.80.81 TO 1.61.61 TO 5.0

+ / - 0.03+ / - 0.05+ / - 0.08

+ / - 0.05+ / - 0.05+ / - 0.10

TYPESIZE (FIN)

HOLE DATA

DESIGN SERVICE

SOLDER PASTE STENCILS

QUALITY ASSURANCECertifications

Conformance Testing

Pre-production Integrity Checks

DRILLING, ROUTING & V-GROOVEDrill Design Rules

Tenting (NPTH)

Rout Design Rules

Typical routing breakout methods

Board Dimensions* Min Size = 80 x 80mm Max Size = 400 x 400mm* - not applicable to panelised boards

TolerancesV-Groove depth = +/- 0.1mmV-Groove to V-Groove = +/- 0.2mmV-Groove to Board Edge = +/- 0.2mm

2.5 +/- 0.2mm

5.0 +/- 0.2mm

4 NPTH HOLES0.6 to 0.8 DIA

EQUALLY SPACED0.8 +/- 0.1mm0.5

+/-

0.1m

m

2.4mm +/- 0.1mm TYP ROUTER DIA

INTERNAL BREAKOUT METHOD

Capabilities - testing to known good board or netlist - analyse and create netlist for PCB's upto 24 layers - high complexity designs - Fine Pitch SMD to 0.5mm pitch and below - high volume work - Fault Finding capability for Netlist Testing - Simultaneous Double sided Testing

Capabilities - netlist testing - analyse and create netlist for PCB's upto 24 layers - high complexity designs - Fine Pitch SMD to 0.25mm pitch and below - low volume work - high speed discharge test - Ball Grid Array - Fault Finding capability for Netlist Testing

Test Parameters

Test Method - Analogue Voltage Test - 0.5 to 500 VDC (programmable)Resistance Tests - 1Ohm to 500MOhms (programmable)

Card Size (Maximum) - 863 x 609mm

Test Parameters Test Method - 12 volt digitalVoltage Test - 12 voltResistance Test - breakpoint 70 kOhms

Card Size (Maximum) Single Sided Test - 488 mm x 406mm Double Sided Simultaneous Test - 325mm x 244mm (Top)

* SHEETSPREPREG

* SHEETSPREPREG

CORETHK(mm)

CORETHK(mm)

Cu (um)PER SIDE

Cu (um)PER SIDE

* SHEETSPREPREG

SHEETSPREPREG

CORETHK(mm)

CORETHK(mm)

Cu (um)PER SIDE

Cu (um)PER SIDE

RECOMMENDED MULTILAYER LAYUP COMBINATIONS

LEGENDFEATURE MINIMUMLINE THICKNESSTEXT THICKNESSTEXT HEIGHTLEGEND TO PADLEGEND TO EDGE

0.15mm0.15mm1.00mm0.25mm0.25mm

SOLDER RESISTFEATURE STANDARDPAD TO RESIST:- (LIQUID PHOTOIMAGEABLE) (EPOXY SCREEN PRINT)MASK TO MASK BLOCKOUT

0.05mm (min)0.25mm0.15mm

INTERNAL POWER AND GROUND LAYERSFEATURE STANDARD SPECIALLAND SIZE * D<=3.0mm(Fin Hole D+) D>=3.0mmCLEAR. PAD *D<=3.0mm(Fin Hole D+) D>=3.0mmWEB (CONDUCTOR) *AIR GAPPWR/GND TO BRD EDGE **PWR/GND TO NPTH **

+0.50mm+0.55mm+0.90mm+1.00mm0.25mm0.25mm1.27mm0.50mm

ONAPPLICATION

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0.50mm

INTERNAL SIGNAL LAYERSFEATURE STANDARD SPECIAL* PTH - LAND SIZE

TRACK WIDTHTRK/PAD TO PAD/TRKTRK TO EDGE (min) **TRK TO NPTH (min) **

+0.50mm

0.20mm0.20mm0.50mm0.50mm

ONAPPLICATION

0.125mm0.125mm0.50mm0.50mm

DESIGN INFORMATION

ARTWORK REQUIREMENTS

BARE BOARD TESTING

Artwork Design Rules

2 x A

.2518/00 18/00

35/35 35/35

18/00 18/00

.71

Foil

Foil

.50

.25

2 x A

4 LAYER BOARD

G

Foil Lamination (Preferred)

Foil Lamination (Preferred) Foil Lamination (Preferred)

Foil Lamination (Preferred)* SHEETSPREPREG

* SHEETSPREPREG

CORETHK(mm)

CORETHK(mm)

Cu (um)PER SIDE

Cu (um)PER SIDE

Conventional Build

2 x B

2 x B

18/00

18/00

Handling & Storage of PCB's