nvidia’s experience with open64

NVIDIA’s Experience with Open64

Mike Murphy

NVIDIA

© NVIDIA Corporation 2008

Outline

Why Open64How we use Open64 What we did to Open64Future work in Open64

© NVIDIA Corporation 2008

Compiling CUDA for GPUs

NVCC

C/C++ CUDAApplication

GPU Code CPU CodeGPU Code

executable

© NVIDIA Corporation 2008

Why Open64

We had a low-level code generator for graphics codes, but for CUDA needed high-level optimization for C/C++ codes.

own gcc open64

© NVIDIA Corporation 2008

Why Open64

We had a low-level code generator for graphics codes, but for CUDA needed high-level optimization for C/C++ codes.

own gcc open64

take too long

© NVIDIA Corporation 2008

Why Open64

We had a low-level code generator for graphics codes, but for CUDA needed high-level optimization for C/C++ codes.

own gcc open64

take too long good long-term support

© NVIDIA Corporation 2008

Why Open64

We had a low-level code generator for graphics codes, but for CUDA needed high-level optimization for C/C++ codes.

own gcc open64

take too long good long-term support

best performance

(kudos to PathScale)

© NVIDIA Corporation 2008

NVCC processing of GPU codecudafe

C code for GPU

nvopencc (Open64)

ptx

OCG

object code

© NVIDIA Corporation 2008

Changes: Rehosting Open64

Our compiler has to run on 32 & 64bit Linux, 32 & 64bit Windows, and Mac OS.Main Open64 source tree is only for Linux.

This is an area where sharing our changes can help grow the user base by making it easier to port Open64.

For Windows we build using Cygwin’s MINGW

© NVIDIA Corporation 2008

Changes: Memory and registers

We don’t have a stack or fast memoryTherefore want to keep data in registersInline everything and optimize as much as possibleTry to keep small structs in registers by expanding struct copies into field copies (versus taking address and generating loop to do byte copy)

© NVIDIA Corporation 2008

Changes: Vector loads and stores

Coalesce adjacent loads and stores for performanceDo this in CG:

Iterate through ops, trying to add to vectorsCheck for intervening killsChange alignment and use dummy regs for padding if helps to create wider vector (e.g. may use 4-word vector for 3-word struct).

© NVIDIA Corporation 2008

Changes: 16bit optimization

Cheaper to use 16bit registers and operationsBut C converts shorts to int.So add pass in CG that converts back to 16bit:

Mark 16bit loads, stores, and convertsPropagate 16bit-ness forwards and backwardsUnmark 16bit-ness if cannot be 16bitChange remaining registers and instructions to be 16bit.

© NVIDIA Corporation 2008

Future work

1 person -> 4 people working with Open64New application TBAMerging changes into trunk

Thanks to Sun Chan and Shin!Investigating register pressure in WOPT

Want better control of register pressure during optimization

Investigating using other features (LNO, IPA, etc)

© NVIDIA Corporation 2008

Questions?

http://www.nvidia.com/CUDA

mmurphy@nvidia.com