minimizing linewidth roughness in step and flash imprint...
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Minimizing Linewidth Roughness in Step and Flash Imprint Lithography
Niyaz Khusnatdinov, Gerard M. Schmid, Cynthia B. Brooks, Dwayne LaBrake, Douglas J. ResnickMolecular Imprints, Inc., 1807C West Braker Lane, Austin TX 78758
Mark W. Hart, Kailash Gopalakrishnan, Rohit Shenoy, Ron JihIBM Almaden Research Center, 650 Harry Road San Jose, CA 95120-6099
Ying Zhang, Edmund Sikorski, Mary Beth RothwellIBM Thomas J. Watson Research Center, 1101 Kitchawan Road, Route 134Yorktown Heights, NY
10598-0218
Jordan Owens, Arnie FordSematech ATDF, 2706 Montopolis Drive, Austin, Texas 78741-6499
dresnick@militho.com
Line Width Roughness
4Line Width Roughness (LWR) (nm, 3σ)– Variation of CD– Leads to variation of MOS gate width– Affects device speed of individual transistors– Leads to IC timing issues
0.81.21.72.43.4LWR
1622324565DRAM½ Pitch
20192016201320102007
ITRS Roadmap
Future nodes have no known solutions
Where is the industry with respect to the roadmap?
Where is the industry with respect to the roadmap?
An Example: EUVL
4 For S-FIL®, the imprint process adds no additional LWR4 The problem of LWR is transferred to the fabrication of the template
? Insensitive resists? Non-chemically amplified resists
LWR ~ 8 nm*
ZEP520A
4Throughput requirements of EUVL require 4 the use of fast chemically amplified resists
– Low exposure dose:– Too few photons (~2/nm2)– Shot noise– Material issues:– Acid Diffusion, PAG Concentration, Quenching, etc.
*SPIE 2007
Template Fabrication
4LWR from a template fabricated with a CA resist (imprint results)4LWR generated from ZEP520-based templates
– 30nm semi-dense features: imprints and etched features– 42nm dense features: imprints and etched features– 32nm dense features: template images, imprints and etched features– Extendibility to 26nm half pitch
4Summary
Resist appliedto ~10 nm of Cr
Expose/develop e-beam resist, descum
Etch chrome,strip resist
Etch quartz,Strip chrome
6025 Quartz
ResistCr
E-beam Exposure Cl2/O2 Fluorine based chemistry
LWR from a template fabricated using a CA resist
1.893scale, nm / pixel
3.785profile sampling step, nm
8176.637total line length, nm
-90.800line orientation, degree
4line number
-12.867sigma inf <3s >
2.509185.884pitch
0.7418.369right LER <3s >
1.1675.965left LER <3s >
1.37111.272LWR <3s >
2.01894.933line width
standard deviation, nmmean, nmparameter
90nm HP
Imprinted 90nm lines
CA resist sensitivity: ~ 11 µC/cm2
0.60 electrons/nm2
LWR = 11.3nm, 3σ
CA resist sensitivity: ~ 11 µC/cm2
0.60 electrons/nm2
LWR = 11.3nm, 3σ
30nm Semi-dense Template patterns: DetailsDevice structures:
*20nm features not writtenSEM structures:1:1 L/S, 1:3 L/S†1:1 L/S start at 50nm
1:1 L/S
1:3 L/S
Device structures: 1fin, 2fin
1:3 L/S
20nm*
30nm
40nm
50nm†
60nm
70nm
80nm
30 to 70nm
30 to 70nm
30nm Semi-Dense Features for IBM Storage-Class Memory Test Structures
BOx
Si
Ox
Template Imprint
X-Section of Processed FinsEtched SOI Fins
ZEP520A
30nm Device: Imprint LWR Analysis
30 nm Vertical Device
parameter mean st.dev.
Line Width, nm 40.807 1.273
LWR <3s>, nm 2.43 0.153
Line Space, nm 82.706 1.738
Pitch Left, nm 123.497 2.935
Pitch Right, nm 124.158 1.316
LER Left <3s>, nm 2.68 0.244
LER Right <3s>, nm 2.416 0.375
100nm
0
0.2
0.4
0.6
0.8
1
1.2
0 50 100 150 200 250 300 350 400
X, nm
Nor
mal
ized
Hei
ght
SEM LWR Analysis: After Etch
40nm field #11
LWR 2.05 1.79 2.4LER 1.01
30nm field #6
LWR 1.91 2.15 2.56LER 1.76
30nm Device: LWR After Etch
Data for Wafer #1 and Wafer #25
30
35
40
45
50
0
0.5
1
1.5
2
2.5
3
3.5
4
0 2 4 6 8 10 12 14 16
CD-1 (nm)
CD-25 (nm)
LWR-1 (nm)
LWR-25 (nm)
Crit
ical
Dim
ensi
on (
nm)
LWR
(nm)
Line Number
LWR = 2.61nm
• LWRimprint = 2.43nm, 3σ
• LWRetch = 2.61nm, 3σ
• Both CD and LWR track fromone wafer to the next:
CD correlation: 0.928LWR correlation: 0.528
40nm Device: LWR After Etch
45
50
55
60
65
0
0.5
1
1.5
2
2.5
3
3.5
4
0 2 4 6 8 10 12 14 16
CD40-1
CD40-25
LWR40-1
LWR40-25
Crit
ical
Dim
ensi
on (n
m)
LWR
(nm)
Line Number
Data for Wafer #1 and Wafer #25
• LWRimprint = 2.43nm, 3σ
• LWRetch = 2.62nm, 3σ
• Both CD and LWR track fromone wafer to the next
CD correlation: 0.907LWR correlation: 0.954
LWR = 2.62nm
Radial Etch Dependence Wafer #25: 30nm and 40nm
Radial Dependence of 30 nm and 40 nm Devices on Wafer #25
y = 0.0462x + 45.996
y = 0.0403x + 30.816
0
10
20
30
40
50
60
0 20 40 60 80 100
Distance from wafer center (radius), mm
CD
, nm
42nm Half Pitch: Imprint thru Etch
CD 41.3.nm 39.3nm 40.7nm 38.4nmLWR 2.8nm 2.5nm 2.7nm 2.9nm
Imprint Descum Oxide Etch Clean
2.172.542.042.082.402.462.412.04LER Right <3s > nm
2.992.002.812.292.502.302.332.47LER Left <3s > nm
3.112.643.132.782.722.343.212.36LWR <3s > nm
41.4341.7940.3441.4341.1341.0441.6741.16Width med, nm
44.5744.5443.3844.0243.7943.7945.0043.17Width max, nm
39.0439.3437.6238.1938.6939.0338.8038.79Width min, nm
87654321Results / Line
Imprint Statistics1 2 3 4 5 6 7 8
32nm HP: Template Images
32nm 36nm
40nm 44nm
Template: CD and LWR Analysis
parameter mean standard deviation
Line Width, nm 31.886 0.518
LWR <3s>, nm 3.121 0.409
sigma inf <3s>, nm 3.510 -
Line Space, nm 32.149 1.121
Pitch Left, nm 64.136 1.003
Pitch Right, nm 63.878 1.240
Slope Angle Left, degree 96.029 0.673
Slope Angle Right, degree 96.117 0.645
LER Left <3s>, nm 4.326 0.447
LER Right <3s>, nm 4.074 0.368
32nm
30
32
34
36
38
40
42
44
46
0
1
2
3
4
5
6
7
8
30 32 34 36 38 40 42 44 46
Measured CD (nm)
LWR (nm)
Coded CD (nm)
4 CD is linear from 32 to 44nm (to within about 5%)4 LWR is small, and independent of critical dimension
32nm Imprint Evaluation
4 Imprints #1 and #2 are taken from the same location
4 Imprint #3 is located 2mm from Imprint #1
32nm
Template: LWR = 3.1nm
#1
#2
#3
32nm Imprint Evaluation
4 CDmean = 34.72nm, 1.62nm 3σ4 LWRImprint = 2.73nm, 3σ (LWRTemplate = 3.12nm)
2.60LWR <3s > nm
0.4935.24Line Width, nm
σmeanparameter
3.054LWR <3s > nm
0.3634.246Line Width, nm
σmeanparameter
2.549LWR <3s > nm
0.3534.554Line Width, nm
σmeanparameter
28nm Half Pitch Imprints
-5.446sigma inf <3s >, nm
3.598LWR <3s >, nm
1.35729.453Line Width, nm
standard deviationmeanparameter
26nm Half Pitch Imprints
1.45252.605Pitch Left, nm
1.19432.037Line Space, nm
-3.740sigma inf <3s >, nm
3.150LWR <3s >, nm
0.66520.524Line Width, nm
std deviationmeanparameter
3.363.183.623.113.053.062.64LWR, 3s nm
20.2720.7521.5820.9320.2120.0019.95Width med nm
22.6522.8724.8523.7922.1122.4621.76Width max nm
17.2817.9119.3019.3417.4917.6617.66Width min nm
7654321Results / Line
LWR Summary
4To a first approximation, LWR is independent of CD, pattern density, and process step
4 Total # lines measured: 1304 LWRmean = 2.87nm4 LWRmin = 1.70nm4 LWRmax = 4.39nm4 3σ = 1.71nm
0
1
2
3
4
5
15 20 25 30 35 40 45 50
TemplateImprintEtchFit
LWR
(nm
)
Measured CD (nm)
Conclusions
4 Low values of LWR can be obtained. The key is to use high resolution and slow electron beam resists, such as ZEP520A when writing thetemplates
4 LWRs less than 3nm, 3σ are routinely obtained. Feasibility for obtaining LWRs < 2nm has been demonstrated
4 Low LWR is maintained through etch, and for features as small as 20nm
NEXT STEPS
4 Better characterization of LWR after exposure and development of the e-beam resist
4 Extending the study to VSB pattern generators
Acknowledgments
The Authors gratefully acknowledge the templates and imprints provided by:
DNPHoya
ToshibaThe authors would also like to thank S.V. Sreenivasan
and Mark Melliar-Smith for supporting this work
This work was funded in part by NIST-ATP
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