lab4: interrupt handling...more info needed? •check the data sheetfor moreinformation...
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Lab4: Interrupt Handling
Lund University / Electrical and Information Technology / 1
Goal
• Understand how to use interrupts
• Enable/Disable interrupts in the processor
• Write interrupt service routines
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Programmed I/O
• Polling– CPU repeatedly checks if the device I/O is ready– Many clock cycles are wasted
Check if any of the pushbuttons are pressed or released
When can polling be a problem?
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Interrupts
• External events that need immediate attention from the processor
• Processor receives interrupts through its interrupt request lines• Processor can enable/disable interrupts• When an interrupt occurs and interrupts are enabled:
– Allow the current instruction to complete its execution– Store the address of the next instruction to be executed
(return address) in a dedicated register– PC is loaded with the memory address of a particular
routine, i.e. interrupt service routine (interrupt handler)
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Interrupts
• External events that need immediate attention from the processor
• Processor receives interrupts through its interrupt request lines• Processor can enable/disable interrupts• When an interrupt occurs and interrupts are enabled:
– Allow the current instruction to complete its execution– Store the address of the next instruction to be executed
(return address) in a dedicated register– PC is loaded with the memory address of a particular
routine, i.e. interrupt service routine (interrupt handler)
Why are interrupts
important?
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Example I: Lower CPU load
Source: MSP430 Advanced Technical Conference 2006
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Example II: Simple System Wake-up Controller
Source: Simple RTC-Based System Wake-up Controller Using MSP430™ MCUs
• A sensor should measure for example temperature in a fixed time intervall
• Your microcontroller only needs to process data for a fraction of a second every minute
• Running the microcontroller on full power continuously would be a waste of time
• What could you do?
1. Lower clock frequency (not efficient)2. Put your microcontroller to sleep
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Example II: Simple System Wake-up Controller
Source: Simple RTC-Based System Wake-up Controller Using MSP430™ MCUs
• In order to save energy and ensure long battery-life– Run your program as fast as possible– Let the microcontroller sleep (different modes available)
• Depending on sleep mode more units turned off• Here, enter low-power mode 3 (LPM3) of MSP430
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Example II: Simple System Wake-up Controller
Source: Simple RTC-Based System Wake-up Controller Using MSP430™ MCUs
• In order to save energy and ensure long battery-life– Run your program as fast as possible– Let the microcontroller sleep (different modes available)
• Depending on sleep mode more units turned off• Here, enter low-power mode 3 (LPM3) of MSP430
Interrupts help to reduce
power consumption and
increase battery life
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Interrupt Service Routine
• Update the stack pointer• Store all registers (incl. status register) on the stack• Service the interrupt• Restore the registers• Return from interrupt
– Stack keeps the return address
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AVR interrupts I
• Single interrupt request line• Status Register globally enables/disables interrupts
– Global Interrupt Enable (Bit 1)
– If GIE is set to ‘1’ interrupts are enabled– If GIE is set to ‘0’ interrupts are disabled
• Cleared by hardware after interrupt has occurred and set by RETI
• May be set/cleared using SEI and CLI instructions
07
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AVR interrupts II
• Internal Interrupts– Generated by internal peripheral devices
• Timers• USART, SPI• ADC, analog comparator
• External Interrupts– External signals connected to uC
• Optosensors• Buttons
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External Interrupts
• Multiple external input interrupt request lines– INT0 … INT2 (can be edge triggered)– PCINT0 … PCINT31– Both ports with dedicated
registers
AVR uCINTERRUPT
CONTROLLER
Device 1INT 0
INT 2
PCINT 0
PCINT 31
Device 3
Device 4
Device 35
…
Registers
Device 2INT 1
PCINT 2Device 3
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External Interrupt Controller- Registers
• External Interrupt Control Register A (EICRA)• External Interrupt Mask Register (EIMSK)• External Interrupt Flag Register (EIFR)• Pin Change Interrupt Control Register (PCICR)• Pin Change Interrupt Flag Register (PCIFR)• Pin Change Mask Register (PCMSK0-PCMSK3)
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PCICR:Pin Change Interrupt Control Register
• Bits 7:4 Reserved• Bit 3: Enable interrupts on PCINT31 – PCINT24• Bit 2: Enable interrupts on PCINT23 – PCINT16• Bit 1: Enable interrupts on PCINT15 – PCINT8• Bit 0: Enable interrupts on PCINT7 – PCINT0
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PCIFR:Pin Change Interrupt Flag Register
• Bits 7:4 Reserved• Bit 3: Interrupt detected on PCINT31 – PCINT24• Bit 2: Interrupt detected on PCINT23 – PCINT16• Bit 1: Interrupt detected on PCINT15 – PCINT8• Bit 0: Interrupt detected on PCINT7 – PCINT0
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PCICR:Pin Change Mask Registers
• Select whether pin change interrupt is enabled on respective I/O pin
• Set à enabled• Cleared à disabled
…
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Pin Change Interrupts overview32 bits
PCINT31-PCINT24 PCINT23-PCINT16 PCINT15-PCINT8 PCINT7-PCINT0
PCMSK3 PCMSK2 PCMSK1 PCMSK0
PCICR PCIFR
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Interrupt Vectors • Whenever interrupt is detected the processor pushes PC
onto stack and jumps to a predefined address in program memory
Internal External
Hig
her P
riorit
y
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Lion’s Den Connections
INTERRUPT CONTROLLER
INT 0
INT 2
PCINT 22 Registers
INT 1
PCINT 23
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Programming Sequence
1. Set global ”interupt enable bit”2. Set bits in corresponding ”Pin Change Interrupt Control
Register” (PCICR)3. Set bits in corresponding ”Pin Change Mask Register”
(PCMSK)4. Write your interrupt service routine PCINTx (x depending on
which pins are used)5. Inside your ISR you can implement different logic based on
which bit in PCINT is set
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More info needed?
• Check the data sheet for more information– Chapter 10: Interrupts– Chapter 11: External Interrupts– 5.7: Reset and Interrupt handling
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