juha-pekka soininen systems on chip workshop villach, austria, 17.9.2001 1 part v: a noc design...

1Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Part V:A NOC Design Methodology

Juha-Pekka Soininen

VTT Electronics

Oulu, Finland

NOCARC project

2Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Background of the presentation

• Mission: – How to develop a system that uses 1 billion transistor capacity effectively

in 2007-2010

• Maturity of design methodology:– 2nd guess on how NOC based systems should be developed

• Related methodologies:– distributed systems

– parallel processing systems

– systems on chip and ASIC design

3Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Outline

• Existing design flows• NOC concept

– Capacity considerations

– Application characteristics

• NOC design challenges• NOC design methodology

– NOC layers

– Development flow

– System services

– Architecture design problems

– Application development problems

• Conclusions

4Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Resource development

Fun

ctio

n d

evel

opm

ent

System exists

monitoring

estimation

cosimulation

benchmarking

performanceanalysis

simulation emulation

prototyping

profiling

performancesimulation

mappability estimation

synthesis

design

capacity estimation

modelling

mathematicalanalyses

workloadanalysis

complexityanalysis

System does not exist

Design Flow Space

5Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Extremely short introduction to existing design flows

• Algorithm on Chip (AoC)– ASIC design flow

– FPGA design flow

• System on Chip (SoC)– Codesign flow

– IP based design flow

– Platform based design flow (Resources on Chip, RoC)• Configuration design flow • Software design flow

6Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Resource development

Fun

ctio

n d

evel

opm

ent

Chip exists

simulation emulationprofiling synthesis

HW design

modelling

mathematicalanalyses

complexityanalysis

System does not exist

AoC Design Flow

Algorithms exists

Algorithm design

feasibility studies

changes into functionality

7Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Resource development

Fun

ctio

n d

evel

opm

ent

System exists

monitoring

cosimulation

simulation emulation

prototyping

profiling

mappability estimation

synthesis

modelling

mathematicalanalyses

workloadanalysis

System does not exist

CoDesign Flow

SW/HW partitioning

capacity estimation

8Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Resource development

Fun

ctio

n d

evel

opm

ent

System exists

monitoring

cosimulation

emulation

prototypingmappability estimation

modelling

mathematicalanalyses

workloadanalysis

System does not exist

IP Based Design

Architecturetemplate

estimation

IP block integration

capacity estimation

9Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Resource development

Fun

ctio

n d

evel

opm

ent

System exists

SW design

modelling

System does not exist

Software Design

Computer exists

monitoring

estimation

benchmarking

prototyping

performancesimulation

Computer design

performance analysis

RTOS services

10Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

10 computers

10 c

ompu

ters

Capacity of Network on Chip

Average SoC design 1 million gates1 billion transistors 250 million gates1 NoC > 200 SoCs

1 GHz clock with RISC computer 1000 MIPS performance

1 NOC capacity 100-10000 GIPS

Applicability of capacity is limited by communication

11Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

“Applications” for NOC

• Multistandard terminal • Next generation base station • Simulation of human brain• Virtual reality creation• Telepresence• Holodeck (Star Trek)• Purpose of Life (Hitch Hikers Guide to

Galaxy)• Simulation of universe• Commercial operating system :-)

Piece of cake

Realistic applications

Maybe not even for NOC

Real challenges for every archtitecture

12Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Application characteristics

NOC capacity will be shared by several simultaneous applications

NOC must be adaptable to different workload patternsDifferent applications have

very different requirement profile

Presentation

Search

Analysis

Communication

Computation

Storage

Communication

Stream-based processing

Parallel processing

tn tn+p

Real-time processing

13Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Network on Chip alternatives

NOC = Network of computation and storage resources

NOC parameters: Number of resourcesTypes of resources

GPUDSPMemoryConfigurable HWCoprocessorsAny combination

Communication capability

14Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Network on Chip alternatives

Regions are used to encapsulate application requirements

Parallel high-performance datapaths

WCDMA bit-stream processing

OFDM bit-stream processing

Data compression, encryption,decompression, decryption

15Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Network on Chip alternatives

Memory area

Memorymanagement

Applications

DATABASENOC

16Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Network on Chip alternatives

Parallel processing engine

IO

17Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

NoC SoC

NOC design challenges

Physical limits -> Architecture basics -> GALS -> Communication principles

Application requirements -> Region concepts ->Heterogenuous resources types -> Multilanguageand method design flows

Overall complexity -> Architecture reuse -> Platform type of design flow

Overall complexity -> Basic control principles -> System services

Manufacturability problems -> Structured approach

18Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Performance

CostVariability

SystemQuality

Capacity

Energyconsumption

Implementation

Development

ModifiabilityVolume

Flexibility

Complexity

Functionality

Modularity

Cohesion

Coupling

Configurability

Programmability

Applicability

StructuralFunctional

Control

LifetimeManufacturability

Usability

EffortTimeRisk

MaterialsLicencingProduction

ComputationStorage

CommunicationFault toleranceResult quality (accuracy)Responsiveness

ScalabilityEfficiencyUtilisation

Figure of Merit for NOC based systems

19Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Basic requirements for NOC design methodology

• Reuse– of intellectual property blocks

• best performance/energy ratio• best mapping to application characteristics

• Reuse– of hardware (and architecture)

• best complexity/cost and performance/cost ratio• only way to even dream of achieving time-to-profit requirements

• Reuse– of design methods and tools

• only way to deal with heterogenuous application set

20Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

NOC Design Methodology

Generic backbone

NoC system

Optimised Virtual ComponentsDefinition of NOC platform

Optimised Intellectual Property

Features

Applications

Algorithms

Cores

Memories

Accelerators

Instantiation of NoC platform

Code and configuration

“Application area specific IPR”

Product area specific platform

“Product specific IPR”

Communicationstructure

Processors and hardware

21Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Communication

Structural layers of NOC

Regions

Resources

Hardware units

Executables

Functions

Applications

Configuration

Product

Channels and protocols

Processors, memorires, configurable HW, logic

System control, product behaviour

Resource types, buses, IO

Region types, switches, network interfaces

RTOS, code, HW configurations

Resource management,diagnostics, applications

Execution control, functions

Network management, allocation, operation modes

22Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Logical layers of NOC

• Backbone– Communication resources

– Basic set of system services

– Architecture design methods and tools

• Platform– Computation and storage resources

– System services

– Application design methods and tools

• System– Functionality of computation(code, configuration)

– Control (OS, NetOS)

– Validation and verification support

Communication

Regions

Resources

Hardware units

Executables

Functions

Applications

Configuration

Product

23Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Development of NOC based systems

BACKBONE

PLATFORMS

SYSTEMS

Baseband platform

Database platform

Multimedia platform

High-perforrmance communication systems

High-capacity communication systems

Virtual reality games

Entertainment devices

Personal assistant

Data collectionsystems

24Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Resource development

Fun

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NOC System

System does not exist

Using Design Space for NOC

Platform

Backbone

Architecturedesign

Applicationmapping

System Services

Operation principles

Communicationchannels

Non-configurable hardware

Product differentiation

Product area specialisation

25Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

System Services

• Purpose to hide implementation details from application developer

– Execution services• Communication, resource

allocation and conversion services

– Control services• Power management,

reconfiguration, load migration, fault detection and recovery, data collection and analysis

– Development support services• Language interfacing, compilers,

libraries, optimisations, debugging, testing, validation, etc.

• System services are part of backbone and platform

NOC Platform Chip

System Services

Applications

Thickness of service layers

Per

form

ance

ASIC

SW

26Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

NOC Platform development

• Scaling problem– How big NOC is needed? What are the application area requirements?

• Region definition problem– What kind of regions are needed? What kind of interfaces between

regions? What are the capacity requirements for the regions?

• Resource design problem– What is needed inside resources? Internal computation type and internal

communication?

• Application mapping flow problem– What kind of languages, models and tools must be supported? How to

validate and test the final products?

27Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

NOC Application Development

• Mapping problem– How to partition applications for NOC resources? How to allocate

functionality effectively? Is the performance adequate? Is the resource usage in balance?

• Optimisation problem– How to perform global optimisation of heterogenuous applications? How

to define right optimisation targets? How to utilise application/resource type specific tools?

• Validation problem– Are the contraints met? Are the communication bottlenecks or power

consumption hot spots? How to simulate 10000 GIPS system? How to test all applications?

28Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Methods & Tools

• Analysis of applications (characterisation)

– analysis of complexity, computation type, communication requirement, storage, etc.

– for scaling, region and resource type selection, and application mapping

– Different abstraction levels: workload model, application model, execution model

• Validation of decisions– network simulations at various

abstraction levels (effects of mapping)

• Estimation of quality characteristics

– global vs. local optimisation of the system

– SW architecture vs. HW architecture

– computation vs. engine

• Development support– virtual execution platforms for

application developers– integration of existing design tools

for resource level design

29Juha-Pekka SoininenSystems on Chip WorkshopVillach, Austria, 17.9.2001

Conclusions

• Development of NOC systems will be a huge effort– reuse in all levels is a must

• reuse of architecture, hardware and software in product• reuse of different languages, methods, tools and practices during development

• Backbone, platform, system based design methodology apporach– provides variability and performance

• Analysis, decision, estimation and validation methods are the cornerstones of NOC development – complexity, functionality, workload vs. capacity, performance, efficiency