jeff shelton 17 february 2015 - purdue university · jeff shelton – 17 february 2015 25 0 1 0 0.5...
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Jeff Shelton – 17 February 2015
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Jeff Shelton – 17 February 2015
⇔
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Jeff Shelton – 17 February 2015
Binary
• Base 2
Octal
• Base 8
Decimal
• Base 10
Hexadecimal
• Base 16
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16
01 02 03 04 05 06 07 10 11 12 13 14 15 16 17 20
0 0001 0 0010 0 0011 0 0100 0 0101 0 0110 0 0111 0 1000 0 1001 0 1010 0 1011 0 1100 0 1101 0 1110 0 1111 1 0000
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Jeff Shelton – 17 February 2015
Analog World
Digital World 000 001 010 011 100 101 110 111
0 1 2 3 4 5 6 7
6
Jeff Shelton – 17 February 2015
101001102 = 0246 = 166 = A6
B10100110 B
0246 0
166
0xA6 0x 0-9 A-F a-f
7
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LSB MSB
Jeff Shelton – 17 February 2015
Hex Address
Hex Value
… …
0400 4A
0401 71
0402 39
0403 B2
… …
Storing the 4-byte value 4A7139B216
Hex Address
Hex Value
… …
0400 B2
0401 39
0402 71
0403 4A
… … 9
Jeff Shelton – 17 February 2015
23 22 21 20
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1
Decimal (101 100) 0 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7
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Jeff Shelton – 17 February 2015
0 to 9, need 4 bits.
0 1 2 3 4 5 6 0 0 0 0 * * * * * * 0 0 0 1 * * 0 0 1 0 * * * * * 0 0 1 1 * * * * *
(0011 0110 0100)BCD
3
0
1
2 4
5 6
11
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Jeff Shelton – 17 February 2015
0 → 2𝑛 − 1
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Jeff Shelton – 17 February 2015
Voltage Digital Value Decimal Equivalent
-5 000 0
-3.57 001 1
-2.14 010 2
-0.71 011 3
+0.71 100 4
+2.14 101 5
+3.57 110 6
+5 111 7
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0 → 2𝑛 − 1
Jeff Shelton – 17 February 2015
Voltage(1) Voltage(2) Digital Value Decimal Equivalent
+3.75 +5 011 3
+2.50 +3.33 010 2
+1.25 +1.67 001 1
0 0 000 0
-1.25 -1.67 111 -1
-2.50 -3.33 110 -2
-3.75 -5 101 -3
-5 -- 100 -4
−(2 𝑛−1 ) ← 0 → 2 𝑛−1 − 1
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Jeff Shelton – 17 February 2015
Binary Decimal (22 21 20) 0 1 1 3 0 1 0 2 0 0 1 1 0 0 0 0 1 1 1 -1 1 1 0 -2 1 0 1 -3 1 0 0 -4
Ex: Using 2’s complement representation, we represent (-3)10 in four bits as:
24 − 3 = 16 − 3 = 13 = 1 1 0 1 2
Jeff Shelton – 17 February 2015
• 𝑀𝑆𝐵 = 0
• 𝑀𝑆𝐵 = 1
Voltage Digital Value Decimal Equivalent
+5 011 3
+3.33 010 2
+1.67 001 1
0
0
000
100
0
-0
-1.67 101 -1
-3.33 110 -2
-5 111 -3
−(2 𝑛−1 −1) ← 0 → 2 𝑛−1 − 1
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Jeff Shelton – 17 February 2015
1 0
3 bit Code 6 bit Code
101 111 101
011 000 011
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Jeff Shelton – 17 February 2015
ADC Vo
ltag
e
Time
0001 0011 0101 0111 0101
⋮
24
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0 1
0
0.5
1
1.5
2
2.5
3
3.5
0 2 4 6 8 10
Vo
lta
ge
Time
Jeff Shelton – 17 February 2015 26
𝑉ADCmin 𝑉ADCMAX Analog Voltage:
Digital Code:
𝑉IN
code
Jeff Shelton – 17 February 2015 27
𝑉ADCmin 𝑉ADCMAX Analog Voltage:
Digital Code:
𝑉IN
code
𝑄 =𝑉ADCMAX − 𝑉ADCmin
2𝑛 − 1
We assume this step size to be fixed, although in sophisticated applications it may vary across
the signal range, or adapt to signal characteristics.
Jeff Shelton – 17 February 2015 28
𝑉ADCmin 𝑉ADCMAX Analog Voltage:
Digital Code:
𝑉IN
code
𝑄 =𝑉ADCMAX − 𝑉ADCmin
2𝑛 − 1
0 1 -1
𝑉OFFSET
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2n–1 0
code = round𝑉IN − 𝑉offset
𝑄
𝑄 =𝑉ADCMAX − 𝑉ADCmin
2𝑛 − 1
−2 𝑛−1 2 𝑛−1 − 1
𝑉ADCmin 𝑉ADCMAX Analog Voltage:
Positive Coding:
𝑉IN
code
code = round𝑉IN − 𝑉offset
𝑄
Pos. & Neg. Coding:
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
𝑉offset
Jeff Shelton – 17 February 2015
𝑉ADC,max = 1.5 V
𝑉ADC,min = -2 V
𝑉𝐼𝑁 = 1.2 V
𝑉𝐼𝑁
𝑄 =𝑉ADC,max − 𝑉ADC,min
2𝑛 − 1 =
1.5 V − −2 V
23 − 1 =
3.5 V
7 = 0.5 V
Code = Round𝑉𝐼𝑁 − 𝑉ADC,min
𝑄 = Round
1.2 V − −2 V
0.5 V
= Round3.2 V
0.5 V = 6
30
= 1102
Jeff Shelton – 17 February 2015
𝑉 IN = code × 𝑄 + 𝑉offset
2n–1 0
−2 𝑛−1 2 𝑛−1 − 1
𝑉ADCmin 𝑉ADCMAX Analog Voltage:
Positive Coding:
𝑉 IN
code
Pos. & Neg. Coding:
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
𝑉offset
Jeff Shelton – 17 February 2015
2n–1 0
−2 𝑛−1 2 𝑛−1 − 1
𝑉ADCmin 𝑉ADCMAX Analog Voltage:
Positive Coding:
code
Pos. & Neg. Coding:
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Any 𝑉𝐼𝑁 ∈ 𝑉 𝐼𝑁 −𝑄
2, 𝑉 𝐼𝑁 +
𝑄
2 will be coded to 𝑉 𝐼𝑁
Maximum Quantization Error = ±𝑄/2
𝑉IN
Jeff Shelton – 17 February 2015
𝑉ADC,max = 5.25 V
𝑉ADC,min = 0 V
code = 2
𝑉 𝐼𝑁
𝑄 =𝑉ADC,max − 𝑉ADC,min
2𝑛 − 1 =
5.25 V − 0 V
23 − 1 =
5.25 V
7 = 0.75 V
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𝑉 IN = code × 𝑄 + 𝑉offset ±𝑄
2 = 2 × 0.75 𝑉 + 0 V ±
0.75 𝑉
2
= 1.5 𝑉 ± 0.375 𝑉
Jeff Shelton – 17 February 2015
𝑄 =True Span
2𝑛 − 1=
Nominal Span
2𝑛
2n–1 0
−2 𝑛−1 2 𝑛−1 − 1
𝑉ADCmin 𝑉ADCMAX Analog Voltage:
Positive Coding:
𝑉IN
code
Pos. & Neg. Coding:
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Jeff Shelton – 17 February 2015
•
•
⋅
≥ ⇒
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0 1/8 1/4 3/8 1/2 5/8 3/4 7/8
0 FS
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Jeff Shelton – 17 February 2015
0 𝑉𝐴𝐷𝐶𝑀𝐴𝑋
𝑉𝐴𝐷𝐶𝑚𝑖𝑛 𝑉𝐴𝐷𝐶𝑀𝐴𝑋
• 𝑉𝐼𝑁 𝑉𝐴𝐷𝐶𝑀𝐴𝑋 𝑉𝑂𝑈𝑇 𝑉𝐴𝐷𝐶𝑀𝐴𝑋
• 𝑉𝐼𝑁 𝑉𝐴𝐷𝐶𝑚𝑖𝑛 𝑉𝑂𝑈𝑇 𝑉𝐴𝐷𝐶𝑚𝑖𝑛
𝑉𝐴𝐷𝐶𝑀𝐴𝑋
𝑉𝐴𝐷𝐶𝑚𝑖𝑛
Jeff Shelton – 17 February 2015
𝑡𝑎
ΔV
Time
Start conversion
ta
V
End conversion
Δ𝑉 < 𝑄
Jeff Shelton – 17 February 2015
0
0.5
1
1.5
2
2.5
3
3.5
0 1 2 3 4 5 6 7 8 9
Vo
lta
ge
Time
⇒ Use a “sample and hold” circuit.
Jeff Shelton – 17 February 2015
Sample
Hold
Jeff Shelton – 17 February 2015
•
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Jeff Shelton – 17 February 2015
0 1 2 3 4 5 6 7 8 9 10 -1
0
1
Original Signal
0 1 2 3 4 5 6 7 8 9 10 -1
0
1
20 Sample /unit time
1
0 1 2 3 4 5 6 7 8 9 10 -1
0
5 Sample /unit time
0 1 2 3 4 5 6 7 8 9 10 -1
0
1
Time (sec)
0.9 Sample /unit time
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Jeff Shelton – 17 February 2015
𝑓𝑆 > 2 𝑓𝑀𝐴𝑋
𝑓𝑠/2
Amplifier Low-pass
Filter ADC
Input
Signal
Computer
Why analog?
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Jeff Shelton – 17 February 2015 45
Maxim's 8th-order, low-pass, elliptic, switched-capacitor filters operate from a single +3V or +5V supply
Jeff Shelton – 17 February 2015
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