iki10201 08-register-transfer design bobby nazief semester-i 2005 - 2006 the materials on these...
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IKI10201 08-Register-transfer Design
Bobby NaziefSemester-I 2005 -
2006
The materials on these slides are adopted from:
•Prof. Daniel Gajski’s transparency for Principles of Digital Design.
Road Map
Boolean Algebra
Logic Gates &Flip-flops
Register-TransferDesign
Finite-StateMachines
Binary Systems& Data Represent.
Generalized FSM
Sequential DesignTechniques
Logic DesignTechniques
CombinatorialComponents
StorageComponents
ProcessorComponents
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Review: Simple datapath
• Datapath are used for temporary variable storage & operation execution
– storage register file, accumulator
– operation execution ALU
• Datapath has 2 types of input/output:
– data words (input/output):8, 16, 32, or 64 bits wide
– control signals:
• input: control words
• output: status signals
Review: Control unit
• Control unit is a sequential circuit that controls datapath’s operations
– it receives computer’s instructions (our programs) and status signals (from Datapath) as input
– it generates the control words (for Datapath) and other control outputs
Design model: high-level block diagram
• Processors & ASICs (Application-Specific Integrated Circuit) consist of 2 components:
– control unit
– datapath
Example: one’s counter specification
• Basic algorithm:1. Data = Inport2. Ocount = 03. Mask = 14.while Data 0 repeat
Temp = Data AND MaskOcount = Ocount + TempData = Data >> 1
5.end while6. Outport = Ocount
FSM with Datapath (FSMD)
• FSM: Quintuple <S,I,O,f,h>
– S = Q1 x Q2 x ... x Qm
– I = A1 x A2 x ... x Ak
– O = Y1 x Y2 x ... x Yn
– f: S x I S
– h: S x I O
• FSMD = FSM, extended with:
– set of variables: V = V1 x V2 x ... x Vq
– I = IC x ID
– O = OC x OD
– next state functions:
• fC: S x IC x STAT S
• fD: S x V x ID V
– output functions:
• hC: S x IC x STAT OC
• hD: S x V x ID OD
State-action table
• This table can be used to:
– construct state diagram for the control unit
– synthesize next-state & output logic
– define the datapath components & their connections
Output = Z
Algorithmic-State-Machine (ASM) chart
• ASM charts:
– an alternative graphic form for specifying FSMDs
– may suit humans better as they explicitly show the paths from one state to another
• ASM chart consists of:1. state box2. decision box3. conditional output box4. ASM block
ASM’s charts for one’s counter (custom design)
• The use of custom datapath may result in fewer components and interconnections.
• Examples (in the case of one’s counter design):– state-based
(Moore) chart requires 6 states (all variable assignments must be executed unconditionally)
– input-based (Mealy) design requires 4 states (variable assignments may be executed conditionally)
state-based chart input-based chart
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