ics 252 introduction to computer design fall 2007 eli bozorgzadeh computer science department-uci

ICS 252 Introduction to Computer Design

Fall 2007

Eli BozorgzadehComputer Science Department-UCI

2Fall 2007 ICS 252-Intro to Computer Design

References

• Lecture notes by Kia Bazargan on High level Synthesis [©Bazargan]

– http://www.ece.umn.edu/users/kia/Courses/EE5301

• Lecture note by Rajesh Gupta on scheduling [©Gupta]

– http://www.ics.uci.edu/~rgupta/ics280.html

• Chapter 4 of the textbook

Architectural Synthesis• Abstract model data path (structural) and

control unit (logic-level) • Constructing macroscopic structure of digital

circuit• Data path: interconnection of hardware

resources (arithmetic or logic), steering logic circuits, registers/memory arrays

• Objectives:– Area, latency, clock cycle time, throughput ( for

pipelined data path)

Design specification for architectural synthesis

• Resources– Functional resources

• Primitive• Application-specific

– Memory• Examples: registers, ROM, RAM

– Interface• Internal: buses• External: I/O pads

Design specification for architectural synthesis

• Constraints– Interface constraints

• Format and timing of the I/O data transfers

– Implementation constraints• Area• Latency, cycle time

Fundamental architectural synthesis problems

• Input: – sequencing graph– a set of functional units– a set of constraints

• Assumption:– Storage by registers– Interconnection by wires– Non-hierarchical graph with operations having bounded and

known execution delay

• Two tasks: – Placing operations in time and space

– Determining the detailed interconnection of data path and control unit

Temporal Domain: Scheduling

• Given – Sequencing graph

– Operations D={di,i=0,1,2,…,n}

– Start time at each operation T={ti, i=1,2…,n}

• Scheduling: task of determining the start time of each operation

• Subject to – Precedence constraint by sequencing graph

Scheduling

• Latency of a scheduled graph:– Difference between the start time of source and sink

* * * *

Time 1

Time 2

Time 3

Time 4

Scheduling under resource constraints

Time 1

Time 2

Time 3

Time 4

Time 5

Time 6

Time 7

Spatial Domain: Binding• A resource binding is a mapping such that

operation vi with type T is implemented with rth resource

• One-to-one function, many-to-one functions (resource sharing), one-to-many functions (module selection)

• On a scheduled graph

Resource binding on a scheduled graph

* * * *

Time 1

Time 2

Time 3

Time 4

Area and performance estimation

• Latency– By scheduling

• Area– Resource-dominated– General circuit

• Registers• Steering logics• Wiring• Control unit

Strategies • Area/latency optimization

• Cycle-time/area optimization

• cycle-time/latency optimization

Scheduling

• Without resource constraint– Unconstrained Scheduling: ASAP– Latency-constrained scheduling :ALAP– Scheduling under timing constraint

• With resource constraint– Exact: ILP model– Heuristic: List scheduling, force-directed

scheduling, etc.

ASAP Scheduling

• Schedule each operation as-soon-as-possible

* * * *

Time 1

Time 2

Time 3

Time 4

ALAP scheduling

• Schedule each operation as late as possible under given latency

Time 1

Time 2

Time 3

Time 4

Quick overview

• Tasks in high-level synthesis– Scheduling √– Allocation– Binding

• Scheduling– Without resource constraint √– With resource constraint (next)

• ILP model: exact solution• List scheduling, force-directed scheduling: heuristic

Resource Constraint Scheduling• Constrained scheduling

– General case NP-complete– Minimize latency given constraints on area or

the resources (ML-RCS)– Minimize resources subject to bound on latency (MR-

• Exact solution methods: – Integer linear programming (ILP) model– Hu’s algorithm

• Heuristics:– List scheduling– Force-directed scheduling

[©Bazargan]

ILP model for scheduling problem

• Binary variable xil

– xil=1 if start time of operation i is at time l

– xil=0 otherwise

• Constraints: set of linear inequalities– Uniqueness of start time for each operation

• How to compute ti , start time of operation i?

– Sequencing relation

Evv,...,n,i,jdxlxl ijjl l

jlil ),( 21

1,2,...,ni 1 xl

Start Time vs. Execution Time• For each operation vi , only one start time

• If di=1, then the following questions are the same:

– Does operation vi start at step l?

– Is operation vi running at step l?

• But if di>1, then the two questions should be formulated

as:– Does operation vi start at step l?

• Does xil = 1 hold?

– Is operation vi running at step l?

• Does the following hold? 11

[©Bazargan]

Operation vi Still Running at Step l ?• Is v9 running at step 6?

– Is x9,6 + x9,5 + x9,4 = 1 ?

• Note:– Only one (if any) of the above three cases can happen– To meet resource constraints, we have to ask the same question

for ALL steps, and ALL operations of that type

x9,4=1

x9,5=1

x9,6=1

[©Bazargan]

Operation vi Still Running at Step l ?• Is vi running at step l ?

– Is xi,l + xi,l-1 + ... + xi,l-di+1 = 1 ?

l-di+1...

xi,l-di+1=1

l-di+1

xi,l-1=1

l-di+1

xi,l=1

[©Bazargan]

ILP Model (cont’d)

• Constraints (cont’d)– Resource bound at each time step of scheduling

• Objective– Minimize cTt

– t = vector of start time of operations

1...,2,1 ...,2,1 )(:

lnkax reskvTi

dlm kim

ILP Example• Assume = 4• First, perform ASAP and ALAP

– (we can write the ILP without ASAP and ALAP, but using ASAP and ALAP will simplify the inequalities)

[©Bazargan]

ILP Example: Unique Start Times Constraint

• Without using ASAP and ALAP values:

• Using ASAP and ALAP:

4,113,112,111,11

4,23,22,21,2

4,13,12,11,1

4,93,92,9

3,82,81,8

3,72,7

2,61,6

[©Bazargan]

ILP Example: Dependency Constraints

• Using ASAP and ALAP, the non-trivial inequalities are: (assuming unit delay for + and *)

01.4.3.2.5

01.3.2.4

01.3.2.4.3.2

01.2.3.2

4,113,112,115,

4,93,92,95,

3,72,74,5

3,102,101,104,113,112,11

3,82,81,84,93,92,9

2,61,63,72,7

xxxxxx

[©Bazargan]

ILP Example: Resource Constraints

• Resource constraints (assuming 2 adders and 2 multipliers)

• Objective:– Since =4 and sink has no mobility, any feasible solution is

optimum, but we can use the following anyway:

4,114,94,5

3,113,103,93,4

2,112,102,9

3,83,7

2,82,72,62,3

1,81,61,21,1

4,3,2,1, .4.3.2 nnnn xxxxMin [©Bazargan]

ILP Formulation of MR-LCS

• Dual problem to ML-RCS• Objective:

– Goal is to optimize total resource usage, a.– Objective function is cTa , where entries in c

are respective area costs of resources

• Constraints:– Same as ML-RCS constraints, plus:– Latency constraint added:

– Note: unknown ak appears in constraints.

1. nll

[©Gupta]

Hu’s Algorithm• Simple case of the scheduling problem

– Operations of unit delay– Operations (and resources) of the same type

• Hu’s algorithm– Greedy– Polynomial AND optimal– Computes lower bound on number of resources for a given

latencyOR: computes lower bound on latency subject to resource constraints

• Basic idea:– Label operations based on their distances from the sink– Try to schedule nodes with higher labels first

Hu’s AlgorithmHU (G(V,E), a) {

Label the vertices // label = length of longest pathpassing through the vertex

l = 1repeat {

U = unscheduled vertices in V whose predecessors have been scheduled

(or have no predecessors)

Select S U such that |S| a and labels in S are maximalSchedule the S operations at step l by setting ti=l, i: vi S.

l = l + 1

} until vn is scheduled.

}[©Bazargan]

Hu’s Algorithm: Example

[©Gupta]

List Scheduling• Greedy algorithm for ML-RCS and MR-LCS

– Does NOT guarantee optimum solution

• Similar to Hu’s algorithm– Operation selection decided by criticality– O(n) time complexity

• More general input– Resource constraints on different resource types

[©Bazargan]

List Scheduling Algorithm: ML-RCS

LIST_L (G(V,E), a) {l = 1repeat {

for each resource type k {

Ul,k = available vertices in V.

Tl,k = operations in progress.

Select Sk Ul,k such that |Sk| + |Tl,k| ak

Schedule the Sk operations at step l

}l = l + 1

} until vn is scheduled.

} [©Bazargan]

List Scheduling Example

[©Gupta]

List Scheduling Algorithm: MR-LCSLIST_R (G(V,E), ’) {

a = 1, l = 1

Compute the ALAP times tL.

if t0L < 0

return (not feasible)repeat {

for each resource type k {

Ul,k = available vertices in V.

Compute the slacks { si = tiL - l, vi Ul,k }.

Schedule operations with zero slack, update a

Schedule additional Sk Ul,k under a constraints}l = l + 1

} until vn is scheduled.}

[©Bazargan]

Force-Directed Scheduling• Similar to list scheduling

– Can handle ML-RCS and MR-LCS– For ML-RCS, schedules step-by-step– BUT, selection of the operations tries to find the globally best set

of operations

• Idea:– Find the mobility i = ti

L – tiS of operations

– Look at the operation type probability distributions– Try to flatten the operation type distributions

• Definition: operation probability density– pi ( l ) = Pr { vi starts at step l }.– Assume uniform distribution:

ii ttlforlp

[©Gupta]

Force-Directed Scheduling: Definitions• Operation-type distribution (NOT normalized to 1)

• Operation probabilities over control steps:

• Distribution graph of type k over all steps:

– qk ( l ) can be thought of as expected operator cost

for implementing operations of type k at step l.

lplq)(:

)}(,),1(),0({ npppp iiii

)}(,),1(),0({ nqqq kkk

[©Bazargan]

Example

111)1(

[©Bazargan]

Force-Directed Scheduling Algorithm: Idea

• Very similar to LIST_L(G(V,E), a)– Compute mobility of operations using ASAP and ALAP– Computer operation probabilities and type distributions– Select and schedule operations– Update operation probabilities and type distributions– Go to next control step

• Difference with list scheduling in selecting operations– Select operations with least force– Consider the effect on the type distribution– Consider the effect on successor nodes and their type

distributions

[©Bazargan]

Summary• Architectural Synthesis

– Scheduling– Binding and resource allocation– Challenge: Area/performance trade-off

• Scheduling– Without resource constraints– With resource constraints

• Exact solution• Heuristics

• Next: Resource sharing and binding

ics 252 introduction to computer design fall 2007 eli bozorgzadeh computer science department-uci

computer design fall

cycle time slide

computer design area

clock cycle time

start time of source

computer design spatial

textbook slide

control unit slide

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