hmc987lp5e - analog devices · hmc987lp5e v03.1112 low noise 1:9 fanout buffer dc - 8 ghz...
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For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Functional Diagram General Descriptionthe 1-to-9 fanout buffer is designed for low noise clock distribution. it is intended to generate relatively square wave outputs with rise/fall times < 100 ps. the low skew and jitter outputs of the HMC987lP5E, combined with its fast rise/fall times, leads to controllable low-noise switching of downstream circuits such as mixers, ADCs/DACs or sErDEs devices. the noise floor is particularly important in these applications, when the clock-network bandwidth is wide enough to allow square-wave switching. Driven at 2 GHz, outputs of the HMC987lP5E have a noise floor of -166 dbc/Hz, corresponding to a jitter density of 0.6 asec/rtHz - or 50 fs over an 8 GHz bandwidth.
the input stage can be driven single-ended or differentially, in a variety of signal formats (CMl, lVDs, lVPECl or CMos), AC or DC coupled. the input stage also features adjustable input impedance. it has 8 lVPECl outputs, and 1 CMl output with adjustable swing/power-level in 3 db steps.
individual output stages may be enabled or disabled for power-savings when not required using either hardware control pins, or under control of a serial-port interface.
Featuresultra low noise Floor: -166 dbc/Hz @ 2 GHz
Wideband: DC - 8 GHz operating Frequency
Flexible input interface:
lVPECl, lVDs, CMl, CMos Compatible
AC or DC Coupling
on-Chip termination 50 or 150 Ω (100/300 Ω Diff.)
Multiple output Drivers:
up to 8 Differential or 16 single-Ended lVPECl outputs:
800 mVpp into 50 Ω single-Ended (+3 dbm Fo)
one Adjustable Power CMl/rF output:
-9 to 3 dbm single-Ended
serial or Parallel Control, Hardware Chip-Enable
Power-Down Current < 1 uA
32 lead 5x5 mm sMt Package 25 mm2
Typical Applicationsthe is suitable for:
• sonEt, Fibre Channel, GigE Clock Distribution• ADC/DAC Clock Distribution• low skew and Jitter Clock or Data Fanout• Wireless/Wired Communications• level translation• High Performance instrumentation• Medical imaging• single-Ended to Differential Conversion
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Table 1. Electrical Specificationsunless otherwise specified: t = 27 °C, regulated VDD of 3.3 V, 2 GHz, 6 dbm in, AC coupled single ended input and output, 120 Ω/leg DC termination, AC coupled into 50 Ω measuring load. Effects of customer eval board (“Evaluation PCb schematic”) are de-embedded. For convenience, all voltages are referenced to GnD (0V), but negative supply references are acceptable.
Parameter Conditions Min. typ. Max. units
DC input Characteristics
VDD (VCCHF=VCCA=VCCb=VCCrF) 3.0 3.3 3.6 V
input Common Mode Voltage 1.35 2 VDD - 0.2 V
input swing (single Ended) 0.2 2 Vpp
input Capacitance 0.5 pF
input impedance
single-Ended selectable 50 / 150 Ω
Differential selectable 100 / 300 Ω
input bias Current base current under external DC bias, internal termination open.
165 µA
logic inputs
switching threshold (Vsw) ViH/Vil within 50 mV of Vsw 38 47 54 %VDD
lVPECl DC output Characteristics
output Voltage High level @ 3.3 V = 2.25 VDD - 1.2 VDD - 1.0 VDD - 0.8 V
ouput Voltage Common Mode @ 3.3 V = 1.82 VDD - 1.7 VDD - 1.5 VDD - 1.3 V
output Voltage low level @ 3.3 V = 1.42 VDD - 2.1 VDD - 1.9 VDD - 1.7 V
output Voltage, single-Ended 800 mVpp
AC Performance
input/output Frequency [1] > 400 Vpp single-ended DC 8000 MHz
3 db bandwidth 4000 MHz
output rise/Fall time 20% to 80% 65 ps
typical Channel skewAcross all lVPECl outputs relative to channel 1
0 1.5 3.1 ps
small signal Gain s21
1000 MHz 26 db
4000 MHz 15 db
input P1db
1000 MHz -20 dbm
4000 MHz -10 dbm
saturated Power in fundamental tone (single-Ended)
1000 MHz 2.5 dbm
4000 MHz -0.5 dbm
output Voltage swing (Vppd into 100 Ω)
700 MHz 1.5 1.6 1.7 V
2000 MHz 1.2 1.3 1.4 V
[1] For frequencies < 700 MHz, square wave signals should be used to maintain high quality phase noise performance.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Parameter Conditions Min. typ. Max. units
4000 MHz 1.1 1.2 1.3 V
Harmonics
Fo 2 dbm
2Fo -25 dbc
3Fo -8 dbc
4Fo -28 dbc
5Fo -12 dbc
ssb Phase noise at 100 Hz offset
622.08 MHz Carrier Frequency -147 dbc/Hz
1750 MHz Carrier Frequency -147 dbc/Hz
4000 MHz Carrier Frequency -147 dbc/Hz
ssb Phase noise Floor [2]
100 MHz Carrier Frequency -167 dbc/Hz
622.08 MHz Carrier Frequency -167 dbc/Hz
1750 MHz Carrier Frequency -166 dbc/Hz
2000 MHz Carrier Frequency -166 dbc/Hz
4000 MHz Carrier Frequency -163 dbc/Hz
4200 MHz Carrier Frequency -162 dbc/Hz
Floor Jitter Density
622.08 MHz Carrier Frequency 1.8 asec/√Hz
1750 MHz Carrier Frequency 0.7 asec/√Hz
4000 MHz Carrier Frequency 0.5 asec/√Hz
integrated rMs Jitter
622.08 MHz Carrier Frequency
100 Hz to 100 MHz 17 fs rms
12 kHz to 20 MHz 8 fs rms
20 kHz to 80 MHz 17 fs rms
50 kHz to 80 MHz 17 fs rms
4 MHz to 80 MHz 16 fs rms
1750 MHz Carrier Frequency
100 Hz to 100 MHz 7 fs rms
12 kHz to 20 MHz 3 fs rms
20 kHz to 80 MHz 6 fs rms
50 kHz to 80 MHz 6 fs rms
4 MHz to 80 MHz 6 fs rms
4000 MHz Carrier Frequency
100 Hz to 100 MHz 4 fs rms
12 kHz to 20 MHz 2 fs rms
20 kHz to 80 MHz 4 fs rms
50 kHz to 80 MHz 4 fs rms
4 MHz to 80 MHz 4 fs rms
output return loss 500 MHz to 4 GHz -16 -12 -8 db
Table 1. Electrical Specifications (Continued...)
[2] CMl buffer has similar phase noise characteristics at maximum output power level.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Parameter Conditions Min. typ. Max. units
isolation
in to out - Chip Disabled 47 db
off isolation - relative to Power of neighboring driven port
700 MHz 60 48 db
4000 MHz 50 32 db
output to output isolation with 500 MHz Aggressor signal injected into output Port
to locally paired output buffer 25 db
to other buffers 45 db
rF output buffer
3 db bandwidth 5000 MHz
Max output Power (vs temperature at 2 GHz)
single-Ended 3 3.2 dbm
Power Control range (3 db steps) single-Ended -9 3 dbm
Delay relative to lVPECl output -140 ps
Power supply rejection
FM/Phase Pushing 0.8 ps/V
AM rejection 7 db
Current Consumption (3.3 V unloaded outputs)
Chip Disabled 1 µA
1 output 60 mA
2 outputs 71 mA
3 outputs 97 mA
4 outputs 108 mA
5 outputs 134 mA
6 outputs 144 mA
7 outputs 170 mA
8 outputs 180 mA
8 + rF buffer (Min to Max Power) 198 234 mA
sPi interface
Vil 1.1 V
Vih 2.0 V
Vol 0.4 V
Voh 2.3 V
Table 1. Electrical Specifications (Continued...)
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
TYPICAL PERFORMANCE CHARACTERISTICSunless otherwise specified: t = 27 °C, regulated VDD = 3.3 V, 2 GHz, 6 dbm in, AC coupled single ended input and output, 120 Ω/leg DC termination, AC coupled into 50 Ω measuring load.
Figure 1. LVPECL Output vs. Frequency [1] Figure 2. LVPECL Output vs. Frequency [1]
Figure 3. Current Consumption vs. Num. of Enabled Buffers & Load Resistors[2]
Figure 4. Skew of LVPECL Outputs Relative to Output Channel 1 [4]
[1] +2dbm input, uncorrected for board loss. Measurement is band limited by the trace bandwidth of 7 GHz.[2] buffers 1 through 8 are successively turned on. rF Min - rF buffer turned on with minimum gain, rF Max - rF buffer turned on with maximum gain[3] 200 Ω termination, Corrected for board loss.[4] Characterized at 2 GHz, Effects of customer evaluation board skew and loss are embedded.[5] the graph shows only output trace distortion.
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
-800 -600 -400 -200 0 200 400 600 800
TIME (picoseconds)
OU
TP
UT
VO
LT
AG
E (
V)
4 GHz OUTP 4 GHz OUTN
2 GHz OUTN 1 GHz OUTP 1 GHz OUTN
2 GHz OUTP
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0 20 40 60 80 100 120
4 GHz2 GHz1 GHz
AM
PL
ITU
DE
(V
diffe
ren
tia
l)TIME (ps)
Figure 5. Fundamental Output Power vs. Input Power [3]
-20
-15
-10
-5
0
5
-30 -24 -18 -12 -6 0 6
INPUT POWER (dBm)
OU
TP
UT
PO
WE
R (
dB
m)
400 MHz
2 GHz
3 GHz
4 GHz
5 GHz
6 GHz
Figure 6. Evaluation Board LVPECL Output Trace Loss vs. Frequency [5]
-15
-10
-5
0
5
10
15
P1 P2 P3 P4 P5 P6 P7 P8
RE
LA
TIV
E D
EL
AY
(p
se
c)
OUTPUT CHANNEL
0
100
200
300
400
500
1 2 3 4 5 5 6 7 8 RF MinRF Max
CU
RR
EN
T (
mA
)
NUMBER OF OUTPUTS SUCCESSIVELY TURNED ON
Ground Current (Does not depend on termination)
120 Ohm DC Termination
300 Ohm DC Termination
200 Ohm DC Termination
-7
-6
-5
-4
-3
-2
-1
0
100 1000 10000
OU
TP
UT
TR
AC
E L
OS
S (
dB
)
OUTPUT FREQUENCY (MHz)
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Figure 7. RF Buffer Fo Output Power vs. Frequency & Temperature (Max Gain) Figure 8. RF Output Power Control
Figure 9. Fundamental Output Power vs. Frequency & Temperature [6]
[6] Measured single-ended. Corrected for trace loss. 200 Ω DC termination, 3.3 V +6 dbm single-ended input. HMC987lP5E AC coupled to 50 Ω instrument.[7] input signal power = + 6 dbm. 120 Ω/leg DC termination. AC coupled via 50 pF to 26 GHz oscilloscope (50 ohm/leg termination).
Figure 10. Fundamental Output Power vs. Frequency & Supply Voltage at 27 °C [6]
Figure 11. Fundamental Output Power vs. Frequency & Termination at 27 °C [6] Figure 12. Signal Swing vs. Frequency [7]
-3
-2
-1
0
1
2
3
4
100 1000 10000
-40 C27 C85 C
OU
TP
UT
PO
WE
R (
dB
m)
OUTPUT FREQUENCY (MHz)
-3
-2
-1
0
1
2
3
4
100 1000 10000
OU
TP
UT
PO
WE
R (
dB
m)
OUTPUT FREQUENCY (MHz)
3.0 V
3.2 V
3.3 V
3.5 V
3.6 V
-3
-2
-1
0
1
2
3
100 1000 10000
120 Ohms200 Ohms300 Ohms
OU
TP
UT
PO
WE
R (
dB
m)
OUTPUT FREQUENCY (MHz)
-3
-2
-1
0
1
2
3
4
100 1000 10000
-40 C27 C85 C
OU
TP
UT
PO
WE
R (
dB
m)
FREQUENCY (MHz)
-12
-9
-6
-3
0
3
6
100 1000 10000
OU
TP
UT
PO
WE
R (
dB
m)
FREQUENCY (MHz)
Reg04h[2:0] = 1d
Reg04h[2:0] = 2d
Reg04h[2:0] = 3d
Reg04h[2:0] = 4d
Reg04h[2:0]= 5d
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0 1000 2000 3000 4000 5000 6000 7000 8000
SIG
NA
L S
WIN
G (
Vp
pd
)
FREQUENCY (MHz)
Corrected For Evaluation Board Loss
Observed and Not Corrected For Evaluation Board Loss
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
-260
-258
-256
-254
-252
-250
-248
0 500 1000 1500 2000
FO
M (
dB
c/H
z)
SINUSOIDAL INPUT FREQUENCY (MHz)
-180
-170
-160
-150
-140
-130
-120
-110
103
104
105
106
107
108
PH
AS
E N
OIS
E (
dB
c/H
z)
FREQUENCY OFFSET (Hz)
HMC830LP6GE Used as Source
Source + Fanout Output Noise
-170
-168
-166
-164
-162
2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5
PH
AS
E N
OIS
E (
dB
c/H
z)
VDD
300 Ohm Termination
120 Ohm Termination
200 Ohm Termination
Figure 13. Phase Noise Performance at 2 GHz (Differential Drive) [9]
-170
-168
-166
-164
-162
-160
-50 0 50 100
PH
AS
E N
OIS
E (
dB
c/H
z)
TEMPERATURE (Deg. C)
Frequency = 100 MHz
Frequency = 2 GHz
Frequency = 4.2 GHz
Figure 14. Phase Noise Floor vs. Slew Rate
-168
-166
-164
-162
-160
-158
-156
-15 -10 -5 0 5 10
PH
AS
E N
OIS
E (
dB
c/H
z)
INPUT POWER (dBm)
[8] input power = 10 dbm single-ended. Phase noise Floor (dbc/Hz) = FoM (dbc/Hz)) + 10log(Fout [Hz])[9] HMC830lP6GE used as signal source, Driving +9 dbm differentially.
Figure 15. Phase Noise Floor at 1.6 GHz vs. Input Power
Figure 16. Phase Noise Performance with Low Frequency Sinusoidal Inputs [8]
Figure 17. Phase Noise Floor at 2 GHz vs. VDD and DC Termination
Figure 18. Phase Noise Floor vs. Temperature
-169
-168
-167
-166
-165
-164
-163
-162
-161
0 2 4 6 8 10 12
PH
AS
E N
OI
SE
(d
Bc/H
z)
SLEW RATE (V/nsec)
Pin = 10 dBm
Pin = 0 dBm
Pin = 10 dBm
Pin = 0 dBm
2 GHz
4 GHz
100 MHz
Pin = -3 dBm
Pin = 3 dBm
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Figure 19. Harmonic Performance (Single-Ended Input & Output) [10]
-70
-60
-50
-40
-30
-20
-10
0
10
100 1000 10000
PO
WE
R (
dB
m)
FREQUENCY (MHz)
Fo
2Fo
3f0
4Fo
3Fo
5Fo
[10] not corrected for board/cable loss.[11] Effects of the customer evaluation board are not corrected. improvements in s11 and s22 are possible under different evaluation board
configurations
Figure 20. S-Parameters - S11 [11]
-30
-25
-20
-15
-10
-5
0
0 2000 4000 6000 8000 10000
S1
1 (
dB
)
FREQUENCY (MHz)
Single-Ended
Differential
Figure 21. S-Parameters - S12 [11] Figure 22. S-Parameters - S22 [11]
-110
-100
-90
-80
-70
-60
-50
-40
-30
0 2000 4000 6000 8000 10000
S1
2 (
dB
)
FREQUENCY (MHz)
Single-Ended
Differential
-30
-25
-20
-15
-10
-5
0
0 2000 4000 6000 8000 10000
S2
2 (
dB
)
FREQUENCY (MHz)
Differential
Single-Ended
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Table 2. Pin DescriptionsPin number Function Description
1 VCCHF Power supply
2 ClkP
Differential clock inputs3 Clkn
4 sDi serial port data input
5 sDo serial port data output
6 PMoDE-sElParallel mode select. if 1, pins (sClk, sDi, sEn) are interpreted as a control-word which enables different buffers. see section “Parallel Port Control”
7 rFoutPDifferential signal output
8 rFoutn
9 VCCrF Power supply
10 sClk serial port clock
11 sEn serial port latch enable
12 outP8Differential signal output
13 outn8
14 outP7Differential signal output
15 outn7
16 VCCb Power supply
17 outn6Differential signal output
18 outP6
19 outn5Differential signal output
20 outP5
21 outP4Differential signal output
22 outn4
23 outP3Differential signal output
24 outn3
25 VCCA Power supply
26 outn2Differential signal output
27 outP2
28 outn1Differential signal output
29 outP1
30 rFbuFEnActive high rF buffer enable. the polarity of this control input can be swapped via sPi bit reg03h[4].
31 CEn Hardware chip enable. logic 0=Power Down, logic 1=Active
32 nC no Connect
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Table 3. Absolute Maximum RatingsParameter rating
Max Vdc to paddle on supply pins 1, 9, 16, 25 -0.3 V to +4 V
Max rF Power ClkP, Clkn 15 dbm single-ended
ClkP, Clkn - 0.3 V to 3.6 V
lVPECl Min output load resistor 100 ohms to GnD
lVPECl output load Current 40 mA/leg
Digital load 1 kΩ min
Digital input Voltage range -0.3 to 3.6 V
thermal resistance (junction to ground paddle) 25 0C/W
operating temperature range -40 oC to +85 oC
storage temperature range -65 oC to + 125 oC
Maximum Junction temperature +125 oC
reflow soldering
Peak temperature 260 oC
time at Peak temperature 40 sec
EsD sensitivity HbM Class 1b
stresses above those listed under Absolute Maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Outline Drawing
notEs:[1] PACkAGE boDY MAtEriAl: loW strEss inJECtion MolDED PlAstiC siliCA AnD siliCon iMPrEGnAtED.
[2] lEAD AnD GrounD PADDlE MAtEriAl: CoPPEr AlloY.
[3] lEAD AnD GrounD PADDlE PlAtinG: 100% MAttE tin.
[4] DiMEnsions ArE in inCHEs [MilliMEtErs].
[5] lEAD sPACinG tolErAnCE is non-CuMulAtiVE.
[6] PAD burr lEnGtH sHAll bE 0.15 mm MAX. PAD burr HEiGHt sHAll bE 0.05 mm MAX.
[7] PACkAGE WArP sHAll not EXCEED 0.05 mm
[8] All GrounD lEADs AnD GrounD PADDlE Must bE solDErED to PCb rF GrounD.
[9] rEFEr to HittitE APPliCAtion notE For suGGEstED PCb lAnD PAttErn.
Table 4. Package Information
Part number Package body Material lead Finish Msl rating Package Marking [1]
roHs-compliant low stress injection Molded Plastic 100% matte sn Msl1[2] H987XXXX
[1] 4-Digit lot number XXXX[2] Max peak reflow temperature of 260°C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Evaluation PCB
the circuit board used in the application should use rF circuit design techniques. signal lines should have 50 ohms impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. the evaluation circuit board shown is available from Hittite upon request.
Table 5. Evaluation Order Informationitem Contents Part number
Evaluation PCb Evaluation PCb EVAl01-HMC987lP5E
Evaluation kit
Evaluation PCbusb interface board6’ usb A Male to usb b Female CableCD roM (Contains user Manual, Evaluation PCb schematic, Evaluation software,
Ekit01-HMC987lP5E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Evaluation PCB Schematic
C114
DEPO
P
C113
DEPO
P
C112
DEPO
P
C111
DEPO
P
C110
DEPO
P
C109
DEPO
P
C108
DEPO
P
C6 4.7uF
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F
J7
1 2
130-0
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EVA
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11/18
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HMC9
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CP11
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29-06
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_13:3
4
----
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lpha R
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AVE
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ORAT
ION
AB
NOTICE OF PROPRIETARY PROPERTY: THIS DOCUMENT AND THE INFORMATION CONTAINED IN IT ARE THE PROPRIETARY PROPERTY OF HITTITE MICROWAVE CORPORATION. IT MAY NOT BE COPIED OR USEDIN ANY MANNER NOR MAY ANY OF THE INFORMATION IN OR UPON IT BE USED FOR ANY PURPOSE WITHOUT THE EXPRESSED WRITTEN CONSENT OF AN AUTHORIZED AGENT OF HITTITE MICROWAVE CORPORATION.
AB
43
21
OF
32
1
DRAW
N BY
DATE
CODE
ID N
O.SI
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8
REVI
SION
S
TITLE
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#:
PROJ
ECT
C
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T
REV
ECN#
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NAME
DATE
DESC
RIPT
ION
CCD
D
56
56
4
NC NC NC
C21
0.1uF
J30
SSW
-106-0
1-T-D
9 111 3 5 7
2 4 6 8 10 12
TP2
TP1
J11
1 2
VCCB
VCCA
VCCR
F
J26
J19
J14J1 J2
J25
C22
0.1uF
J23
J29
J27
J24
J22
C17
DEPO
P
C31
DEPO
P
C32
DEPO
P
C39
DEPO
P
C49
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PJ2
0
C20
DEPO
P
C52
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P
C42
DEPO
P
C74
DEPO
P
C93
DEPO
P
C65
DEPO
P
C61
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P
C75
DEPO
P
C66
DEPO
P
C87
DEPO
P
C76
DEPO
P
C23
DEPO
P
C33
DEPO
P
C24
DEPO
P
C34
DEPO
P
C26
DEPO
P
C36
DEPO
P
C95
DEPO
P
C73
DEPO
P
C72
DEPO
P
C71
DEPO
P
C80
DEPO
P
C82
DEPO
P
C90
DEPO
P
C91
DEPO
P
C60
DEPO
P
C64
DEPO
P
C63
DEPO
P
C70
DEPO
P
C68
DEPO
P
C78
DEPO
P
C43
DEPO
P
C44
DEPO
P
C46
DEPO
P
C58
DEPO
P
C56
DEPO
P
C55
DEPO
P
R33
DEPO
P
R34
DEPO
P
J12
J28
J21
J17
J18
J15
J13
J3 J4
R31
DEPO
P
J5
1 2
J6
1 2
J8
1 2J10
1 2
C4 0.1uF
VCCBVC
CA
VCCR
F
C101
100p
F
VCCH
F
C54
0.1uF
C102
100p
F
C53
0.1uF
C100
100p
F
C5 100p
F
C3 4.7uF
J9
1 2
R5 200K
R6 200K
R8 200K
R9 200K
R10
200K
R7 200K
R2 200K
VCCR
F
NC
U1 HMC9
76LP
3E
1 2 3 4
15
12 11 10 9
13
16
14
5
6
7
8
HV
VR
VDD
VRX
REF
RDEN
BAND
GAP
400
NC
NC
NC
NCNCNC
NC
NC
NC
C1 0.1uF
C2 4.7uF
HMC9
87LP
5E
U2
24
61
9
87
25 16
2
32
31
30
29
28
27
26
543
17181920212223
10
11
12
13
14
15OUTN7
OUTP7
OUTN8
OUTP8
SEN
SCLK
OUTP
3
OUTN
4
OUTP
4
OUTP
5
OUTN
5
OUTP
6
OUTN
6
CLKN
SDI
SDO
OUTN2
OUTP2
OUTN1
OUTP1
RFBUFEN
CEN
CLKP
VCCBVCCA
RFOU
TP
RFOU
TN
VCCRF
VCCH
F
PMOD
E_SE
L
OUTN
3
SPI
NC
C106
DEPO
P
C105
DEPO
P
R63
1K
0R40R1
C10
100p
F
C12
100p
F
R11 0
R13 0 R14 0
DEPO
PR32
R12 0
DEPO
PR35
DEPO
PR36
R41
200
C83
DEPO
P
C84
DEPO
P
C18
100p
F
C16
100p
F
C28
100p
F
C48
100p
F
C50
100p
F
C40
100p
F
R47
200
C41
DEPO
P
C51
DEPO
P
C38
100p
F
C79
100p
F
C62
100p
F
C69
100p
F
C88
100p
FC8
1
100p
F
C92
100p
F
C98
100p
F
C99
100p
F C96
100p
F
C94
100p
F
R53
200
C85
100p
F
C86
100p
F
C67
100p
F
C97
100p
F
R50
200
C77
100p
F
C47
100p
F
C59
100p
F
C37
100p
F
C27
100p
F
NC
C7 0.1uF
R62 0
C104
DEPO
P
C103
DEPO
P
C89
100p
F
C9
DEPO
P
C13
DEPO
P
C8 DEPO
P
C11
DEPO
P
R25 0
R61
DEPO
P
R3 82K
R17 0 R16 0 R15 0 R21 0 R23 0 R24 0
R26 0
R29 0 R30 0
R20 0 R19 0 R18 0 R22 0
C25
100p
F
C35
100p
F
C14
100p
F
C15
100p
F
C57
100p
F
C45
100p
F
R39
200
R40 0
R42
200
R48
200
R45
200
R46 0
NC
C29
DEPO
P
R44
200
R43 0 R55 0
R49
200
R51
200
R59 0
R52
200
R56
200 R5
7
200
R54
200
R58 0
R27 0 R28 0
R60 0
J16
R38
200
R37 0
C19
DEPO
P
C30
100p
F
C107
DEPO
P
SDO
SEN
CEN
RFBU
F_EN
PMOD
_SEL
SDI
SCK
HEAD
ER TO
USB
BOA
RD
OUT5
-P
OUT5
-N
OUT6
-P
OUT6
-N
OUT7
-N
OUT7
-P
OUT8
-N
OUT8
-P
OUT2
-P
OUT2
-N
OUT1
-N
OUT1
-P
CLK-
N
CLK-
P
GND
+5V
MAX
350m
A3.3
V
RFOU
T-P
RFOU
T-N
OUT3
-P
OUT3
-N
OUT4
-N
OUT4
-P
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Theory of Operation
Parallel Port Controlthe various outputs of the can be enabled/disabled by using parallel pin control, or via the sPi. in parallel-mode (PMoDE-sEl = 1), the sPi input pins (sClk, ski, sEn) are re-interpreted as a 3-bit control bus, and enable the lVPECl drivers according to the following truth table.
sClk, sDi, sEn
000: out2
001: out2 + out7
010: out2 + out7 + out4
011: out2 + out7 + out4 + out6
100: out2 + out7 + out4 + out6 + out5
101: out2 + out7 + out4 + out6 + out5 + out3
110: out2 + out7 + out4 + out6 + out5 + out3 + out8
111: out2 + out7 + out4 + out6 + out5 + out3 + out8 + out1
under sPi control (PMoDE-sEl = 0, see section “register Map” for the register map and sPi protocol details), there is slightly more flexibility in that any combination of buffers can be enabled or disabled via the individual buffer enable bits in reg02h.
the part features switches on both the input and output signals, so that when the part is disabled (via either the CEn pin, or the sPi control bit reg01h[0]), the power-down current drops to < 2 µA, regardless of the io termination
scheme.
Input Stagethe input stage, Figure 26, is flexible. it can be driven single-ended or differential, with lVPECl, lVDs, or CMl signals. if driven single-ended, a large AC coupling cap to ground should be used on the undriven input. the input impedance is selectable, via reg03h[3], between 50 Ω or 150 Ω single ended(100 Ω or 300 Ω differential). the DC bias level of 2.0 V can be generated internally by programming reg03[1]=1 (default configuration), supplied externally, or generated via an lVPECl termination network inside the part.
Chip Enablethe HMC987 has a chip enable feature, CEn, which can be used to power down or deactivate the lVPECl and rF outputs. this can be done by either hardware, pin 31, or a sPi command, reg01.
For a hardware selection, a logic 0 applied to CEn will power down the HMC987, however, sPi commands can still be written which will be recognized upon when a logic 1 is applied to CEn. note, there is no internal pull-up or pull-down and this pin must be terminated. to control CEn by sPi command, reg 01h[0] is set to 1, which is the default mode, and enables the outputs. When reg01[0]=0 then the outputs are disabled. Either a hardware, pin 31, or a sPi command will disable the outputs.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Figure 26. Input Stage
Figures 27 to Figure 31 illustrate common input interface configurations.
Figure 27. DC Coupled CML Interface
Figure 28. DC Coupled CMOS Interface
Reg03h[1]=1Closed(Default State)
Reg03h[2]=0Open(Default State)
Reg03h[3]=1Closed(Default State)Termination Select
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Figure 29. DC Coupled LVPECL Interface Figure 30. AC Coupled Differential CML / LVPECL / LVDS / CMOS Interface
Figure 31. AC Coupled Single-Ended CML / LVPECL / LVDS / CMOS Interface
LVPECL Output Stagethe lVPECl output driver produces up to 1.6 Vppd swing into 100 Ω differencial loads. lVPECl drivers are terminated with off-chip resistors that provide the DC current through the emitter-follower output stage. the output stage has a switch which disconnects the output driver from the load when not used. the switch series resistor significantly improves the output match when driving into 50 Ω transmission lines. the switch series resistor causes a small DC level shift and swing degradation, depending on the termination current.
if unused, disabled lVPECl outputs can be left floating, terminated, or grounded.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Figure 32. Output Stage
Figures 34 35 36 illustrate common output interface configurations.
Figure 33. DC Coupled to LVPECL Interface Figure 34. AC coupled to LVDS / CML / LVPECL / CMOS
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
Figure 35. DC Coupled to CMOS Interface
the user has a number of choices in how they connect lVPECl drivers and receivers, and there are great number of resources that deal in detail with this issue. As a quick introduction, there are compromises between matching performance, common mode levels, and signal swing. For clocking applications, the user often has the luxury of using AC coupling, unlike in many data-path situations. Figure 36 shows a simplified interface schematic between an lVPECl output and input stage - where various options and trade-offs for the termination components are provided in table 6. the Hittite evaluation board has a great deal of flexibility in how the i/os are configured, and allows the configuration in Figure 34, among many others.
Figure 36. Recommended Interface Diagram
Table 6. Interface Valuesrs - used to increase ro to match to 50 Ω environment. already has ~ 10 Ω internally.
0 Ω Hittite EVb: largest signal swing, lowest common mode shift
10 Ω better s22
rl - DC current termination for lVPECl output stage
120 Ω Hittite EVb default: standard lVPECl termination voltages
200 Ω reduced current, no performance degradation
300 Ω Further reduced current, lower output power but flatter frequency response
oPEn if using internal DC termination network at the rx
Cac - AC coupling cap
biG CAP Hittite EVb default: if using AC coupling
sHort if using internal DC termination network at the rx
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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HMC987LP5Ev03.1112
LOW NOISE 1:9 FANOUT BUFFERDC - 8 GHz
RF Output Stagethe rF output buffer is a CMl output stage with 50 Ω impedance (single-ended) and adjustable power. in parallel mode (the PMoDE_sEl pin = 1), it is at max gain (~ +3 dbm single-ended), whereas under sPi control, the gain can be lowered in ~3 db steps down to -9 dbm single-ended. see reg04(h) for more information.
Figure 37. Output Stage
Serial Port Interface (SPI) Controlthe HMC987lp5E can be controlled via sPi or parallel port control (for more information on parallel control see “Parallel Port Control”). sPi control offers more flexibility. External pin PMoDE-sEl = 1 configures the for parallel port operation, while PMoDE-sEl = 0 will enable the sPi control of.
the sPi control is required in order to re-configure the input bias network from its’ default state (reg03h), to adjust the
output power control on the rF/CMl buffer, and to individually enable arbitrary lVPECl outputs.
Operational Modesserial Port interface features:
a. Compatibility with general serial port protocols that use a shift and strobe approach to communication.b. Compatible with HMC multi-Chip solutions, useful to address multiple chips of various types from a single
serial port bus.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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Serial Port Write Operation
Table 7. SPI Open Mode - Write Timing CharacteristicsParameter Conditions Min. typ. Max. units
t1
t2
t3
t4
t5
t6
sDi setup time
sDi hold time
sEn low duration
sEn high duration
sClk 9 rising Edge to sEn rising Edge
serial port Clock speed
sEn to sClk recovery time
3
3
10
10
10
DC
10
50
ns
ns
ns
ns
ns
MHz
ns
A typical WritE cycle is shown in Figure 38.
a. the Master (host) places 9 bit data, d8:d0, Msb first, on sDi on the first 9 falling edges of sClk.b. the slave () shifts in data on sDi on the first 9 rising edges of sClkc. Master places 4 bit register address to be written to, r3:r0, Msb first, on the next 4 falling edges of sClk
(10-13)d. slave shifts the register address bits on the next 4 rising edges of sClk (10-13).e. Master places 3 bit chip address, a2:a0, Msb first, on the next 3 falling edges of sClk (14-16). the chip
address is fixed at 001.f. slave shifts the chip address bits on the 3 rising edges of sClk (14-16). g. Master asserts sEn after the 16th rising edge of sClk.h. slave registers the sDi data on the rising edge of sEn.
Figure 38. sPi timing Diagram, Write operation
Serial Port Read Operation
in order ensure correct read operation a pull-down resistor to ground (~1-2kohm) is recommended on the serial Data out line from the part. A typical rEAD cycle is shown in Figure 39.
in general, sDo line is always active during the WritE cycle. sDo will contain the data from the addresses pointed to by reg00h. if reg00h is not changed, the same data will always be present on the sDo. if it is desired to rEAD from a specific address, it is necessary in the first sPi cycle to write the desired address to reg00h, then in the next sPi cycle the desired data will be available on the sDo.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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An example of the two cycle procedure to read from any random address is as follows:
the Master (host), on the first 9 falling edges of sClk places 9 bit data, d8:d0, Msb first, on sDi as shown in Figure 39. d8:d0 should be set to zero. d3:d0 = address of the register to be rEAD on the next cycle.
a. the slave () shifts in data on sDi on the first 9 rising edges of sClkb. Master places 4 bit register address , r3:r0, ( the address the WritE ADDrEss register), Msb first, on the
next 4 falling edges of sClk (10-13). r3:r0=0000.c. slave shifts the register bits on the next 4 rising edges of sClk (10-13).d. Master places 3 bit chip address, a2:a0, Msb first, on the next 3 falling edges of sClk (14-16). the chip
address is fixed at 001.e. slave shifts the chip address bits on the next 3 rising edges of sClk (14-16).f. Master asserts sEn after the 16th rising edge of sClk.g. slave registers the sDi data on the rising edge of sEn.h. Master clears sEn to complete the address transfer of the two part rEAD cycle.i. if we do not wish to write data to the chip at the same time as we do the second cycle , then it is
recommended to simply rewrite the same contents on sDi to register zero on the rEAD back part of the cycle.
j. Master places the same sDi data as the previous cycle on the next 16 falling edges of sClk.k. slave () shifts the sDi data on the next 16 rising edges of sClk.l. slave places the desired data (i.e. data from address in reg00h[3:0]) on sDo on the next 16 rising edges of
sClk. m. Master asserts sEn after the 16th rising edge of sClk to complete the cycle.
note that if the chip address bits are unrecognized (a2:a0), the slave will tri-state the sDo output to prevent a possible bus contention issue.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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Table 8. SPI Open Mode - Read Timing CharacteristicsParameter Conditions Min. typ. Max. units
t1
t2
t3
t4
t5
t6
t7
sDi setup time
sDi hold time
sEn low duration
sEn high duration
sClk rising Edge to sDo time
sEn to sClk recovery time
sClk 16 rising Edge to sEn rising Edge
3
3
10
10
10
10
8.2+0.2ns/pF
ns
ns
ns
ns
ns
ns
ns
Figure 39. SPI Diagram, Read Operation 2- Cycles
d8
d8
d8
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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Register Map
Table 9. Reg00h ID and Read Registerbit name Width Default Description
[3:0] read Control 4 Enter register Address to be read From
[4] soft reset 1 0 1: reset, registers are set to the Default Condition
[8:0] Chip iD 9 197hex register 00 contains the Chip iD, 197hex
Table 10. Reg01h Master Enablebit name Width Default Description
[0] Master Chip Enable 1 1 1= Active, 0=Power Down
Table 11. Reg02h Individual Enablesbit name Width Default Description
[0] en1 1 1 Enable buffer 1
[1] en2 1 1 Enable buffer 2
[2] en3 1 1 Enable buffer 3
[3] en4 1 1 Enable buffer 4
[4] en5 1 1 Enable buffer 5
[5] en6 1 1 Enable buffer 6
[6] en7 1 1 Enable buffer 7
[7] en8 1 1 Enable buffer 8
Table 12. Reg03h Rx Buffer Configurationbit name Width Default Description
[0] 1 0 reserved 0
[1] DC internal 1 1 use internal DC bias string
[2] DC lVPECl 1 0 use internal lVPECl rx termination
[3] Zin 50 1 1input termination select
1 - 50 Ω single-ended, 100 Ω differential0- 150 Ω single-ended, 300 Ω differential
[4] rFbuF Xor 1 0 toggle (Xor with rFbuFEn pin) the internal rF buffer on/off
[8:5] 4 0 reserved 0
Table 13. Reg04h Gain Selectbit name Width Default Description
[2:0] rF buffer Gain 3 7
0: Disabled1: -9 dbm single-ended2: -6 dbm single-ended3: -3 dbm single-ended4: 0 dbm single-ended >4: 3 dbm single-ended
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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Table 14. Reg05h Biasesbit name Width Default Description
[1:0] reserved 2 2 reserved - 2
[3:2] reserved 2 2 reserved - 2
[5:4] reserved 2 3 reserved - 3
[8:6] reserved 3 0 reserved - 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D
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