euso-balloon cdr – agenda (i)

EUSO-BALLOON CDR – Agenda (I)

• Internal interfaces overview• Batteries and Low Voltage power Supplies• PDM interfaces• DP interfaces• HK Interfaces• List of cables• Status

E U S O - B A L L O O N D E S I G N R E V I E W, 1 8 . 1 2 . 2 0 1 2 , C N E S T O U L O U S E

Michel DUPIEUXIRAP, Toulouse

Internal Interfaces

Internal interfaces overview

CDR – 18.12.2012

Internal Interfaces – Michel Dupieux 3

EC-HV

EC-DYNODE

HVPS-2

HVPS-1

MA

PM

T

EC-ANODE

EC-ASIC

PDM-B

IR-CAM

Batteries

PWP

LVP

S1-

DP

LVP

S2-

DP

LVPS-PDM

LVP

S-H

K

HK

CCB

CLKB

GPSR

CPU

DST

SIREN

CNES Telemetry

EXT

Bat Controller

TLS

Sensors

Motors

SPACEWIRE/PCI

EC-Front

EC-Back

DP PDM

Power pack interfaces

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Internal Interfaces – Michel Dupieux 4

Power Pack & Main Fuses

Main switch Connectors

Individual fuses

Interfaces Connectors

- CNES Provide the batteries- IRAP purchases the components and does the Assembly and tests the Power Pack

Low Voltage Power Supplies Overview

CDR – 18.12.2012

Internal Interfaces – Michel Dupieux 5

EC-HV

EC-DYNODE

HVPS-2

HVPS-1

MA

PM

T

EC-ANODE

EC-ASIC

PDM-B

IR-CAM

Batteries

PWP

LVP

S1-

DP

LVP

S2-

DP

LVPS-PDM

LVP

S-H

K

HK

CCB

CLKB

GPSR

CPU

DST

SIREN

CNES Telemetry

EXT

Bat Controller

TLS

Sensors

Motors

SPACEWIRE/PCI

EC-Front

EC-Back

DP PDM

PDM interfaces

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Internal Interfaces – Michel Dupieux 6

Kapton cable

Fixation screw

MAPMT

ASIC B ASIC FASIC D

68 pins

ASIC A

68 pins

ASIC CASIC E

120 pins

A B C D E F68 pins

68 pins

68 pins

68 pins

EC_HV

Interfaces with:

CCB µSubd51 HVPS µSubd9

HK µSubd9 POWER Subd9

Data processor Block Diagram

CDR – 18.12.2012

Internal Interfaces – Michel Dupieux 7

28V

DP

LVPSs

vSpaceWire

5V

Ethernet

vSATAData

Storage

Visible cam(adv. opt.)

SpaceWire

to PCI

v PCI

GPS

vHK

system

v5V

5V

CLKs, Sync, Trig, Busy

RS232

PDM

box

vRS422

5V

Fa

st p

ara

llel l

ink

CM

D S

PI

PWP

12V

CCB

CPU

IR Camera

(adv. opt.)

CLKboard

SIREN syste

m

vSpaceWire

V, A Monitor

1PPS

TLS

Analog ( T)

Analog ( T)

DP

LVPSs

DP

LVPSs

5V

HL-CMD CC

DP

LVPS

adaptor

RS 422 RS 232

V, T

mo

n.

SP

I

Description of the DP and its components

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Internal Interfaces – Michel Dupieux 8

The DP functionality is obtained by connecting different specialized items, which form a complex system.

The main subassembly items are: Control Cluster Board (CCB) Main processing unit (CPU) Data Storage (DST) Housekeeping system (HK) Clock Board (CLKB) GPS receiver (GPSR) Data Processor Power Supplies (DP-LVPS1-2-3) PDM Power Supply (PDM-LVPS)

Description of the DP and its interfaces

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Internal Interfaces – Michel Dupieux 9

DP box modules

CPUHKLVPS HK

CLK GPSLVPS1LVPSPDM

CCB

LVPS2

HK interfaces

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HK Boards and interfaces

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Individual boards’ functionality:

PCB 05: LENSES, LVPS-PDM, LVPS-HK: (DC25-DB25).PCB 04: LVPS1-DP, LVPS2-DP: (DC37-DB25).PCB 03: SIREN-HK, CPU-HK, PDM-HK (DE9-DE9-DA15).PCB 02: CCB-HK, CLKB-HK: (DB25-DB25).PCB 01: POWER-HK, GPS-HK, HVPS-HK: (DE9-DA15-DA15).

Complete list of cables

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Internal Interfaces – Michel Dupieux 12

Status on Internal & External Interfaces

Internal Interfaces All the interfaces have been checked with the sub-system responsibles.

A list of the key points verification is done below:- All interfaces were checked

- All connectors pinout were checked

- Each Pin on each connector was checked

- Each Sub-system have its own cables and connectors lists.

- All the cables on both side were checked

- Connectors and cables have single reference

- One responsible for each cable is done

- Maximum Use of Female connector on Front panel

- Use Female connectors on power side.

External Interfaces On the external interfaces the same work has been done

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Internal Interfaces – Michel Dupieux 13