chapter 2 data manipulation dr. farzana rahman assistant professor department of computer science...

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Some sldes are adapted from Pearson Education

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Chapter 2Data Manipulation

Dr. Farzana RahmanAssistant Professor

Department of Computer Science

James Madison University

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About you

• Why are you attending?

• What do you understand by Computer Architecture – (In 1 sentence)?

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What the chapter is about?

• 2.1 Computer Architecture• 2.2 Machine Language• 2.3 Program Execution• 2.4 Arithmetic/Logic Instructions• 2.5 Communicating with Other Devices

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Big ideas• How computer manipulates data• What is the basic architecture of computer • How computer is programmed by means of

encoded instructions, i.e. machine language

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Computer Architecture

• Central Processing Unit (CPU) or processor

• Bus

• Motherboard

• RAM

• Peripheral devices

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Computer Architecture

Bus

CPU

RAM

Keyboard

HardDisk

Display

CD-ROM

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The Bus

Bus

• What is a bus?

• It is a simplified way for many devices to communicate to each other.

• Looks like a “highway” for information.

• Actually, more like a “basket” that they all share.

CPU RAM Display

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The Bus

Bus

CPU RAM Display

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The Bus

Bus

• Suppose CPU needs to check to see if the user typed anything.

CPU Keyboard Display

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The Bus

Bus

• CPU puts “Keyboard, did the user type anything?” (represented in some way) on the Bus.

CPU Keyboard Display

“Keyboard, did the user type anything?”

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The Bus

Bus

• Each device (except CPU) is a State Machine that constantly checks to see what’s on the Bus.

CPU Keyboard Display

“Keyboard, did the user type anything?”

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The Bus

Bus

• Keyboard notices that its name is on the Bus,and reads info. Other devices ignore the info.

CPU Keyboard Display

“Keyboard, did the user type anything?”

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The Bus

Bus

• Keyboard then writes “CPU: Yes, user typed ‘a’.” to Bus.

CPU Keyboard Display

“CPU: Yes, user typed ‘a’.”

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The Bus

Bus

• At some point, CPU reads the Bus, and gets the Keyboard’s response.

CPU Keyboard Display

“CPU: Yes, user typed ‘a’.”

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Computer Architecture

Bus

CPU

RAM

Keyboard

HardDisk

Display

CD-ROM

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Inside the CPU

• The CPU is the brain of the computer.

• It is the part that actually executes the instructions.

• Let’s take a look inside.

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CPU and main memory connected via a bus

Some slides are adapted from Pearson Education

General purpose registerSpecial purpose register

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Inside the CPU (cont.)Memory Registers

Register 0

Register 1

Register 2

Register 3

Instruction Register

Program counter

Arithmetic/ LogicUnit

To hold the address of the current

instruction in RAM

To hold the currentinstruction

Control Unit(State Machine)

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Stored Program Concept

• A program can be encoded as bit patterns and stored in main memory.

• From there, the CPU can then extract the instructions and execute them.

• In turn, the program to be executed can be altered easily.

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Terminology

• Machine instruction: An instruction (or command) encoded as a bit pattern recognizable by the CPU

• Machine language: The set of all instructions recognized by a machine

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Machine Language Philosophies

• Reduced Instruction Set Computing (RISC)– Few, simple, efficient, and fast instructions– Examples: PowerPC from Apple/IBM/Motorola

and ARM

• Complex Instruction Set Computing (CISC)– Many, convenient, and powerful instructions– Example: Intel

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Machine Instruction Types

• Data Transfer: copy data from one location to another

• Arithmetic/Logic: use existing bit patterns to compute a new bit patterns

• Control: direct the execution of the program

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Adding values stored in memory

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Dividing values stored in memory

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The architecture of the machine described in Appendix C

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Parts of a Machine Instruction

• Op-code: Specifies which operation to execute

• Operand: Gives more detailed information about the operation

– Interpretation of operand varies depending on op-code

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Typical Assembly Instructions• Some common assembly instructions include:

• 1) “Load” – Load a value from RAM into

one of the registers

• 2) “Load Direct” – Put a fixed value in one of the registers (as specified)

• 3) “Store” - Store the value in a specified register to the RAM

• 4) “Add” - Add the contents of two registers and put the result

in a third register

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Typical Assembly Instructions• Some common instructions include:

• 5) “Compare” - If the value in a specified register is larger than the value in a second register,

put a “0” in Register r0

• 6) “Jump” - If the value in Register r0 is “0”, change Instruction Pointer to the value in a given register

• 7) “Branch” - If the value in a specified register is larger than that

in another register, change IP to a specified value

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Figure 2.5 The composition of an instruction for the machine in Appendix C

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Figure 2.6 Decoding the instruction 35A7

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Program Execution

• Controlled by two special-purpose registers– Program counter: address of next instruction– Instruction register: current instruction

• Machine Cycle– Fetch– Decode– Execute

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Figure 2.8 The machine cycle

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Figure 2.10 The program from Figure 2.7 stored in main memory ready for execution

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Figure 2.11 Performing the fetch step of the machine cycle

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Figure 2.11 Performing the fetch step of the machine cycle (cont’d)

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A Simple Program

• Want to add values of variables a and b (assumed to be in memory), and put the result in variable c in memory, I.e. c a+b

• Instructions in program– Load a into register r1– Load b into register r3– r2 r1 + r3– Store r2 in c

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Running the Program

a

c

2

1

3

Memory

Load a into r1Load b into r3r2 r1 + r3Store r2 into c

2005200620072008

2005Load a into r1

r1r2r3r4

IRIP

Logic

CPU

2

b

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Running the Program

a

c

2

1

3

Memory

Load a into r1Load b into r3r2 r1 + r3Store r2 into c

2005200620072008

2006Load b into r3

r1r2r3r4

IRIP

Logic

CPU

3

b2

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Running the Programa

c

2

1

3

Memory

Load a into r1Load b into r3r2 r1 + r3Store r2 into c

2005200620072008

2007r2 r1 + r3

r1r2r3r4

IRIP

Logic

CPU

3

b2

5

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Running the Program

a

c

2

1

3

Memory

Load a into r1Load b into r3r2 r1 + r3Store r2 into c

2005200620072008

2008Store r2 into c

r1r2r3r4

IRIP

Logic

CPU

3

b2

5

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Running the Program

a

c

2

5

3

Memory

Load a into r1Load b into r3r2 r1 + r3Store r2 into c

2005200620072008

2008Store r2 into c

r1r2r3r4

IRIP

Logic

CPU

3

b2

5

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Arithmetic/Logic Operations

• Logic: AND, OR, XOR– Masking

• Rotate and Shift

• Arithmetic: add, subtract, multiply, divide

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Rotating the bit pattern 65 (hexadecimal) one bit to the right

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Communicating with Other Devices

• Controller: An intermediary apparatus that handles communication between the computer and a device– Specialized controllers for each type of device– General purpose controllers (USB and FireWire)

• Port: The point at which a device connects to a computer

• Memory-mapped I/O: CPU communicates with peripheral devices as though they were memory cells

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Figure 2.13 Controllers attached to a machine’s bus

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Figure 2.14 A conceptual representation of memory-mapped I/O

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Communicating with Other Devices (continued)

• Direct memory access (DMA): Controller access main memory directly over the bus

• Von Neumann Bottleneck: Insufficient bus speed impedes performance– CPU and controller compete the bus

• Handshaking: The process of coordinating the transfer of data between components – Computer and device exchange information about the

device’s status and coordinate their activities

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Communicating with Other Devices (continued)

• Parallel Communication: Several communication paths transfer bits simultaneously.

• Serial Communication: Bits are transferred one after the other over a single communication path.– USB

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Putting it all together• Architecture of computer

• Components of CPU

• Program counter and instruction register

• Machine language using encoded bit patterns

• Machine cycle

• Op code and operand info

• Communication with other peripherals

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Question

Direct to rahma2fx@jmu.edu

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