carry look ahead adder
Post on 28-Oct-2015
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DESCRIPTION
vhdl code for carry llook ahead adder..xilinx software used to execute this code
TRANSCRIPT
4-bit Carry look ahead adder
VHDL CODE
LIBRARY ieee;USE ieee.std_logic_1164.all;ENTITY CLA_Adder ISPORT ( a, b: IN STD_LOGIC_VECTOR (3 DOWNTO 0);cin: IN STD_LOGIC;s: OUT STD_LOGIC_VECTOR (3 DOWNTO 0);cout: OUT STD_LOGIC);END CLA_Adder;
ARCHITECTURE CLA_Adder OF CLA_Adder ISSIGNAL c: STD_LOGIC_VECTOR (4 DOWNTO 0);SIGNAL p: STD_LOGIC_VECTOR (3 DOWNTO 0);SIGNAL g: STD_LOGIC_VECTOR (3 DOWNTO 0);BEGING1: FOR i IN 0 TO 3 GENERATEp(i)
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