boolean functions

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x. x. x. f. 1. 2. 3. 0. 0. 0. 0. 0. 0. 1. 0. 0. 1. 0. 0. 0. 1. 1. 0. 1. 0. 0. 0. 1. 0. 1. 1. 1. 1. 0. 1. 1. 1. 1. 1. Boolean Functions. mapping. truth table. x. x. x. f. 1. 2. 3. =. Ú. Ú. f. (. x. ,. x. ,. x. ). x. x. x. x. x. x. x. - PowerPoint PPT Presentation

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Boolean Functions

1 1 1 1

0000111

0011001

0101010

0000011

1x 2x 3x f

mappingtruth table{0,1}{0,1}: nf

Representation of Boolean Functions

Disjunctive Normal Form (canonical):

1 1 1 1

0000111

0011001

0101010

0001010

Example:

OR of AND terms (not unique):

321321321321 ),,( xxxxxxxxxxxxf

3231321 ),,( xxxxxxxf

1x 2x 3x f

Representation of Boolean Functions

Conjunctive Normal Form (canonical):

Example:

AND of OR terms (not unique):

)(

)()(

)()(),,(

321

321321

321321321

xxx

xxxxxx

xxxxxxxxxf

)()(),,( 213321 xxxxxxf 1 1 1 1

0000111

0011001

0101010

0001010

1x 2x 3x f

Representation of Boolean Functions

Example:

XOR of AND terms:

unique?

1 1 1 1

0000111

0011001

0101010

0001010

1x 2x 3x f

)1 as represent literals; positive(only xx

3213231321 ),,( xxxxxxxxxxf

representation is unique.

Dependence on variables is explicit.

functions,2 m2

XOR of AND terms:

Representation of Boolean Functions

For m variables, express a boolean function as the sum of some combination of the product terms:m2

3211312121 ||,,,|,,|1 xxxxxxxxxxxx nnn

sums,distinct 2 m2

Logic Circuits

Logic GateBuilding Block:

1x2x

dx

di

ix

,,1allfor

{0,1}

{0,1}{0,1}: dg

),,( 1 dxxg

Logic Circuits

Logic GateBuilding Block:

1x2x

dx

),,( 1 dxxg

feed-forward device

Logic Circuits

“AND” gate

0001

Common Gate:

1x

2x

g0011

0101

1x 2x g

Logic Circuits

“OR” gate

0011

0101

0111

Common Gate:

1x

2x

g

1x 2x g

Logic Circuits

“XOR” gate

0011

0101

0110

Common Gate:

1x

2x

g

1x 2x g

Logic Circuits

“NOT” gate

1

0

Common Gate:

0

1

1x g

1x g

),,( 11 mxxf a

),,( 12 mxxf a

),,( 1 mn xxf a

inputs outputs

Logic Circuits

1x

2x

mx

mi

ix

,,1allfor

{0,1}

nj

mjf

,,1allfor

{0,1}{0,1}:

network oflogic gates

),,( 1 mn xxf a

),,( 11 mxxf a

),,( 12 mxxf a),,( 1 mxxf a

Logic Circuits

inputs outputs

1x

2x

mx

network oflogic gates gate

mi

ix

,,1allfor

{0,1}

nj

mjf

,,1allfor

{0,1}{0,1}:

Example

Logic Circuits

x

y

x

y

z

z

c

s

Logic Circuits

0

1

0

1

1

1

0

1

1

0

1

Example

Logic Circuits

• Size: number of gates.• Depth: longest path from an input to an output.

Measures

x

y

x

y

z

z

c

s

size = 5, depth = 3

Logic Circuits

Why study logic circuits? It all seems simple enough....

1

0110100

Construct XOR from AND/OR/NOT gates.

1 2 3

1 1 1

0000111

0011001

0101010

x x x ),,( 321 xxxXOR

3 variables(draw circuit)

Logic Circuits

Construct XOR from AND/OR/NOT gates.

4 variables(draw circuit)

1

1111111

1 2 3

0 1 1

1000111

0100101

0010110

x x x ),,( 321 xxxXOR , 4x4

1

0001011

x

......

......

x

y),( yxXOR

x

y),( yxOR

x

y),( yxAND )(xNOTx

1} {0,, yx

Example: Logic Gates

Models of Computation

Models of Computation

Example: Linear Threshold Gates

1x

2x)sgn(

10

n

iii xww

nx

1w

2w

nw0w

Models of Computation

Example: Comparators and Balancers

x

y

min(x, y)

max(x, y)

x

y

2

yx

2

yx

Models of Computation

Example: Switching Circuits

a b

c

ed

S D

dcbacedeabf

Switching Circuits

x1

x2

x3

x4

x5

S D

(Shannon, 1938) DSf

)( 41 xandx)( 52 xandx

)( 531 xandxandx)( 432 xandxandx

w

Example: Encoding FSMs

nox

noxF

to fromn transitioa causes

1),,(

Systems with states analyzed.2010

Finite State Machine

x

),( 21 ooo

input

current state

next state),( 21 nnn

A

B

D

F

Logic Circuits

Construct XOR from AND/OR/NOT gates.

construction:

lower bound:

XOR of n variables

)1(5.2 n gates

12 n gates

For n > 4, optimal size is unknown.

≤ optimal size ≤ )1(5.2 n12 n

Linear Threshold Gates

1x

2x

nx

1w

2w

nw

0w... ),,( 1 nxxf x

ni

ix

,,1allfor

{0,1}

0if1

0if0

2210

2210

nn

nn

xwxwwxw

xwxwwxwf

w

ni

iw

,,0allfor

R

Linear Threshold Gates

Useful Model?

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