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Applied Electronics II
Chapter 2: Differential Amplifier
School of Electrical and Computer EngineeringAddis Ababa Institute of Technology
Addis Ababa University
Daniel D./Abel G.
April 4, 2016
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 1 / 29
Overview
1 Introduction
2 The MOS Differential PairOperation with a Common-Mode Input VoltageOperation with a Differential Input VoltageLarge-Signal Operation
3 Small-Signal Operation of the MOS Differential PairDifferential GainThe Differential Half-CircuitThe Differential Amplifier with Current-Source LoadsCascode Differential AmplifierCommon-Mode Gain and Common-Rejection ratio (CMRR)Differential versus Single-Ended OutputCurrent Source, Biasing Techniques
4 Exercise
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 2 / 29
Introduction
Introduction
The purpose of a differential amplifier is to amplify the differencebetween two signals.The differential-pair of differential-amplifier configuration is widelyused in IC circuit design.
One example is input stage of op-amp.Another example is emitter-coupled logic (ECL).
Technology was invented in 1940s for use in vacuum tubes the basicdifferential-amplifier configuration was later implemented withdiscrete bipolar transistors.
However, the configuration became most useful with invention ofmodern transistor / MOS technologies.
Vo
V1
V2
Differntial
Amplifier
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 3 / 29
The MOS Differential Pair
The MOS Differential Pair
Two matched transistors (Q1 and Q2) joined and biased by a constantcurrent source I. MOSFET’s should not enter triode region of operation.
Figure: The basic MOS differential-pair configuration.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 4 / 29
The MOS Differential Pair Operation with a Common-Mode Input Voltage
Operation with a Common-Mode Input VoltageConsider case when two gate terminals are joined together.
Connected to a common-mode voltage (VCM).vG1 = vG2 = VCM
Q1 and Q2 are matched.Current I will divide equally between the two transistors.
ID1 = ID2 = I/2,VS = VCM − VGS
where VGS is the gate-to-source voltage.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 5 / 29
The MOS Differential Pair Operation with a Common-Mode Input Voltage
Operation with a Common-Mode Input Voltage
Neglecting channel-length modulation, VGS and I/2 are related by
I
2=
1
2k
′n
W
L(VGS − Vt)
2
in terms of the overdrive voltage VOV ,
I
2=
1
2k
′n
W
LV 2OV or VOV =
√I
k ′nWL
The voltage at each drain will be
vD1 = vD2 = VDD −I
2RD
As long as Q1 and Q2 remain in the saturation region, the current I willdivide equally and the voltages at the drains will not change. Thus thedifferential pair does not respond to (i.e., it rejects) common-mode inputsignals.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 6 / 29
The MOS Differential Pair Operation with a Common-Mode Input Voltage
Operation with a Common-Mode Input Voltage
An important specification of a differential amplifier is its inputcommon-mode range.This is the range of VCM over which thedifferential pair operates properly.The highest value of VCM is limited by the requirement that Q1 and Q2
remain in saturation, which means vDS ≥ VOV
max(VCM) = Vt + VDD −I
2RD
The lowest value of VCM is determined by the need to allow for a sufficientvoltage across the current source I for it to operate properly. If a voltageVCS is needed across the current source, then
min(VCM) = −VSS + VCS + Vt + VOV
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 7 / 29
The MOS Differential Pair Operation with a Differential Input Voltage
Operation with a Differential Input Voltage
If vid is applied to Q1 and Q2 is grounded, following conditions apply:vid = vGS1 − vGS2 > 0iD1 > iD2
if vid is positive, vGS1 will be greater than vGS2 and hence iD1 will begreater than iD2 and the difference output voltage (vD2 − vD1) will bepositive.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 8 / 29
The MOS Differential Pair Operation with a Differential Input Voltage
Operation with a Differential Input Voltage
The differential pair responds to difference-mode or differential inputsignals by providing a corresponding differential output signal between thetwo drains.To find the vid that causes the entire bias current I to flow in one of thetwo transistors.
vGS1 reaches the value that corresponds to iD1 = I ,
vGS2 is reduced to a value equal to the threshold voltage Vt , atwhich point vS = −Vt .
The vGS1 can be found as
I =1
2
(k
′n
W
L
)(vGS1 − Vt)
2
vGS1 = Vt +√
2I/k ′n(W /L) = Vt +
√2VOV
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 9 / 29
The MOS Differential Pair Operation with a Differential Input Voltage
Operation with a Differential Input Voltage
The corresponding max(vid) is
max(vid)= vGS1 + vS
max(vid)= Vt +√
2VOV − Vt =√
2VOV
To steer the current completely to one side of the pair, a difference inputvoltage vid of at least
√2VOV (4VT for bipolar) is needed.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 10 / 29
The MOS Differential Pair Large-Signal Operation
Large-Signal Operation
Objective is to derive expressions for drain current iD1 and iD2 in terms ofdifferential signal vid = vG1 − vG2.Assumption taken
Differential pair is perfectly matched
Channel-length Modulation is Neglected (λ = 0)
The circuit maintains Q1 and Q2 in the saturation region of operationat all times.
Load Independence
Step 1 Expression drain currents for Q1 and Q2.
iD1 =1
2k
′n
W
L(vGS1 − Vt)
2 and iD2 =1
2k
′n
W
L(vGS2 − Vt)
2
Step 2 Take the square roots of both sides of both√iD1 =
√1
2k ′n
W
L(vGS1 − Vt) and
√iD2 =
√1
2k ′n
W
L(vGS2 − Vt)
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 11 / 29
The MOS Differential Pair Large-Signal Operation
Large-Signal Operation
Step 3 (vGS1 − vGS2 = vG1 − vG2 = vid) Subtract and perform appropriatesubstitution . √
iD1 −√iD2 =
√1
2k ′n
W
Lvid
Step 4 Squaring both sides and substituting for iD1 + iD2 = I
2√iD1iD2 = I − 1
2k
′n
W
Lv2id
Step 5 Replacing iD2 = I − iD1 , squaring both sides and solving the
quadratic and substituting VOV =√I/(k ′nWL
)iD1 =
I
2+
(I
VOV
)(vid2
)√1−
(vid/2
VOV
)2
iD2 =I
2−(
I
VOV
)(vid2
)√1−
(vid/2
VOV
)2
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 12 / 29
The MOS Differential Pair Large-Signal Operation
Large-Signal Operation
The Transfer characteristics are nonlinear due to the term involving v2id
Figure: Normalized plots of the currents in a MOSFET differential pair.
Since Linear amplification is desirable vid will be as small as possible. Fora given value of VOV , the only option is to keep vid/2 much smaller thanVOV .
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 13 / 29
The MOS Differential Pair Large-Signal Operation
Large-Signal OperationThe approximation is
iD1 uI
2+
(I
VOV
)(vid2
)and iD2 u
I
2−(
I
VOV
)(vid2
)
Figure: The linear range of operation of the MOS differential pair can beextended by operating the transistor at a higher value of VOV .
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 14 / 29
Small-Signal Operation of the MOS Differential Pair
Small-Signal Operation of the MOS Differential Pair
Figure: Small-signal analysis of MOS deferential amplifier.Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 15 / 29
Small-Signal Operation of the MOS Differential Pair Differential Gain
Differential GainFrom Figure (a) vG1 = VCM + 1
2vid and vG2 = VCM − 12vid causes a
virtual signal ground to appear on the common-source (common-emitter)connection
where VCM denotes a common-mode dc voltage
where vid denotes a differential input applied complementarily (or balanced)
Also note that each of Q1 and Q2 is biased at a dc current of I/2 and isoperating at an overdrive voltage VOV .Assuming vid/2� VOV , the drain current will be
id1 =
(I
VOV
)(vid2
)and id2 = −
(I
VOV
)(vid2
)The transconductance of MOSFET is
gm =2IDVOV
=2(I/2)
VOV=
I
VOV
Combining the equations
id1 = gm(vid
2
)and id2 = −gm
(vid2
)Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 16 / 29
Small-Signal Operation of the MOS Differential Pair Differential Gain
Differential Gain
The output can be taken between the drain and the ground,refereed assingle-ended outputs vo1 and vo2.
vo1 = −id1 × RD = −gm(vid
2
)RD and vo2 = −id2 × RD = gm
(vid2
)RD
The output can e taken between the two drain terminals, refereed asdifferential output vod
vod = vo2 − vo1 = gmvidRD
The differential gain
Av =vodvid
= gmRD
When the output resistance of the MOSFET is taken into account
Av =vodvid
= gm[RD ‖ ro ]
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 17 / 29
Small-Signal Operation of the MOS Differential Pair The Differential Half-Circuit
The Differential Half-Circuit
The performance can be determined by considering only half the circuitsince the circuit is symmetrical and balanced. It is easier for analysis.
Q1 is biased at I/2 and isoperating at VOV .
This circuit may be used todetermine the differentialvoltage gain of the differentialamplifier
Av = gm[RD ‖ ro ]
Figure: Half-circuit of the differential amplifier.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 18 / 29
Small-Signal Operation of the MOS Differential Pair The Differential Amplifier with Current-Source Loads
The Differential Amplifier with Current-Source LoadsTo obtain higher gain, the passive resistances (RD) can be replaced with currentsources. The current sources are realized with PMOS and biased to conduct I/2.
Av = gm1[ro1 ‖ ro3]
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 19 / 29
Small-Signal Operation of the MOS Differential Pair Cascode Differential Amplifier
Cascode Differential Amplifier
Gain can be increased via cascode configuration.
The differential Gain
Av = gm1[Ron ‖ Rop]
where
Ron = [gm3ro3]ro1
Rop = [gm5ro5]ro7
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 20 / 29
Small-Signal Operation of the MOS Differential Pair Common-Mode Gain and Common-Rejection ratio (CMRR)
Common-Mode Gain and CMRR
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 21 / 29
Small-Signal Operation of the MOS Differential Pair Common-Mode Gain and Common-Rejection ratio (CMRR)
Common-Mode Gain and CMRR
In practice there is no ideal current source or symmetrical matching.Non-ideal current source: Assuming the current source have a finiteoutput resistance RSS , and a small common-mode signal vicm is add onVCM . In the ideal case the drain voltage will not change or thecommon-mode gain is zero.since RSS is very large we can assume Q1 and Q2 are operate at a bias current of
I/2.
vicm =i
gm+ 2iRSS and i =
vicm1/gm + 2RSS
The drain voltage
vo1 = vo2 = −RD i = − RD
1/gm + 2RSSvicm
since 2RSS � 1/gmvo1
vicm=
vo2
vicmu − RD
2RSS
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 22 / 29
Small-Signal Operation of the MOS Differential Pair Common-Mode Gain and Common-Rejection ratio (CMRR)
Common-Mode Gain and CMRR
vo1 and vo2 are corrupted by vicm ,still common-mode signal is rejected
vod = vo2 − vo1 = 0
Effect of RD Mismatch:Assume Q1 load is RD and Q2 load is(RD + ∆RD). The drain voltage
vo1 u − RD
2RSSvicm and vo2 u −RD + ∆RD
2RSSvicm
Thus
vod = vo2 − vo1 = −∆RD
2RSSvicm
The common-mode gain
Acm =vodvicm
= −∆RD
2RSS= −
(RD
2RSS
)(∆RD
RD
)∴ Mismatch in the drain resistances causes the differential amplifier tohave a finite common-mode gain.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 23 / 29
Small-Signal Operation of the MOS Differential Pair Common-Mode Gain and Common-Rejection ratio (CMRR)
Common-Mode Gain and CMRR
Common-mode rejection ratio (CMRR)
CMMR =|Ad ||Acm|
CMMR for drain resistance mismatch of ∆RD
CMMR =2gmRSS
∆RD/RD
For high CMMR ↑ RSS
Effect of gm Mismatch: Assume gm1 = gm + 12 ∆gm , gm2 = gm − 1
2 ∆gmfrom the figure on the next slide
i1
(1
gm1
)= i2
(1
gm2
)and i1 + i2 = i1
(1 +
gm2
gm1
)
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 24 / 29
Small-Signal Operation of the MOS Differential Pair Common-Mode Gain and Common-Rejection ratio (CMRR)
Common-Mode Gain and CMRR
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 25 / 29
Small-Signal Operation of the MOS Differential Pair Common-Mode Gain and Common-Rejection ratio (CMRR)
Common-Mode Gain and CMRR
vicm = i1/gm1 + (i1 + i2)RSS = i1/gm1 + i1
(1 +
gm2
gm1
)RSS
rearranging to expressi1 and i2 in terms of vicm
i1 =gm1vicm
1 + (gm1 + gm2)RSSand i2 =
gm2vicm1 + (gm1 + gm2)RSS
The differential output voltage vod = vo2 − vo1 = −i2RD + i1RD
vod =(gm1 − gm2)RD
1 + (gm1 + gm2)RSSvicm =
∆gmRD
1 + 2gmRSSvicm
The common-mode gain
Av =∆gmRD
1 + 2gmRSSu(
RD
2RSS
)(∆gmgm
)The corresponding CMMR
CMMR = (2gmRSS)/(∆gmgm
)
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 26 / 29
Small-Signal Operation of the MOS Differential Pair Differential versus Single-Ended Output
Differential versus Single-Ended Output
Differential Output:
It decreases the common-mode gain and increases the common-moderejection ratio (CMRR) dramatically
It increases the differential gain by a factor of 2 (6 dB) because theoutput is the difference between two voltages of equal magnitude andopposite sign.
Single-Ended Output:
Needed to connect it to an off-chip load.
Advantage of Differential Amplifier:
The differential transmission of the signal on the chip also minimizesits susceptibility to corruption with noise and interference.
Enables us to bias the amplifier and to couple amplifier stagestogether without the need for bypass and coupling capacitors.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 27 / 29
Small-Signal Operation of the MOS Differential Pair Current Source, Biasing Techniques
Current Source, Biasing Techniques
The current source is implemented using a current mirror. Q3 and Q4 isthe current mirror implementation.
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 28 / 29
Exercise
Exercise
The following questions in the text book are exercises to be done for thetutorial session.
8.1
8.6
8.17
8.21
8.25
Reading AssignmentBJT Differential Amplifier
Chapter 2: Differential Amplifier (AAIT) Chapter Two April 4, 2016 29 / 29
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